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linux-postmarketos-exynos4: upgrade to version 6.3-rc7 (MR 4018)

Browse source 
And use gitlab.com/exynos4-mainline/linux as source so that we no
longer have to carry all the patches in pmaports.

[ci:skip-build]: Already built successfully in CI
This commit is contained in:
Henrik Grimler 2023-04-11 20:10:22 +02:00 • committed by Newbyte
parent d5fa93bd01
commit ee22fd5eac
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GPG key ID: 990600ED1DB95E02
15 changed files with 103 additions and 3176 deletions
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37
device/community/linux-postmarketos-exynos4/0001-ARM-decompressor-Flush-tlb-before-swiching-domain-0-.patch
View file

@ -1,37 +0,0 @@
From 2a8827ae4e19cfe78d57c45cfffb7b2a010a77b6 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Arve=20Hj=C3=B8nnev=C3=A5g?= <arve@android.com>
Date: Fri, 30 Nov 2012 17:05:40 -0800
Subject: [PATCH 01/13] ARM: decompressor: Flush tlb before swiching domain 0
to client mode
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
If the bootloader used a page table that is incompatible with domain 0
in client mode, and boots with the mmu on, then swithing domain 0 to
client mode causes a fault if we don't flush the tlb after updating
the page table pointer.
v2: Add ISB before loading dacr.
Signed-off-by: Arve Hjønnevåg <arve@android.com>
---
arch/arm/boot/compressed/head.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index 9f406e9c0ea6..750c8c0d5d9e 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -892,6 +892,8 @@ __armv7_mmu_cache_on:
bic r6, r6, #1 << 31 @ 32-bit translation system
bic r6, r6, #(7 << 0) | (1 << 4) @ use only ttbr0
mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer
+ mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
+ mcr p15, 0, r0, c7, c5, 4 @ ISB
mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
mcrne p15, 0, r6, c2, c0, 2 @ load ttb control
#endif
--
2.30.2

61
device/community/linux-postmarketos-exynos4/0002-ARM-dts-exynos-Add-reboot-modes-to-midas.patch
View file

@ -1,61 +0,0 @@
From d5af6b882084222f9b41ff1fa80116ffc82c857a Mon Sep 17 00:00:00 2001
From: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
Date: Wed, 4 Nov 2020 00:06:26 +0100
Subject: [PATCH 02/13] ARM: dts: exynos: Add reboot modes to midas
The values have been taken from the sec-reboot.c driver in
the 3.0.101 smdk4412 kernel used in LineageOS which is based
on Samsung source code releases for various devices.
Only the strict minimum modes have been added: the S-Boot 4.0
bootloader is nonfree, so exporting less well known modes could
potentially have unwanted consequences.
TODO:
- After reboot to download, heimdall doesn't work while it works
with the SMDK4412 kernel.
- Fix reboot without arguments (Test: Try "Reboot system now"
in a recovery after rebooting to the recovery)
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
---
arch/arm/boot/dts/exynos4412-midas.dtsi | 23 +++++++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-midas.dtsi b/arch/arm/boot/dts/exynos4412-midas.dtsi
index 8e1c19a8ad06..1f9cd7474b16 100644
--- a/arch/arm/boot/dts/exynos4412-midas.dtsi
+++ b/arch/arm/boot/dts/exynos4412-midas.dtsi
@@ -982,6 +982,29 @@ &mshc_0 {
&pmu_system_controller {
assigned-clocks = <&pmu_system_controller 0>;
assigned-clock-parents = <&clock CLK_XUSBXTI>;
+
+ /* S-Boot 4.0 */
+ #define S5P_INFORM2 0xF008
+ #define S5P_INFORM3 0x080C
+ #define BOOT_MODE_PREFIX 0x12345670
+ #define BOOT_NORMAL (BOOT_MODE_PREFIX | 0)
+ #define BOOT_DOWNLOAD (BOOT_MODE_PREFIX | 1)
+ #define BOOT_RECOVERY (BOOT_MODE_PREFIX | 4)
+
+ no-lpm-mode {
+ compatible = "syscon-reboot";
+ offset = <S5P_INFORM2>;
+ value = <0x12345678>;
+ };
+
+ reboot-mode {
+ compatible = "syscon-reboot-mode";
+ offset = <S5P_INFORM3>;
+ mode-normal = <BOOT_NORMAL>;
+ mode-recovery = <BOOT_RECOVERY>;
+ mode-bootloader = <BOOT_DOWNLOAD>;
+ mode-download = <BOOT_DOWNLOAD>;
+ };
};
&pinctrl_0 {
--
2.30.2

343
device/community/linux-postmarketos-exynos4/0003-mmc-core-Workaround-VTU00M-0xf1-FTL-metadata-corrupt.patch
View file

@ -1,343 +0,0 @@
From 8e9623270952885f0b4a45c56c965c4295ce709c Mon Sep 17 00:00:00 2001
From: belgin <belginstirbu@hotmail.com>
Date: Tue, 29 Jun 2021 20:31:12 +0300
Subject: [PATCH 03/13] mmc: core: Workaround VTU00M 0xf1 FTL metadata
corruption bug
Some versions of the 0xf1 revision of the firmware of the
VTU00M eMMC from Samsung have a bug that triggers an FTL
metadata corruption.
These eMMC are used at least in the Samsung Galaxy SIII
(GT-I9300) and Galaxy Note II (GT-N7100).
The corrupted FTL metadata can make the eMMC CPU crash.
In practice as the eMMC has several hardware partitions, in
some cases the bootloader hadware partition (which is used
to store the phone bootloader in the Galaxy SIII and Note II)
still works, while the main hardware partition (that contains
the phone operating system) doesn't.
In other cases the eMMC crashes during the very begining of
its boot procedure. In that case the phones botloaders can't
be loaded anymore, which results in a black screen and no
visible signs that the phone has been powered on.
This patch has been ported from the Samsung patch made to
address this issue.
It uses MMC vendor specific commands to patch the eMMC
firmware in RAM. The patch hangs the eMMC CPU right before
the corruption is about to happen.
So while it's not ideal, it still better to have devices
hanging, even repetedly, than breaking devices completely.
Since VTU00M eMMC firmwares are not free software nor
redistributable, we cannot simply dump newer firmwares,
and redistribute them. In addition the only tested way
to do a firmware update destroys all the data on the
eMMC (including the FTL metadata as well) in the process.
A proper fix would be to write a compatible free software
eMMC firmware and to investigate the firmware update command
that doesn't erase the FTL metadata and/or the data, however
this could be quite time consuming.
References:
- https://media.ccc.de/v/34c3-8784-emmc_hacking_or_how_i_fixed_long-dead_galaxy_s3_phones
TODO:
- Adapt this patch to use the SD/eMMC hook system for eMMC cards.
- upstream it
Signed-off-by: belgin <belginstirbu@hotmail.com>
GNUtoo: Rewrite the commit message
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
---
drivers/mmc/core/mmc.c | 17 +++
drivers/mmc/core/mmc_ops.c | 206 +++++++++++++++++++++++++++++++++++++
include/linux/mmc/card.h | 1 +
include/linux/mmc/core.h | 3 +
4 files changed, 227 insertions(+)
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index 89cd48fcec79..dc6fe015f872 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -1929,6 +1929,12 @@ static int mmc_init_card(struct mmc_host *host, u32 ocr,
if (!oldcard)
host->card = card;
+ err = mmc_start_movi_operation(host->card);
+ if (err) {
+ pr_warn("%s: movi operation failed\n", mmc_hostname(host));
+ goto free_card;
+ }
+
return 0;
free_card:
@@ -2329,6 +2335,17 @@ int mmc_attach_mmc(struct mmc_host *host)
if (err)
goto remove_card;
+ if (!strncmp(host->card->cid.prod_name, "VTU00M", 6) &&
+ (host->card->cid.prv == 0xf1) &&
+ (mmc_start_movi_smart(host->card) == 0x2))
+ host->card->movi_ops = 0x2;
+
+ err = mmc_start_movi_operation(host->card);
+ if (err) {
+ pr_warn("%s: movi operation failed\n", mmc_hostname(host));
+ goto remove_card;
+ }
+
mmc_claim_host(host);
return 0;
diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c
index 81c55bfd6e0c..07e67b62515d 100644
--- a/drivers/mmc/core/mmc_ops.c
+++ b/drivers/mmc/core/mmc_ops.c
@@ -856,6 +856,212 @@ int mmc_bus_test(struct mmc_card *card, u8 bus_width)
return mmc_send_bus_test(card, card->host, MMC_BUS_TEST_R, width);
}
+static int mmc_send_cmd(struct mmc_host *host,
+ u32 opcode, u32 arg, unsigned int flags, u32 *resp)
+{
+ int err;
+ struct mmc_command cmd;
+
+ memset(&cmd, 0, sizeof(struct mmc_command));
+
+ cmd.opcode = opcode;
+ cmd.arg = arg;
+ cmd.flags = flags;
+ *resp = 0;
+
+ err = mmc_wait_for_cmd(host, &cmd, 0);
+
+ if (!err)
+ *resp = cmd.resp[0];
+ else
+ printk(KERN_ERR "[CMD%d] FAILED!!\n", cmd.opcode);
+
+ return err;
+}
+
+static int mmc_movi_cmd(struct mmc_host *host, u32 arg)
+{
+ int err;
+ u32 resp;
+
+ err = mmc_send_cmd(host, 62, arg,
+ MMC_RSP_R1B | MMC_CMD_AC, &resp);
+ mdelay(10);
+
+ if (!err)
+ do {
+ err = mmc_send_cmd(host, MMC_SEND_STATUS,
+ host->card->rca << 16,
+ MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC,
+ &resp);
+ if (err) {
+ printk(KERN_ERR "CMD13(VC) failed\n");
+ break;
+ }
+ /*wait until READY_FOR_DATA*/
+ } while (!(resp & 1<<8));
+
+ return err;
+}
+
+static int mmc_movi_erase_cmd(struct mmc_host *host, u32 arg1, u32 arg2)
+{
+ int err;
+ u32 resp;
+
+ err = mmc_send_cmd(host, MMC_ERASE_GROUP_START, arg1,
+ MMC_RSP_R1 | MMC_CMD_AC, &resp);
+ if (err)
+ return err;
+
+ err = mmc_send_cmd(host, MMC_ERASE_GROUP_END, arg2,
+ MMC_RSP_R1 | MMC_CMD_AC, &resp);
+ if (err)
+ return err;
+
+ err = mmc_send_cmd(host, MMC_ERASE, 0,
+ MMC_RSP_R1B | MMC_CMD_AC, &resp);
+ if (!err)
+ do {
+ err = mmc_send_cmd(host, MMC_SEND_STATUS,
+ host->card->rca << 16,
+ MMC_RSP_SPI_R2 | MMC_RSP_R1 | MMC_CMD_AC,
+ &resp);
+ if (err) {
+ printk(KERN_ERR "CMD13(VC) failed\n");
+ break;
+ }
+ /*wait until READY_FOR_DATA*/
+ } while (!(resp & 1<<8));
+
+ return err;
+}
+
+
+static int mmc_movi_read_req(struct mmc_card *card,
+ void *data_buf, u32 arg, u32 blocks)
+{
+ struct mmc_request mrq = {0};
+ struct mmc_command cmd = {0};
+ struct mmc_data data = {0};
+ struct scatterlist sg;
+
+ /*send request*/
+ mrq.cmd = &cmd;
+ mrq.data = &data;
+
+ if (blocks > 1)
+ cmd.opcode = MMC_READ_MULTIPLE_BLOCK;
+ else
+ cmd.opcode = MMC_READ_SINGLE_BLOCK;
+ cmd.arg = arg;
+
+ cmd.flags = MMC_RSP_SPI_R1 | MMC_RSP_R1 | MMC_CMD_ADTC;
+
+ data.blksz = 512;
+ data.blocks = blocks;
+ data.flags = MMC_DATA_READ;
+ data.sg = &sg;
+ data.sg_len = 1;
+
+ sg_init_one(&sg, data_buf, data.blksz * data.blocks);
+
+ mmc_set_data_timeout(&data, card);
+
+ mmc_wait_for_req(card->host, &mrq);
+
+ if (cmd.error)
+ return cmd.error;
+
+ if (data.error)
+ return data.error;
+
+ return 0;
+}
+
+int mmc_start_movi_smart(struct mmc_card *card)
+{
+ int err;
+ u8 data_buf[512];
+ u32 date = 0;
+
+ err = mmc_movi_cmd(card->host, 0xEFAC62EC);
+ if (err)
+ return err;
+
+ err = mmc_movi_cmd(card->host, 0x0000CCEE);
+ if (err)
+ return err;
+
+ err = mmc_movi_read_req(card, (void *)data_buf, 0x1000, 1);
+ if (err)
+ return err;
+
+ err = mmc_movi_cmd(card->host, 0xEFAC62EC);
+ if (err)
+ return err;
+
+ err = mmc_movi_cmd(card->host, 0x00DECCEE);
+ if (err)
+ return err;
+
+ date = ((data_buf[327] << 24) | (data_buf[326] << 16) |
+ (data_buf[325] << 8) | data_buf[324]);
+
+ if (date != 0x20120413) {
+ err = -1;
+ return err;
+ }
+
+ return 0x2;
+}
+EXPORT_SYMBOL_GPL(mmc_start_movi_smart);
+
+int mmc_start_movi_operation(struct mmc_card *card)
+{
+ int err = 0;
+
+ if (card->movi_ops != 0x2)
+ return 0;
+
+ err = mmc_movi_cmd(card->host, 0xEFAC62EC);
+ if (err)
+ return err;
+ err = mmc_movi_cmd(card->host, 0x10210000);
+ if (err)
+ return err;
+
+ err = mmc_movi_erase_cmd(card->host, 0x00040300, 0x4A03B510);
+ if (err)
+ return err;
+ err = mmc_movi_erase_cmd(card->host, 0x00040304, 0x28004790);
+ if (err)
+ return err;
+ err = mmc_movi_erase_cmd(card->host, 0x00040308, 0xE7FED100);
+ if (err)
+ return err;
+ err = mmc_movi_erase_cmd(card->host, 0x0004030C, 0x0000BD10);
+ if (err)
+ return err;
+ err = mmc_movi_erase_cmd(card->host, 0x00040310, 0x00059D73);
+ if (err)
+ return err;
+ err = mmc_movi_erase_cmd(card->host, 0x0005C7EA, 0xFD89F7E3);
+ if (err)
+ return err;
+
+ err = mmc_movi_cmd(card->host, 0xEFAC62EC);
+ if (err)
+ return err;
+ err = mmc_movi_cmd(card->host, 0x00DECCEE);
+ if (err)
+ return err;
+
+ return err;
+}
+EXPORT_SYMBOL_GPL(mmc_start_movi_operation);
+
+
static int mmc_send_hpi_cmd(struct mmc_card *card)
{
unsigned int busy_timeout_ms = card->ext_csd.out_of_int_time;
diff --git a/include/linux/mmc/card.h b/include/linux/mmc/card.h
index c726ea781255..e6e168651b35 100644
--- a/include/linux/mmc/card.h
+++ b/include/linux/mmc/card.h
@@ -338,6 +338,7 @@ struct mmc_card {
unsigned int nr_parts;
struct workqueue_struct *complete_wq; /* Private workqueue */
+ unsigned int movi_ops;
};
static inline bool mmc_large_sector(struct mmc_card *card)
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h
index 6efec0b9820c..9bfbe8a2d22d 100644
--- a/include/linux/mmc/core.h
+++ b/include/linux/mmc/core.h
@@ -179,4 +179,7 @@ int mmc_hw_reset(struct mmc_card *card);
int mmc_sw_reset(struct mmc_card *card);
void mmc_set_data_timeout(struct mmc_data *data, const struct mmc_card *card);
+int mmc_start_movi_smart(struct mmc_card *card);
+int mmc_start_movi_operation(struct mmc_card *card);
+
#endif /* LINUX_MMC_CORE_H */
--
2.30.2

182
device/community/linux-postmarketos-exynos4/0004-drivers-drm-Add-backlight-control-support-for-s6e8aa.patch
View file

@ -1,182 +0,0 @@
From 5cd8e7d2ec843996eebb37246d828255c182f4f4 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Joonas=20Kylm=C3=A4l=C3=A4?= <joonas.kylmala@iki.fi>
Date: Tue, 3 Sep 2019 10:45:08 -0400
Subject: [PATCH 04/13] drivers: drm: Add backlight control support for s6e8aa0
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Joonas Kylmälä <joonas.kylmala@iki.fi>
---
drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c | 83 ++++++++++++++-----
1 file changed, 61 insertions(+), 22 deletions(-)
diff --git a/drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c b/drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c
index 54213beafaf5..635336208fef 100644
--- a/drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c
+++ b/drivers/gpu/drm/panel/panel-samsung-s6e8aa0.c
@@ -3,6 +3,8 @@
* MIPI-DSI based s6e8aa0 AMOLED LCD 5.3 inch panel driver.
*
* Copyright (c) 2013 Samsung Electronics Co., Ltd
+ * Copyright (C) 2019 Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com>
+ * Derived from drivers/gpu/drm/panel/panel-samsung-s6e63m0.c
*
* Inki Dae, <inki.dae@samsung.com>
* Donghwa Lee, <dh09.lee@samsung.com>
@@ -12,6 +14,7 @@
* Andrzej Hajda <a.hajda@samsung.com>
*/
+#include <linux/backlight.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/module.h>
@@ -25,6 +28,7 @@
#include <drm/drm_mipi_dsi.h>
#include <drm/drm_modes.h>
#include <drm/drm_panel.h>
+#include <drm/drm_print.h>
#define LDI_MTP_LENGTH 24
#define GAMMA_LEVEL_NUM 25
@@ -84,6 +88,8 @@
#define AID_2 (0x6)
#define AID_3 (0x7)
+#define MAX_BRIGHTNESS (GAMMA_LEVEL_NUM - 1)
+
typedef u8 s6e8aa0_gamma_table[GAMMA_TABLE_LEN];
struct s6e8aa0_variant {
@@ -94,6 +100,7 @@ struct s6e8aa0_variant {
struct s6e8aa0 {
struct device *dev;
struct drm_panel panel;
+ struct backlight_device *bl_dev;
struct regulator_bulk_data supplies[2];
struct gpio_desc *reset_gpio;
@@ -109,7 +116,6 @@ struct s6e8aa0 {
u8 version;
u8 id;
const struct s6e8aa0_variant *variant;
- int brightness;
/* This field is tested by functions directly accessing DSI bus before
* transfer, transfer is skipped if it is set. In case of transfer
@@ -320,9 +326,10 @@ static void s6e8aa0_etc_elvss_control(struct s6e8aa0 *ctx)
static void s6e8aa0_elvss_nvm_set_v142(struct s6e8aa0 *ctx)
{
+ struct backlight_device *bd = ctx->bl_dev;
u8 br;
- switch (ctx->brightness) {
+ switch (bd->props.brightness) {
case 0 ... 6: /* 30cd ~ 100cd */
br = 0xdf;
break;
@@ -761,24 +768,6 @@ static const struct s6e8aa0_variant s6e8aa0_variants[] = {
}
};
-static void s6e8aa0_brightness_set(struct s6e8aa0 *ctx)
-{
- const u8 *gamma;
-
- if (ctx->error)
- return;
-
- gamma = ctx->variant->gamma_tables[ctx->brightness];
-
- if (ctx->version >= 142)
- s6e8aa0_elvss_nvm_set(ctx);
-
- s6e8aa0_dcs_write(ctx, gamma, GAMMA_TABLE_LEN);
-
- /* update gamma table. */
- s6e8aa0_dcs_write_seq_static(ctx, 0xf7, 0x03);
-}
-
static void s6e8aa0_panel_init(struct s6e8aa0 *ctx)
{
s6e8aa0_apply_level_1_key(ctx);
@@ -790,7 +779,7 @@ static void s6e8aa0_panel_init(struct s6e8aa0 *ctx)
s6e8aa0_panel_cond_set(ctx);
s6e8aa0_display_condition_set(ctx);
- s6e8aa0_brightness_set(ctx);
+ backlight_enable(ctx->bl_dev);
s6e8aa0_etc_source_control(ctx);
s6e8aa0_etc_pentile_control(ctx);
s6e8aa0_elvss_nvm_set(ctx);
@@ -973,6 +962,54 @@ static int s6e8aa0_parse_dt(struct s6e8aa0 *ctx)
return 0;
}
+static int s6e8aa0_set_brightness(struct backlight_device *bd)
+{
+ struct s6e8aa0 *ctx = bl_get_data(bd);
+ int brightness = bd->props.brightness;
+ const u8 *gamma;
+
+ if (ctx->error)
+ return ctx->error;
+
+ gamma = ctx->variant->gamma_tables[brightness];
+
+ if (ctx->version >= 142)
+ s6e8aa0_elvss_nvm_set(ctx);
+
+ s6e8aa0_dcs_write(ctx, gamma, GAMMA_TABLE_LEN);
+
+ /* update gamma table. */
+ s6e8aa0_dcs_write_seq_static(ctx, 0xf7, 0x03);
+
+ return s6e8aa0_clear_error(ctx);
+}
+
+static const struct backlight_ops s6e8aa0_backlight_ops = {
+ .update_status = s6e8aa0_set_brightness,
+};
+
+static int s6e8aa0_backlight_register(struct s6e8aa0 *ctx)
+{
+ struct backlight_properties props = {
+ .type = BACKLIGHT_RAW,
+ .brightness = MAX_BRIGHTNESS,
+ .max_brightness = MAX_BRIGHTNESS
+ };
+ struct device *dev = ctx->dev;
+ int ret = 0;
+
+ ctx->bl_dev = devm_backlight_device_register(dev, "panel", dev, ctx,
+ &s6e8aa0_backlight_ops,
+ &props);
+ if (IS_ERR(ctx->bl_dev)) {
+ ret = PTR_ERR(ctx->bl_dev);
+ DRM_DEV_ERROR(dev, "error registering backlight device (%d)\n",
+ ret);
+ }
+
+ return ret;
+}
+
static int s6e8aa0_probe(struct mipi_dsi_device *dsi)
{
struct device *dev = &dsi->dev;
@@ -1014,7 +1051,9 @@ static int s6e8aa0_probe(struct mipi_dsi_device *dsi)
return PTR_ERR(ctx->reset_gpio);
}
- ctx->brightness = GAMMA_LEVEL_NUM - 1;
+ ret = s6e8aa0_backlight_register(ctx);
+ if (ret < 0)
+ return ret;
drm_panel_init(&ctx->panel, dev, &s6e8aa0_drm_funcs,
DRM_MODE_CONNECTOR_DSI);
--
2.30.2

300
device/community/linux-postmarketos-exynos4/0005-power_supply-max77693-Listen-for-cable-events-and-en.patch
View file

@ -1,300 +0,0 @@
From 0694eec6b1da62d19cf5334471c0bce7cabfa8e2 Mon Sep 17 00:00:00 2001
From: Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de>
Date: Tue, 27 Sep 2016 00:56:37 +0200
Subject: [PATCH 05/13] power_supply: max77693: Listen for cable events and
enable charging
This patch adds a listener for extcon cable events and enables
charging if an USB cable is connected. It recognizes SDP and DCP cable
types and treats them the same (same input current and fast charge
current). The maximum input current is set before the charger is
enabled and before the charger gets disabled, the maximum input
current is set to zero. The listener is inspired by the listener
implementation that was used for the AXP288 Charger driver.
The patch also adds support for the CURRENT_NOW property. It reads the
fast charge current that gets set before the charger is enabled or
disabled.
Signed-off-by: Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de>
GNUtoo@cyberdimension.org: small fixes
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
---
drivers/power/supply/Kconfig | 2 +-
drivers/power/supply/max77693_charger.c | 177 ++++++++++++++++++++++++
2 files changed, 178 insertions(+), 1 deletion(-)
diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig
index 0bbfe6a7ce4d..2364095abf31 100644
--- a/drivers/power/supply/Kconfig
+++ b/drivers/power/supply/Kconfig
@@ -567,7 +567,7 @@ config CHARGER_MAX77650
config CHARGER_MAX77693
tristate "Maxim MAX77693 battery charger driver"
- depends on MFD_MAX77693
+ depends on MFD_MAX77693 && REGULATOR_MAX77693
help
Say Y to enable support for the Maxim MAX77693 battery charger.
diff --git a/drivers/power/supply/max77693_charger.c b/drivers/power/supply/max77693_charger.c
index a2c5c9858639..f2b5ef7df446 100644
--- a/drivers/power/supply/max77693_charger.c
+++ b/drivers/power/supply/max77693_charger.c
@@ -12,8 +12,11 @@
#include <linux/mfd/max77693.h>
#include <linux/mfd/max77693-common.h>
#include <linux/mfd/max77693-private.h>
+#include <linux/extcon.h>
+#include <linux/regulator/consumer.h>
#define MAX77693_CHARGER_NAME "max77693-charger"
+#define MAX77693_EXTCON_DEV_NAME "max77693-muic"
static const char *max77693_charger_model = "MAX77693";
static const char *max77693_charger_manufacturer = "Maxim Integrated";
@@ -21,12 +24,21 @@ struct max77693_charger {
struct device *dev;
struct max77693_dev *max77693;
struct power_supply *charger;
+ struct regulator *regu;
u32 constant_volt;
u32 min_system_volt;
u32 thermal_regulation_temp;
u32 batttery_overcurrent;
u32 charge_input_threshold_volt;
+
+ /* SDP/DCP USB charging cable notifications */
+ struct {
+ struct extcon_dev *edev;
+ bool connected;
+ struct notifier_block nb;
+ struct work_struct work;
+ } cable;
};
static int max77693_get_charger_state(struct regmap *regmap, int *val)
@@ -197,12 +209,28 @@ static int max77693_get_online(struct regmap *regmap, int *val)
return 0;
}
+int max77693_get_charge_current(struct regmap *regmap, int *val)
+{
+ unsigned int data;
+ int ret;
+
+ ret = regmap_read(regmap, MAX77693_CHG_REG_CHG_CNFG_02, &data);
+ if (ret < 0)
+ return ret;
+
+ data &= CHG_CNFG_02_CC_MASK;
+ *val = data * 333 / 10; /* 3 steps/0.1A */
+
+ return 0;
+}
+
static enum power_supply_property max77693_charger_props[] = {
POWER_SUPPLY_PROP_STATUS,
POWER_SUPPLY_PROP_CHARGE_TYPE,
POWER_SUPPLY_PROP_HEALTH,
POWER_SUPPLY_PROP_PRESENT,
POWER_SUPPLY_PROP_ONLINE,
+ POWER_SUPPLY_PROP_CURRENT_NOW,
POWER_SUPPLY_PROP_MODEL_NAME,
POWER_SUPPLY_PROP_MANUFACTURER,
};
@@ -231,6 +259,9 @@ static int max77693_charger_get_property(struct power_supply *psy,
case POWER_SUPPLY_PROP_ONLINE:
ret = max77693_get_online(regmap, &val->intval);
break;
+ case POWER_SUPPLY_PROP_CURRENT_NOW:
+ ret = max77693_get_charge_current(regmap, &val->intval);
+ break;
case POWER_SUPPLY_PROP_MODEL_NAME:
val->strval = max77693_charger_model;
break;
@@ -285,6 +316,7 @@ static ssize_t fast_charge_timer_show(struct device *dev,
data &= CHG_CNFG_01_FCHGTIME_MASK;
data >>= CHG_CNFG_01_FCHGTIME_SHIFT;
+
switch (data) {
case 0x1 ... 0x7:
/* Starting from 4 hours, step by 2 hours */
@@ -573,6 +605,102 @@ static int max77693_set_charge_input_threshold_volt(struct max77693_charger *chg
CHG_CNFG_12_VCHGINREG_MASK, data);
}
+static int max77693_enable_charger(struct max77693_charger *chg, bool enable)
+{
+ int ret;
+
+ if (enable) {
+ ret = regulator_set_current_limit(
+ chg->regu,
+ CHG_CNFG_09_CHGIN_ILIM_500_MIN,
+ CHG_CNFG_09_CHGIN_ILIM_500_MAX);
+
+ if (ret < 0)
+ return ret;
+
+ ret = regulator_enable(chg->regu);
+ if (ret < 0)
+ return ret;
+ } else {
+ /* sets fast charge current to zero */
+ ret = regulator_set_current_limit(chg->regu,
+ CHG_CNFG_09_CHGIN_ILIM_0_MIN,
+ CHG_CNFG_09_CHGIN_ILIM_0_MAX);
+ if (ret < 0)
+ return ret;
+
+ ret = regulator_disable(chg->regu);
+ if (ret < 0)
+ return ret;
+ }
+
+ return ret;
+}
+
+static void max77693_extcon_evt_worker(struct work_struct *work)
+{
+ struct max77693_charger *chg = container_of(work,
+ struct max77693_charger,
+ cable.work);
+ bool changed = false;
+ struct extcon_dev *edev = chg->cable.edev;
+ bool old_connected = chg->cable.connected;
+ bool is_charger_enabled;
+ int ret;
+
+ /* Determine cable/charger type */
+ if (extcon_get_state(edev, EXTCON_CHG_USB_SDP) ||
+ extcon_get_state(edev, EXTCON_CHG_USB_DCP)) {
+ dev_dbg(chg->dev, "USB charger is connected");
+ chg->cable.connected = true;
+ } else {
+ if (old_connected)
+ dev_dbg(chg->dev, "USB charger disconnected");
+ chg->cable.connected = false;
+ }
+
+ /* Cable status changed */
+ if (old_connected != chg->cable.connected)
+ changed = true;
+
+ if (!changed)
+ return;
+
+ if (regulator_is_enabled(chg->regu))
+ is_charger_enabled = true;
+ else
+ is_charger_enabled = false;
+
+ if (is_charger_enabled && !chg->cable.connected) {
+ ret = max77693_enable_charger(chg, false);
+ if (ret < 0) {
+ dev_err(chg->dev,
+ "failed to disable charger (%d)", ret);
+ }
+ } else if (!is_charger_enabled && chg->cable.connected) {
+ ret = max77693_enable_charger(chg, true);
+ if (ret < 0) {
+ dev_err(chg->dev,
+ "cannot enable charger (%d)", ret);
+ }
+ }
+
+ if (changed)
+ power_supply_changed(chg->charger);
+}
+
+static int max77693_handle_cable_evt(struct notifier_block *nb,
+ unsigned long event, void *param)
+{
+ struct max77693_charger *chg = container_of(nb,
+ struct max77693_charger,
+ cable.nb);
+
+ schedule_work(&chg->cable.work);
+
+ return NOTIFY_OK;
+}
+
/*
* Sets charger registers to proper and safe default values.
*/
@@ -684,6 +812,46 @@ static int max77693_charger_probe(struct platform_device *pdev)
if (ret)
return ret;
+ chg->regu = devm_regulator_get(chg->dev, "CHARGER");
+ if (IS_ERR(chg->regu)) {
+ ret = PTR_ERR(chg->regu);
+ dev_err(&pdev->dev,
+ "failed to get charger regulator %d\n", ret);
+ return ret;
+ }
+
+ chg->cable.edev = extcon_get_extcon_dev(MAX77693_EXTCON_DEV_NAME);
+ if (IS_ERR(chg->cable.edev)) {
+ dev_err_probe(&pdev->dev, PTR_ERR(chg->cable.edev),
+ "extcon_get_extcon_dev(%s) failed\n",
+ MAX77693_EXTCON_DEV_NAME);
+ return PTR_ERR(chg->cable.edev);
+ }
+
+ /* set initial value */
+ chg->cable.connected = false;
+
+ /* Register for extcon notification */
+ INIT_WORK(&chg->cable.work, max77693_extcon_evt_worker);
+ chg->cable.nb.notifier_call = max77693_handle_cable_evt;
+ ret = extcon_register_notifier(chg->cable.edev, EXTCON_CHG_USB_SDP,
+ &chg->cable.nb);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "failed to register extcon notifier for SDP %d\n", ret);
+ return ret;
+ }
+
+ ret = extcon_register_notifier(chg->cable.edev, EXTCON_CHG_USB_DCP,
+ &chg->cable.nb);
+ if (ret) {
+ dev_err(&pdev->dev,
+ "failed to register extcon notifier for DCP %d\n", ret);
+ extcon_unregister_notifier(chg->cable.edev,
+ EXTCON_CHG_USB_SDP, &chg->cable.nb);
+ return ret;
+ }
+
ret = max77693_reg_init(chg);
if (ret)
return ret;
@@ -724,6 +892,10 @@ static int max77693_charger_probe(struct platform_device *pdev)
device_remove_file(&pdev->dev, &dev_attr_top_off_timer);
device_remove_file(&pdev->dev, &dev_attr_top_off_threshold_current);
device_remove_file(&pdev->dev, &dev_attr_fast_charge_timer);
+ extcon_unregister_notifier(chg->cable.edev, EXTCON_CHG_USB_SDP,
+ &chg->cable.nb);
+ extcon_unregister_notifier(chg->cable.edev, EXTCON_CHG_USB_DCP,
+ &chg->cable.nb);
return ret;
}
@@ -736,6 +908,11 @@ static int max77693_charger_remove(struct platform_device *pdev)
device_remove_file(&pdev->dev, &dev_attr_top_off_threshold_current);
device_remove_file(&pdev->dev, &dev_attr_fast_charge_timer);
+ extcon_unregister_notifier(chg->cable.edev, EXTCON_CHG_USB_SDP,
+ &chg->cable.nb);
+ extcon_unregister_notifier(chg->cable.edev, EXTCON_CHG_USB_DCP,
+ &chg->cable.nb);
+
power_supply_unregister(chg->charger);
return 0;
--
2.30.2

44
device/community/linux-postmarketos-exynos4/0006-mfd-max77693-Add-defines-for-charger-current-control.patch
View file

@ -1,44 +0,0 @@
From 44b7e1cb569c6bd3b2ef30304dac8fff80414506 Mon Sep 17 00:00:00 2001
From: Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de>
Date: Mon, 26 Sep 2016 23:33:05 +0200
Subject: [PATCH 06/13] mfd: max77693: Add defines for charger current control
This prepares for an updated regulator and charger driver. The defines
are needed to set the maximum input current and the fast charge
current.
Signed-off-by: Wolfgang Wiedmeyer <wolfgit@wiedmeyer.de>
GNUtoo@cyberdimension.org: small fix
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@cyberdimension.org>
---
include/linux/mfd/max77693-private.h | 7 +++++++
1 file changed, 7 insertions(+)
diff --git a/include/linux/mfd/max77693-private.h b/include/linux/mfd/max77693-private.h
index 311f7d3d2323..f6df8bafe996 100644
--- a/include/linux/mfd/max77693-private.h
+++ b/include/linux/mfd/max77693-private.h
@@ -217,6 +217,9 @@ enum max77693_charger_battery_state {
#define CHG_CNFG_01_CHGRSTRT_MASK (0x3 << CHG_CNFG_01_CHGRSTRT_SHIFT)
#define CHG_CNFG_01_PQEN_MAKS BIT(CHG_CNFG_01_PQEN_SHIFT)
+/* MAX77693_CHG_REG_CHG_CNFG_02 register */
+#define CHG_CNFG_02_CC_MASK 0x3F
+
/* MAX77693_CHG_REG_CHG_CNFG_03 register */
#define CHG_CNFG_03_TOITH_SHIFT 0
#define CHG_CNFG_03_TOTIME_SHIFT 3
@@ -245,6 +248,10 @@ enum max77693_charger_battery_state {
/* MAX77693 CHG_CNFG_09 Register */
#define CHG_CNFG_09_CHGIN_ILIM_MASK 0x7F
+#define CHG_CNFG_09_CHGIN_ILIM_500_MAX 500000
+#define CHG_CNFG_09_CHGIN_ILIM_500_MIN 470000
+#define CHG_CNFG_09_CHGIN_ILIM_0_MAX 60000
+#define CHG_CNFG_09_CHGIN_ILIM_0_MIN 0
/* MAX77693 CHG_CTRL Register */
#define SAFEOUT_CTRL_SAFEOUT1_MASK 0x3
--
2.30.2

26
device/community/linux-postmarketos-exynos4/0007-power_supply-max77693-change-the-supply-type-to-POWE.patch
View file

@ -1,26 +0,0 @@
From 5e23168b43df9f888bab09090d8d9df868cf8d24 Mon Sep 17 00:00:00 2001
From: Shilin Victor <chrono.monochrome@gmail.com>
Date: Fri, 19 Mar 2021 19:10:37 +0300
Subject: [PATCH 07/13] power_supply: max77693: change the supply type to
POWER_SUPPLY_TYPE_MAINS
---
drivers/power/supply/max77693_charger.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/power/supply/max77693_charger.c b/drivers/power/supply/max77693_charger.c
index f2b5ef7df446..3962701989e5 100644
--- a/drivers/power/supply/max77693_charger.c
+++ b/drivers/power/supply/max77693_charger.c
@@ -277,7 +277,7 @@ static int max77693_charger_get_property(struct power_supply *psy,
static const struct power_supply_desc max77693_charger_desc = {
.name = MAX77693_CHARGER_NAME,
- .type = POWER_SUPPLY_TYPE_BATTERY,
+ .type = POWER_SUPPLY_TYPE_MAINS,
.properties = max77693_charger_props,
.num_properties = ARRAY_SIZE(max77693_charger_props),
.get_property = max77693_charger_get_property,
--
2.30.2

112
device/community/linux-postmarketos-exynos4/0008-samsung-t0lte-add-leds.patch
View file

@ -1,112 +0,0 @@
From b582d2cc9352ba4dc5679e74eb8e1f25ee7f6f0f Mon Sep 17 00:00:00 2001
From: Jack Knightly <J__A__K@hotmail.com>
Date: Fri, 14 Oct 2022 20:59:44 +0200
Subject: [PATCH 08/13] samsung-t0lte: add leds
Adds flash/torch LED for samsung-t0lte
AND notification LED to t0lte and other midas devices (samsung-m0,
samsung-m3).
---
arch/arm/boot/dts/exynos4412-midas.dtsi | 37 ++++++++++++++++++++++++-
arch/arm/boot/dts/exynos4412-n710x.dts | 15 ++++++++++
2 files changed, 51 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/exynos4412-midas.dtsi b/arch/arm/boot/dts/exynos4412-midas.dtsi
index 1f9cd7474b16..3d6faa222f1d 100644
--- a/arch/arm/boot/dts/exynos4412-midas.dtsi
+++ b/arch/arm/boot/dts/exynos4412-midas.dtsi
@@ -18,6 +18,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/clock/maxim,max77686.h>
#include "exynos-pinctrl.h"
+#include <dt-bindings/leds/common.h>
/ {
compatible = "samsung,midas", "samsung,exynos4412", "samsung,exynos4";
@@ -25,6 +26,7 @@ / {
aliases {
i2c11 = &i2c_max77693;
i2c12 = &i2c_max77693_fuel;
+ i2c13 = &i2c_an30259a;
};
chosen {
@@ -171,7 +173,7 @@ i2c_max77693: i2c-gpio-1 {
#address-cells = <1>;
#size-cells = <0>;
- pmic@66 {
+ max77693_pmic: pmic@66 {
compatible = "maxim,max77693";
interrupt-parent = <&gpx1>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
@@ -251,6 +253,39 @@ touchkey@20 {
};
};
+ i2c_an30259a: i2c-gpio-5 {
+ compatible = "i2c-gpio";
+ gpios = <&gpf2 7 GPIO_ACTIVE_HIGH>, <&gpf2 6 GPIO_ACTIVE_HIGH>;
+ i2c-gpio,delay-us = <2>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led-controller@30 {
+ compatible = "panasonic,an30259a";
+ reg = <0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@1 {
+ reg = <1>;
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_RED>;
+ };
+
+ led@2 {
+ reg = <2>;
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_GREEN>;
+ };
+
+ led@3 {
+ reg = <3>;
+ function = LED_FUNCTION_STATUS;
+ color = <LED_COLOR_ID_BLUE>;
+ };
+ };
+ };
+
i2c-mhl {
compatible = "i2c-gpio";
sda-gpios = <&gpf0 4 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
diff --git a/arch/arm/boot/dts/exynos4412-n710x.dts b/arch/arm/boot/dts/exynos4412-n710x.dts
index 9ae05b0d684c..5f2888816e4a 100644
--- a/arch/arm/boot/dts/exynos4412-n710x.dts
+++ b/arch/arm/boot/dts/exynos4412-n710x.dts
@@ -69,6 +69,21 @@ &ldo25_reg {
regulator-max-microvolt = <3000000>;
};
+&max77693_pmic {
+ led {
+ compatible = "maxim,max77693-led";
+ maxim,boost-mode = <LEDS_BOOST_ADAPTIVE>;
+ maxim,boost-mvout = <5000>;
+ camera-flash {
+ label = "white:flash";
+ led-sources = <0>, <1>;
+ led-max-microamp = <140625>;
+ flash-max-microamp = <500000>;
+ flash-max-timeout-us = <500000>;
+ };
+ };
+};
+
&s5c73m3 {
standby-gpios = <&gpm0 6 GPIO_ACTIVE_LOW>; /* ISP_STANDBY */
vdda-supply = <&cam_vdda_reg>;
--
2.30.2

817
device/community/linux-postmarketos-exynos4/0009-drm-panel-add-S6EVR02-panel-driver.patch
View file

@ -1,817 +0,0 @@
From e1172d70d3a3eb4f174c73503202d6351a16608d Mon Sep 17 00:00:00 2001
From: Simon Shields <simon@lineageos.org>
Date: Thu, 16 Nov 2017 22:29:35 +1100
Subject: [PATCH 09/13] drm: panel: add S6EVR02 panel driver
Gamma table values have been dumped from vendor kernel based on
Linux 3.0.
[ bring up to 5.17.4 and squash with backlight addition patch ]
Signed-off-by: Jack Knightly <J__A__K@hotmail.com>
---
drivers/gpu/drm/panel/Kconfig | 6 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-samsung-s6evr02.c | 762 ++++++++++++++++++
3 files changed, 769 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-samsung-s6evr02.c
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index a582ddd583c2..5ae25fe5bbb9 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -537,6 +537,12 @@ config DRM_PANEL_SAMSUNG_S6E8AA0
select DRM_MIPI_DSI
select VIDEOMODE_HELPERS
+config DRM_PANEL_SAMSUNG_S6EVR02
+ tristate "Samsung S6EVR02 DSI video mode panel"
+ depends on OF
+ select DRM_MIPI_DSI
+ select VIDEOMODE_HELPERS
+
config DRM_PANEL_SAMSUNG_SOFEF00
tristate "Samsung sofef00/s6e3fc2x01 OnePlus 6/6T DSI cmd mode panels"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index 34e717382dbb..b3d149475a38 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -54,6 +54,7 @@ obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_SPI) += panel-samsung-s6e63m0-spi.o
obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E63M0_DSI) += panel-samsung-s6e63m0-dsi.o
obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E88A0_AMS452EF01) += panel-samsung-s6e88a0-ams452ef01.o
obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6E8AA0) += panel-samsung-s6e8aa0.o
+obj-$(CONFIG_DRM_PANEL_SAMSUNG_S6EVR02) += panel-samsung-s6evr02.o
obj-$(CONFIG_DRM_PANEL_SAMSUNG_SOFEF00) += panel-samsung-sofef00.o
obj-$(CONFIG_DRM_PANEL_SEIKO_43WVF1G) += panel-seiko-43wvf1g.o
obj-$(CONFIG_DRM_PANEL_SHARP_LQ101R1SX01) += panel-sharp-lq101r1sx01.o
diff --git a/drivers/gpu/drm/panel/panel-samsung-s6evr02.c b/drivers/gpu/drm/panel/panel-samsung-s6evr02.c
new file mode 100644
index 000000000000..037b4364cdd4
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-samsung-s6evr02.c
@@ -0,0 +1,762 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * MIPI-DSI based S6EVR02 AMOLED LCD 5.5 inch panel driver.
+ *
+ * Copyright (c) 2017 Simon Shields, <simon@lineageos.org>
+ *
+ * Based on the s6e8aa0 panel driver,
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd
+ *
+ * Inki Dae, <inki.dae@samsung.com>
+ * Donghwa Lee, <dh09.lee@samsung.com>
+ * Joongmock Shin <jmock.shin@samsung.com>
+ * Eunchul Kim <chulspro.kim@samsung.com>
+ * Tomasz Figa <t.figa@samsung.com>
+ * Andrzej Hajda <a.hajda@samsung.com>
+*/
+
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/regulator/consumer.h>
+
+#include <linux/backlight.h>
+#include <video/mipi_display.h>
+#include <video/of_videomode.h>
+#include <video/videomode.h>
+
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+
+#define UB_VERSION 0x10
+
+#define LDI_MTP_LENGTH 24
+#define GAMMA_LEVEL_NUM 33
+#define GAMMA_TABLE_LEN 34
+
+typedef u8 s6evr02_gamma_table[GAMMA_TABLE_LEN];
+
+#define S6EVR02_STATE_BIT_ENABLED 0
+
+struct s6evr02 {
+ struct device *dev;
+ struct drm_panel panel;
+
+ struct regulator_bulk_data supplies[2];
+ struct gpio_desc *reset_gpio;
+ u32 power_on_delay;
+ u32 reset_delay;
+ u32 init_delay;
+ struct videomode vm;
+ u32 width_mm;
+ u32 height_mm;
+
+ unsigned long state;
+ u8 version;
+ u8 id;
+ int brightness;
+
+ /* This field is tested by functions directly accessing DSI bus before
+ * transfer, transfer is skipped if it is set. In case of transfer
+ * failure or unexpected response the field is set to error value.
+ * Such construct allows to eliminate many checks in higher level
+ * functions.
+ */
+ int error;
+};
+
+static const s6evr02_gamma_table s6evr02_gamma_tables[GAMMA_LEVEL_NUM] = {
+ {
+ /* 20cd */
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x86, 0x87, 0x87,
+ 0x86, 0x86, 0x85, 0x88, 0x8a, 0x88, 0x86, 0x85, 0x88, 0x75,
+ 0x63, 0x83, 0x63, 0x60, 0x7d, 0x78, 0x85, 0xb8, 0x33, 0x3f,
+ 0x2c, 0x02, 0x03, 0x02
+ }, {
+ /* 30cd */
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x86, 0x87, 0x87,
+ 0x86, 0x85, 0x84, 0x88, 0x8a, 0x87, 0x85, 0x84, 0x87, 0x80,
+ 0x76, 0x85, 0x68, 0x60, 0x76, 0x78, 0x85, 0xb0, 0x33, 0x3f,
+ 0x2c, 0x02, 0x03, 0x02
+ }, {
+ /* 40cd */
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x85, 0x86, 0x87,
+ 0x86, 0x86, 0x85, 0x87, 0x88, 0x86, 0x86, 0x85, 0x89, 0x80,
+ 0x80, 0x83, 0x6a, 0x5c, 0x71, 0x77, 0x81, 0xaa, 0x37, 0x45,
+ 0x2f, 0x02, 0x03, 0x02
+ }, {
+ /* 50cd */
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x85, 0x86, 0x87,
+ 0x85, 0x85, 0x84, 0x88, 0x89, 0x87, 0x84, 0x82, 0x86, 0x83,
+ 0x84, 0x85, 0x6f, 0x63, 0x71, 0x7d, 0x81, 0xa5, 0x37, 0x45,
+ 0x2f, 0x02, 0x03, 0x02
+ }, {
+ /* 60cd */
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x85, 0x86, 0x87,
+ 0x85, 0x85, 0x84, 0x86, 0x88, 0x85, 0x83, 0x81, 0x85, 0x81,
+ 0x80, 0x83, 0x77, 0x69, 0x76, 0x7f, 0x81, 0xa0, 0x37, 0x45,
+ 0x2f, 0x02, 0x03, 0x02
+ }, {
+ /* 70cd */
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x84, 0x85, 0x86,
+ 0x85, 0x85, 0x84, 0x87, 0x89, 0x87, 0x83, 0x81, 0x85, 0x81,
+ 0x80, 0x83, 0x71, 0x64, 0x6f, 0x89, 0x88, 0xa3, 0x37, 0x45,
+ 0x2f, 0x02, 0x03, 0x02
+ }, {
+ /* 80cd */
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x84, 0x85, 0x86,
+ 0x85, 0x85, 0x84, 0x86, 0x87, 0x85, 0x84, 0x82, 0x87, 0x81,
+ 0x80, 0x83, 0x73, 0x66, 0x6f, 0x8a, 0x88, 0xa0, 0x37, 0x45,
+ 0x2f, 0x02, 0x03, 0x02
+ }, {
+ /* 90cd */
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x84, 0x85, 0x86,
+ 0x85, 0x85, 0x84, 0x86, 0x87, 0x85, 0x81, 0x7f, 0x85, 0x7e,
+ 0x7c, 0x80, 0x7a, 0x6d, 0x75, 0x8b, 0x88, 0x9e, 0x37, 0x45,
+ 0x2f, 0x02, 0x03, 0x02
+ }, {
+ /* 100cd */
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x84, 0x85, 0x86,
+ 0x84, 0x83, 0x83, 0x87, 0x88, 0x86, 0x81, 0x7f, 0x85, 0x7e,
+ 0x7c, 0x80, 0x7a, 0x70, 0x75, 0x86, 0x7d, 0x98, 0x3b, 0x4b,
+ 0x33, 0x02, 0x03, 0x02
+ }, {
+ /* 102cd */
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x84, 0x85, 0x86,
+ 0x85, 0x85, 0x84, 0x86, 0x87, 0x85, 0x81, 0x7f, 0x85, 0x7e,
+ 0x7c, 0x80, 0x7a, 0x70, 0x75, 0x94, 0x93, 0xa1, 0x33, 0x3f,
+ 0x2c, 0x02, 0x03, 0x02
+ }, {
+ /* 104cd */
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x84, 0x85, 0x86,
+ 0x85, 0x85, 0x84, 0x86, 0x87, 0x85, 0x84, 0x82, 0x87, 0x81,
+ 0x80, 0x83, 0x74, 0x6a, 0x6f, 0x94, 0x92, 0xa7, 0x33, 0x3f,
+ 0x2c, 0x02, 0x03, 0x02
+ }, {
+ /* 106cd */
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x84, 0x85, 0x86,
+ 0x85, 0x85, 0x84, 0x87, 0x89, 0x87, 0x83, 0x81, 0x85, 0x81,
+ 0x80, 0x83, 0x74, 0x6a, 0x6f, 0x95, 0x92, 0x9d, 0x33, 0x3f,
+ 0x2c, 0x02, 0x03, 0x02
+ }, {
+ /* 108cd */
+ 0xca, 0x00, 0xc1, 0x00, 0xba, 0x00, 0xbb, 0x85, 0x86, 0x87,
+ 0x84, 0x84, 0x83, 0x87, 0x89, 0x87, 0x83, 0x81, 0x85, 0x81,
+ 0x80, 0x83, 0x74, 0x6a, 0x6f, 0x95, 0x91, 0x9d, 0x33, 0x3f,
+ 0x2c, 0x02, 0x03, 0x02
+ }, {
+ /* 110cd */
+ 0xca, 0x00, 0xd8, 0x00, 0xd4, 0x00, 0xd3, 0x82, 0x84, 0x85,
+ 0x82, 0x82, 0x81, 0x84, 0x85, 0x84, 0x82, 0x80, 0x83, 0x81,
+ 0x82, 0x83, 0x7b, 0x75, 0x78, 0x85, 0x80, 0x8e, 0x2f, 0x39,
+ 0x29, 0x02, 0x03, 0x02
+ }, {
+ /* 120cd */
+ 0xca, 0x00, 0xdf, 0x00, 0xdb, 0x00, 0xda, 0x82, 0x83, 0x84,
+ 0x81, 0x81, 0x80, 0x83, 0x83, 0x82, 0x82, 0x81, 0x83, 0x80,
+ 0x80, 0x82, 0x7e, 0x7a, 0x7b, 0x86, 0x83, 0x8d, 0x2b, 0x34,
+ 0x27, 0x02, 0x03, 0x02
+ }, {
+ /* 130cd */
+ 0xca, 0x00, 0xe4, 0x00, 0xe0, 0x00, 0xe0, 0x82, 0x83, 0x84,
+ 0x81, 0x80, 0x7f, 0x82, 0x82, 0x81, 0x83, 0x82, 0x84, 0x7e,
+ 0x7f, 0x80, 0x7b, 0x76, 0x79, 0x86, 0x83, 0x8d, 0x2b, 0x34,
+ 0x27, 0x02, 0x03, 0x02
+ }, {
+ /* 140cd */
+ 0xca, 0x00, 0xe8, 0x00, 0xe5, 0x00, 0xe5, 0x81, 0x82, 0x82,
+ 0x80, 0x80, 0x7f, 0x82, 0x82, 0x82, 0x81, 0x80, 0x82, 0x7f,
+ 0x7f, 0x81, 0x7e, 0x7a, 0x7c, 0x81, 0x7d, 0x88, 0x2b, 0x34,
+ 0x27, 0x02, 0x03, 0x02
+ }, {
+ /* 150cd */
+ 0xca, 0x00, 0xec, 0x00, 0xea, 0x00, 0xe9, 0x81, 0x82, 0x82,
+ 0x80, 0x80, 0x7f, 0x81, 0x82, 0x81, 0x81, 0x80, 0x81, 0x80,
+ 0x80, 0x81, 0x7a, 0x77, 0x79, 0x87, 0x86, 0x8d, 0x84, 0x86,
+ 0x83, 0x02, 0x03, 0x02
+ }, {
+ /* 160cd */
+ 0xca, 0x00, 0xf1, 0x00, 0xef, 0x00, 0xef, 0x80, 0x80, 0x81,
+ 0x80, 0x80, 0x7f, 0x80, 0x81, 0x80, 0x82, 0x81, 0x82, 0x7f,
+ 0x7f, 0x7f, 0x7d, 0x7b, 0x7c, 0x82, 0x80, 0x88, 0x84, 0x86,
+ 0x83, 0x02, 0x03, 0x02
+ }, {
+ /* 170cd */
+ 0xca, 0x00, 0xf5, 0x00, 0xf3, 0x00, 0xf3, 0x80, 0x80, 0x81,
+ 0x7f, 0x7f, 0x7f, 0x82, 0x82, 0x82, 0x80, 0x80, 0x80, 0x80,
+ 0x80, 0x80, 0x80, 0x7f, 0x7f, 0x7d, 0x7b, 0x83, 0x84, 0x86,
+ 0x83, 0x02, 0x03, 0x02
+ }, {
+ /* 180cd */
+ 0xca, 0x00, 0xf9, 0x00, 0xf8, 0x00, 0xf8, 0x80, 0x80, 0x80,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x80, 0x80, 0x81, 0x80, 0x81, 0x81,
+ 0x81, 0x81, 0x7d, 0x7c, 0x7d, 0x83, 0x83, 0x87, 0x7f, 0x7f,
+ 0x7f, 0x02, 0x03, 0x02
+ }, {
+ /* 182cd */
+ 0xca, 0x00, 0xf2, 0x00, 0xf1, 0x00, 0xf0, 0x80, 0x81, 0x81,
+ 0x80, 0x7f, 0x7f, 0x81, 0x81, 0x81, 0x81, 0x80, 0x81, 0x7f,
+ 0x7f, 0x7f, 0x7d, 0x7b, 0x7c, 0x83, 0x81, 0x87, 0x84, 0x86,
+ 0x83, 0x02, 0x03, 0x02
+ }, {
+ /* 184cd */
+ 0xca, 0x00, 0xec, 0x00, 0xea, 0x00, 0xe9, 0x81, 0x82, 0x82,
+ 0x7f, 0x7f, 0x7f, 0x81, 0x81, 0x81, 0x82, 0x81, 0x83, 0x7d,
+ 0x7d, 0x7f, 0x7e, 0x7a, 0x7c, 0x82, 0x7f, 0x86, 0x2b, 0x34,
+ 0x27, 0x02, 0x03, 0x02
+ }, {
+ /* 186cd */
+ 0xca, 0x00, 0xe8, 0x00, 0xe4, 0x00, 0xe4, 0x81, 0x82, 0x83,
+ 0x80, 0x80, 0x7f, 0x82, 0x82, 0x81, 0x80, 0x80, 0x81, 0x7e,
+ 0x7f, 0x80, 0x7b, 0x76, 0x79, 0x87, 0x85, 0x8a, 0x2b, 0x34,
+ 0x27, 0x02, 0x03, 0x02
+ }, {
+ /* 188cd */
+ 0xca, 0x00, 0xe4, 0x00, 0xe0, 0x00, 0xe0, 0x81, 0x82, 0x83,
+ 0x80, 0x80, 0x7f, 0x81, 0x82, 0x81, 0x80, 0x7f, 0x82, 0x80,
+ 0x80, 0x82, 0x78, 0x72, 0x75, 0x8c, 0x8b, 0x90, 0x2b, 0x34,
+ 0x27, 0x02, 0x03, 0x02
+ }, {
+ /* 190cd */
+ 0xca, 0x00, 0xde, 0x00, 0xda, 0x00, 0xda, 0x81, 0x82, 0x83,
+ 0x81, 0x81, 0x80, 0x83, 0x84, 0x82, 0x81, 0x80, 0x83, 0x7f,
+ 0x7f, 0x81, 0x7b, 0x75, 0x78, 0x86, 0x82, 0x8b, 0x2f, 0x39,
+ 0x29, 0x02, 0x03, 0x02
+ }, {
+ /* 200cd */
+ 0xca, 0x00, 0xe3, 0x00, 0xdf, 0x00, 0xdf, 0x81, 0x82, 0x83,
+ 0x80, 0x80, 0x7f, 0x81, 0x82, 0x81, 0x82, 0x81, 0x83, 0x80,
+ 0x80, 0x82, 0x78, 0x72, 0x75, 0x86, 0x82, 0x8b, 0x2f, 0x39,
+ 0x29, 0x02, 0x03, 0x02
+ }, {
+ /* 210cd */
+ 0xca, 0x00, 0xe6, 0x00, 0xe3, 0x00, 0xe3, 0x81, 0x82, 0x82,
+ 0x80, 0x7f, 0x7f, 0x81, 0x81, 0x81, 0x81, 0x80, 0x82, 0x7d,
+ 0x7e, 0x7f, 0x7e, 0x7a, 0x7b, 0x87, 0x85, 0x8a, 0x2b, 0x34,
+ 0x27, 0x02, 0x03, 0x02
+ }, {
+ /* 220cd */
+ 0xca, 0x00, 0xea, 0x00, 0xe7, 0x00, 0xe6, 0x80, 0x80, 0x81,
+ 0x80, 0x80, 0x7f, 0x81, 0x81, 0x81, 0x80, 0x80, 0x81, 0x7e,
+ 0x7f, 0x80, 0x7b, 0x76, 0x79, 0x87, 0x85, 0x8a, 0x2b, 0x34,
+ 0x27, 0x02, 0x03, 0x02
+ }, {
+ /* 230cd */
+ 0xca, 0x00, 0xec, 0x00, 0xea, 0x00, 0xe9, 0x80, 0x81, 0x82,
+ 0x7f, 0x7f, 0x7f, 0x80, 0x81, 0x80, 0x81, 0x80, 0x82, 0x7f,
+ 0x7f, 0x81, 0x78, 0x73, 0x76, 0x87, 0x85, 0x8a, 0x2b, 0x34,
+ 0x27, 0x02, 0x03, 0x02
+ }, {
+ /* 240cd */
+ 0xca, 0x00, 0xef, 0x00, 0xed, 0x00, 0xed, 0x80, 0x80, 0x81,
+ 0x80, 0x7f, 0x7f, 0x80, 0x81, 0x80, 0x7e, 0x7e, 0x7f, 0x7f,
+ 0x7f, 0x81, 0x7e, 0x7a, 0x7c, 0x82, 0x7f, 0x85, 0x2b, 0x34,
+ 0x27, 0x02, 0x03, 0x02
+ }, {
+ /* 250cd */
+ 0xca, 0x00, 0xf2, 0x00, 0xf1, 0x00, 0xf0, 0x80, 0x80, 0x81,
+ 0x7e, 0x7e, 0x7e, 0x80, 0x80, 0x80, 0x7f, 0x7f, 0x80, 0x80,
+ 0x80, 0x81, 0x7a, 0x77, 0x79, 0x82, 0x7f, 0x85, 0x2b, 0x34,
+ 0x27, 0x02, 0x03, 0x02
+ }, {
+ /* 300cd */
+ 0xca, 0x00, 0xff, 0x00, 0xff, 0x00, 0xff, 0x80, 0x7f, 0x7f,
+ 0x7e, 0x7e, 0x7e, 0x7f, 0x7f, 0x7f, 0x7f, 0x80, 0x7f, 0x7f,
+ 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x80, 0x7f, 0x7f, 0x7f,
+ 0x7f, 0x02, 0x03, 0x02
+ },
+};
+
+static inline struct s6evr02 *panel_to_s6evr02(struct drm_panel *panel)
+{
+ return container_of(panel, struct s6evr02, panel);
+}
+
+static int s6evr02_clear_error(struct s6evr02 *ctx)
+{
+ int ret = ctx->error;
+
+ ctx->error = 0;
+ return ret;
+}
+
+static void s6evr02_dcs_write(struct s6evr02 *ctx, const void *data, size_t len)
+{
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ ssize_t ret;
+
+ if (ctx->error < 0)
+ return;
+
+ ret = mipi_dsi_dcs_write_buffer(dsi, data, len);
+ if (ret < 0) {
+ dev_err(ctx->dev, "error %zd writing dcs seq: %*ph\n", ret,
+ (int)len, data);
+ ctx->error = ret;
+ }
+}
+
+static int s6evr02_read(struct s6evr02 *ctx, u8 cmd, void *data, size_t len)
+{
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int ret;
+
+ if (ctx->error < 0)
+ return ctx->error;
+
+ ret = mipi_dsi_generic_read(dsi, &cmd, 1, data, len);
+ if (ret < 0) {
+ dev_err(ctx->dev, "error %d reading dcs seq(%#x)\n", ret, cmd);
+ ctx->error = ret;
+ }
+
+ return ret;
+}
+
+#define s6evr02_dcs_write_seq_static(ctx, seq...) \
+({\
+ static const u8 d[] = { seq };\
+ s6evr02_dcs_write(ctx, d, ARRAY_SIZE(d));\
+})
+
+static void s6evr02_apply_level_2_key(struct s6evr02 *ctx)
+{
+ s6evr02_dcs_write_seq_static(ctx, 0xf0, 0x5a, 0x5a);
+}
+
+static void s6evr02_etc_elvss_control(struct s6evr02 *ctx)
+{
+ s6evr02_dcs_write_seq_static(ctx, 0xb6, 0x08, 0x07);
+}
+
+static void s6evr02_aid_set(struct s6evr02 *ctx)
+{
+ u8 aid_cmd[] = {
+ 0x51, 0xff, 0x00,
+ };
+
+ const u8 aid_arg[GAMMA_LEVEL_NUM] = {
+ 0x28, 0x3c, 0x51, 0x66, 0x7d, 0x93, 0xab, 0xc2, /* 20-90cd */
+ 0xda, 0xcd, 0xc0, 0xb3, 0xa6, 0x99, 0x99, 0x99, /* 100-130cd */
+ 0x99, 0x99, 0x99, 0x99, 0x99, 0xad, 0xc2, 0xd6, /* 140-186cd */
+ 0xea, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 188-250cd */
+ 0xff, /* 300cd */
+ };
+
+ if (ctx->error)
+ return;
+
+ aid_cmd[2] = aid_arg[ctx->brightness];
+
+ s6evr02_dcs_write(ctx, aid_cmd, ARRAY_SIZE(aid_cmd));
+}
+
+static void s6evr02_acl_set(struct s6evr02 *ctx)
+{
+ u8 acl_seq[] = {0x55, 0x02, 0x00};
+ if (ctx->error)
+ return;
+
+ switch (ctx->brightness) {
+ case 0:
+ acl_seq[1] = 0x00;
+ break;
+ case 1:
+ acl_seq[1] = 0x01;
+ break;
+ }
+
+ s6evr02_dcs_write(ctx, acl_seq, ARRAY_SIZE(acl_seq));
+}
+
+static void s6evr02_elvss_set(struct s6evr02 *ctx)
+{
+ u8 elvss_cmd[] = {
+ 0xb6, 0x08, 0x00,
+ };
+
+ const u8 elvss_arg[GAMMA_LEVEL_NUM] = {
+ 0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1f, 0x1e, 0x1c, /* 20-100cd */
+ 0x1c, 0x1c, 0x1c, 0x1c, 0x1b, 0x19, 0x17, 0x16, /* 102-140cd */
+ 0x14, 0x12, 0x10, 0x0f, 0x0f, 0x0f, 0x0f, 0x0f, /* 150-188cd */
+ 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x10, 0x0b, /* 190-300cd */
+ };
+
+ if (ctx->error)
+ return;
+
+ elvss_cmd[2] = elvss_arg[ctx->brightness];
+
+ s6evr02_dcs_write(ctx, elvss_cmd, ARRAY_SIZE(elvss_cmd));
+}
+
+
+static void s6evr02_brightness_set(struct s6evr02 *ctx)
+{
+ const u8 *gamma;
+
+ if (ctx->error)
+ return;
+
+ gamma = s6evr02_gamma_tables[ctx->brightness];
+
+ s6evr02_dcs_write(ctx, gamma, GAMMA_TABLE_LEN);
+
+ /* apply gamma table update. */
+ s6evr02_dcs_write_seq_static(ctx, 0xf7, 0x03, 0x00);
+
+ s6evr02_aid_set(ctx);
+ s6evr02_acl_set(ctx);
+ s6evr02_elvss_set(ctx);
+}
+
+static void s6evr02_gamma_cond_set(struct s6evr02 *ctx)
+{
+ s6evr02_dcs_write_seq_static(ctx,
+ 0xca, 0x01, 0x27, 0x01, 0x3d, 0x01, 0x47, 0xd1, 0xd7, 0xd1,
+ 0xca, 0xce, 0xcc, 0xc4, 0xb3, 0xb1, 0xa1, 0xb9, 0xb8, 0xa2,
+ 0xce, 0xba, 0xc8, 0xc9, 0xad, 0x9b, 0x85, 0x53, 0x6a, 0x7e,
+ 0xe3, 0x09, 0x09, 0x0b);
+}
+
+static void s6evr02_gamma_update(struct s6evr02 *ctx)
+{
+ s6evr02_dcs_write_seq_static(ctx, 0xf7, 0x03, 0x00);
+}
+
+static void s6evr02_brightness_control_on(struct s6evr02 *ctx)
+{
+ s6evr02_dcs_write_seq_static(ctx, 0x53, 0x20, 0x00);
+}
+
+static void s6evr02_aor_control(struct s6evr02 *ctx)
+{
+ s6evr02_dcs_write_seq_static(ctx, 0x51, 0xff, 0x00);
+}
+
+static void s6evr02_acl_off(struct s6evr02 *ctx)
+{
+ s6evr02_dcs_write_seq_static(ctx, 0x55, 0x00, 0x00);
+}
+
+static void s6evr02_panel_init(struct s6evr02 *ctx)
+{
+ s6evr02_apply_level_2_key(ctx);
+ s6evr02_dcs_write_seq_static(ctx, MIPI_DCS_EXIT_SLEEP_MODE);
+ msleep(20);
+
+ if (ctx->version == UB_VERSION) {
+ s6evr02_gamma_cond_set(ctx);
+ s6evr02_gamma_update(ctx);
+ }
+
+ s6evr02_brightness_control_on(ctx);
+ s6evr02_aor_control(ctx);
+ s6evr02_etc_elvss_control(ctx);
+ s6evr02_acl_off(ctx);
+}
+
+static void s6evr02_set_maximum_return_packet_size(struct s6evr02 *ctx,
+ u16 size)
+{
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int ret;
+
+ if (ctx->error < 0)
+ return;
+
+ ret = mipi_dsi_set_maximum_return_packet_size(dsi, size);
+ if (ret < 0) {
+ dev_err(ctx->dev,
+ "error %d setting maximum return packet size to %d\n",
+ ret, size);
+ ctx->error = ret;
+ }
+}
+
+static void s6evr02_read_mtp_id(struct s6evr02 *ctx)
+{
+ u8 id[3] = {0, 0, 0};
+ int ret;
+
+ /* the panel seems not to respond properly
+ * to read commands until we write something to it
+ */
+ s6evr02_apply_level_2_key(ctx);
+
+ ret = s6evr02_read(ctx, 0xd7, id, ARRAY_SIZE(id));
+ if (ret < 0 || ret < ARRAY_SIZE(id) || id[0] == 0x00) {
+ dev_err(ctx->dev, "failed to read ID from panel\n");
+ ctx->error = -EIO;
+ return;
+ }
+
+ dev_info(ctx->dev, "ID: 0x%2x, 0x%2x, 0x%2x\n", id[0], id[1], id[2]);
+
+ ctx->version = id[1];
+ ctx->id = id[2];
+}
+
+static void s6evr02_set_sequence(struct s6evr02 *ctx)
+{
+ s6evr02_set_maximum_return_packet_size(ctx, 3);
+ s6evr02_read_mtp_id(ctx);
+ s6evr02_panel_init(ctx);
+ s6evr02_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_ON);
+}
+
+static int s6evr02_power_on(struct s6evr02 *ctx)
+{
+ int ret;
+
+ ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
+ if (ret < 0)
+ return ret;
+
+ msleep(ctx->power_on_delay);
+
+ gpiod_set_value(ctx->reset_gpio, 0);
+ usleep_range(5000, 6000);
+ gpiod_set_value(ctx->reset_gpio, 1);
+ usleep_range(5000, 6000);
+
+ msleep(ctx->reset_delay);
+
+ return 0;
+}
+
+static int s6evr02_power_off(struct s6evr02 *ctx)
+{
+ return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
+}
+
+static int s6evr02_disable(struct drm_panel *panel)
+{
+ return 0;
+}
+
+static int s6evr02_unprepare(struct drm_panel *panel)
+{
+ struct s6evr02 *ctx = panel_to_s6evr02(panel);
+
+ clear_bit(S6EVR02_STATE_BIT_ENABLED, &ctx->state);
+ s6evr02_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_OFF);
+ s6evr02_dcs_write_seq_static(ctx, MIPI_DCS_ENTER_SLEEP_MODE);
+ msleep(40);
+
+ s6evr02_clear_error(ctx);
+
+ return s6evr02_power_off(ctx);
+}
+
+static int s6evr02_prepare(struct drm_panel *panel)
+{
+ struct s6evr02 *ctx = panel_to_s6evr02(panel);
+ int ret;
+
+ ret = s6evr02_power_on(ctx);
+ if (ret < 0)
+ return ret;
+
+ s6evr02_set_sequence(ctx);
+ ret = ctx->error;
+
+ if (ret < 0)
+ s6evr02_unprepare(panel);
+ else
+ set_bit(S6EVR02_STATE_BIT_ENABLED, &ctx->state);
+
+ return ret;
+}
+
+static int s6evr02_enable(struct drm_panel *panel)
+{
+ return 0;
+}
+
+static int s6evr02_get_modes(struct drm_panel *panel,
+ struct drm_connector *connector)
+{
+ struct s6evr02 *ctx = panel_to_s6evr02(panel);
+ struct drm_display_mode *mode;
+
+ mode = drm_mode_create(connector->dev);
+ if (!mode) {
+ dev_err(panel->dev, "failed to create a new display mode\n");
+ return 0;
+ }
+
+ drm_display_mode_from_videomode(&ctx->vm, mode);
+ mode->width_mm = ctx->width_mm;
+ mode->height_mm = ctx->height_mm;
+ connector->display_info.width_mm = mode->width_mm;
+ connector->display_info.height_mm = mode->height_mm;
+
+ mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+ drm_mode_probed_add(connector, mode);
+
+ return 1;
+}
+
+static const struct drm_panel_funcs s6evr02_drm_funcs = {
+ .disable = s6evr02_disable,
+ .unprepare = s6evr02_unprepare,
+ .prepare = s6evr02_prepare,
+ .enable = s6evr02_enable,
+ .get_modes = s6evr02_get_modes,
+};
+
+static int s6evr02_get_brightness(struct backlight_device *bd)
+{
+ return bd->props.brightness;
+}
+
+static int s6evr02_set_brightness(struct backlight_device *bd)
+{
+ struct s6evr02 *ctx = bl_get_data(bd);
+
+ bd->props.power = FB_BLANK_UNBLANK;
+ if (ctx->brightness != bd->props.brightness) {
+ ctx->brightness = bd->props.brightness;
+ if (test_bit(S6EVR02_STATE_BIT_ENABLED, &ctx->state))
+ s6evr02_brightness_set(ctx);
+ }
+
+ return s6evr02_clear_error(ctx);
+}
+
+static const struct backlight_ops s6evr02_backlight_ops = {
+ .get_brightness = s6evr02_get_brightness,
+ .update_status = s6evr02_set_brightness,
+};
+
+static void s6evr02_backlight_register(struct s6evr02 *ctx)
+{
+ struct backlight_properties props = {
+ .type = BACKLIGHT_RAW,
+ .brightness = ctx->brightness,
+ .max_brightness = GAMMA_LEVEL_NUM - 1
+ };
+ struct device *dev = ctx->dev;
+ struct backlight_device *bd;
+
+ bd = devm_backlight_device_register(dev, "panel", dev, ctx,
+ &s6evr02_backlight_ops, &props);
+ if (IS_ERR(bd))
+ dev_err(dev, "error registering backlight device (%ld)\n",
+ PTR_ERR(bd));
+}
+
+static int s6evr02_parse_dt(struct s6evr02 *ctx)
+{
+ struct device *dev = ctx->dev;
+ struct device_node *np = dev->of_node;
+ int ret;
+
+ ret = of_get_videomode(np, &ctx->vm, 0);
+ if (ret < 0)
+ return ret;
+
+ of_property_read_u32(np, "power-on-delay", &ctx->power_on_delay);
+ of_property_read_u32(np, "reset-delay", &ctx->reset_delay);
+ of_property_read_u32(np, "init-delay", &ctx->init_delay);
+ of_property_read_u32(np, "panel-width-mm", &ctx->width_mm);
+ of_property_read_u32(np, "panel-height-mm", &ctx->height_mm);
+
+ return 0;
+}
+
+static int s6evr02_probe(struct mipi_dsi_device *dsi)
+{
+ struct device *dev = &dsi->dev;
+ struct s6evr02 *ctx;
+ int ret = 0;
+
+ ctx = devm_kzalloc(dev, sizeof(struct s6evr02), GFP_KERNEL);
+ if (!ctx)
+ return -ENOMEM;
+
+ pr_err("s6evr02 probing\n");
+
+ mipi_dsi_set_drvdata(dsi, ctx);
+
+ ctx->dev = dev;
+
+ dsi->lanes = 4;
+ dsi->format = MIPI_DSI_FMT_RGB888;
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST
+ | MIPI_DSI_MODE_VIDEO_NO_HFP | MIPI_DSI_MODE_VIDEO_NO_HBP
+ | MIPI_DSI_MODE_VIDEO_NO_HSA | MIPI_DSI_MODE_NO_EOT_PACKET
+ | MIPI_DSI_MODE_VSYNC_FLUSH | MIPI_DSI_MODE_VIDEO_AUTO_VERT;
+
+ ret = s6evr02_parse_dt(ctx);
+ if (ret < 0)
+ return ret;
+
+ ctx->supplies[0].supply = "vdd3";
+ ctx->supplies[1].supply = "vci";
+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
+ ctx->supplies);
+ if (ret < 0) {
+ dev_err(dev, "failed to get regulators: %d\n", ret);
+ return ret;
+ }
+
+ ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(ctx->reset_gpio)) {
+ dev_err(dev, "cannot get reset-gpios %ld\n",
+ PTR_ERR(ctx->reset_gpio));
+ return PTR_ERR(ctx->reset_gpio);
+ }
+
+ ctx->brightness = GAMMA_LEVEL_NUM - 1;
+
+ drm_panel_init(&ctx->panel, dev, &s6evr02_drm_funcs,
+ DRM_MODE_CONNECTOR_DSI);
+
+ drm_panel_add(&ctx->panel);
+
+ ret = mipi_dsi_attach(dsi);
+ if (ret < 0)
+ drm_panel_remove(&ctx->panel);
+
+ s6evr02_backlight_register(ctx);
+
+ return ret;
+}
+
+static void s6evr02_remove(struct mipi_dsi_device *dsi)
+{
+ struct s6evr02 *ctx = mipi_dsi_get_drvdata(dsi);
+
+ mipi_dsi_detach(dsi);
+ drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id s6evr02_of_match[] = {
+ { .compatible = "samsung,s6evr02" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, s6evr02_of_match);
+
+static struct mipi_dsi_driver s6evr02_driver = {
+ .probe = s6evr02_probe,
+ .remove = s6evr02_remove,
+ .driver = {
+ .name = "panel-samsung-s6evr02",
+ .of_match_table = s6evr02_of_match,
+ },
+};
+module_mipi_dsi_driver(s6evr02_driver);
+
+MODULE_AUTHOR("Simon Shields <simon@lineageos.org>");
+MODULE_AUTHOR("Donghwa Lee <dh09.lee@samsung.com>");
+MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
+MODULE_AUTHOR("Joongmock Shin <jmock.shin@samsung.com>");
+MODULE_AUTHOR("Eunchul Kim <chulspro.kim@samsung.com>");
+MODULE_AUTHOR("Tomasz Figa <t.figa@samsung.com>");
+MODULE_AUTHOR("Andrzej Hajda <a.hajda@samsung.com>");
+MODULE_DESCRIPTION("MIPI-DSI based s6evr02 AMOLED LCD Panel Driver");
+MODULE_LICENSE("GPL v2");
--
2.30.2

867
device/community/linux-postmarketos-exynos4/0010-drm-panel-add-Magnachip-EA8061-5.5-AMOLED-panel-driv.patch
View file

@ -1,867 +0,0 @@
From 04c8e3ad2d3d287cfdd945c83dc81719cc0aca73 Mon Sep 17 00:00:00 2001
From: Simon Shields <simon@lineageos.org>
Date: Thu, 16 Nov 2017 22:28:23 +1100
Subject: [PATCH 10/13] drm: panel: add Magnachip EA8061 5.5" AMOLED panel
driver
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Gamma table values have been dumped from vendor kernel based on
Linux 3.0.
[ bring up to 6.1 and squash with backlight addition patch ]
Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
---
drivers/gpu/drm/panel/Kconfig | 6 +
drivers/gpu/drm/panel/Makefile | 1 +
.../gpu/drm/panel/panel-magnachip-ea8061.c | 808 ++++++++++++++++++
3 files changed, 815 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-magnachip-ea8061.c
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 5ae25fe5bbb9..f80c48c6ac4e 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -357,6 +357,12 @@ config DRM_PANEL_NOVATEK_NT39016
Say Y here if you want to enable support for the panels built
around the Novatek NT39016 display controller.
+config DRM_PANEL_MAGNACHIP_EA8061
+ tristate "Magnachip EA8061 DSI video mode panel"
+ depends on OF
+ select DRM_MIPI_DSI
+ select VIDEOMODE_HELPERS
+
config DRM_PANEL_MANTIX_MLAF057WE51
tristate "Mantix MLAF057WE51-X MIPI-DSI LCD panel"
depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index b3d149475a38..2d6183d8cc9a 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o
obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o
obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672A) += panel-novatek-nt36672a.o
obj-$(CONFIG_DRM_PANEL_NOVATEK_NT39016) += panel-novatek-nt39016.o
+obj-$(CONFIG_DRM_PANEL_MAGNACHIP_EA8061) += panel-magnachip-ea8061.o
obj-$(CONFIG_DRM_PANEL_MANTIX_MLAF057WE51) += panel-mantix-mlaf057we51.o
obj-$(CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO) += panel-olimex-lcd-olinuxino.o
obj-$(CONFIG_DRM_PANEL_ORISETECH_OTM8009A) += panel-orisetech-otm8009a.o
diff --git a/drivers/gpu/drm/panel/panel-magnachip-ea8061.c b/drivers/gpu/drm/panel/panel-magnachip-ea8061.c
new file mode 100644
index 000000000000..ee105606907b
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-magnachip-ea8061.c
@@ -0,0 +1,808 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * MIPI-DSI based ea8061 AMOLED LCD 5.5 inch panel driver.
+ *
+ * Copyright (c) 2017 Simon Shields, <simon@lineageos.org>
+ *
+ * Based on the s6e8aa0 panel driver,
+ * Copyright (c) 2013 Samsung Electronics Co., Ltd
+ *
+ * Inki Dae, <inki.dae@samsung.com>
+ * Donghwa Lee, <dh09.lee@samsung.com>
+ * Joongmock Shin <jmock.shin@samsung.com>
+ * Eunchul Kim <chulspro.kim@samsung.com>
+ * Tomasz Figa <t.figa@samsung.com>
+ * Andrzej Hajda <a.hajda@samsung.com>
+*/
+
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/regulator/consumer.h>
+
+#include <linux/backlight.h>
+#include <video/mipi_display.h>
+#include <video/of_videomode.h>
+#include <video/videomode.h>
+
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+
+#define M4_VERSION 0x13
+
+#define AID_TABLE_LEN 2
+#define GAMMA_LEVEL_NUM 33
+#define GAMMA_TABLE_LEN 33
+
+typedef u8 ea8061_gamma_table[GAMMA_TABLE_LEN];
+typedef u8 ea8061_aid_table[AID_TABLE_LEN];
+
+#define EA8061_STATE_BIT_ENABLED 0
+
+struct ea8061 {
+ struct device *dev;
+ struct drm_panel panel;
+
+ struct regulator_bulk_data supplies[2];
+ struct gpio_desc *reset_gpio;
+ u32 power_on_delay;
+ u32 reset_delay;
+ u32 init_delay;
+ struct videomode vm;
+ u32 width_mm;
+ u32 height_mm;
+
+ unsigned long state;
+ u8 version;
+ u8 id;
+ int brightness;
+
+ /* This field is tested by functions directly accessing DSI bus before
+ * transfer, transfer is skipped if it is set. In case of transfer
+ * failure or unexpected response the field is set to error value.
+ * Such construct allows to eliminate many checks in higher level
+ * functions.
+ */
+ int error;
+};
+
+
+static const u8 ea8061_elvss_param[GAMMA_LEVEL_NUM] = {
+ 0x20, 0x20, 0x20, 0x1f, 0x1f, 0x1f, 0x1e, 0x1e, /* 20-90cd */
+ 0x1c, 0x1c, 0x1c, 0x1c, 0x1c, 0x1b, 0x19, 0x17, /* 100-130cd */
+ 0x16, 0x14, 0x12, 0x10, 0x0f, 0x0f, 0x0f, 0x0f, /* 140-186cd */
+ 0x0f, 0x15, 0x14, 0x13, 0x12, 0x11, 0x10, 0x10, /* 188-250cd */
+ 0x0b, /* 300cd */
+};
+
+static const ea8061_aid_table ea8061_aid_tables[GAMMA_LEVEL_NUM] = {
+ {0x04, 0x45}, {0x03, 0xdf}, {0x03, 0x74}, {0x03, 0x0a}, /* 20-50cd */
+ {0x02, 0x95}, {0x02, 0x25}, {0x01, 0xab}, {0x01, 0x36}, /* 60-90cd */
+ {0x00, 0xbc}, {0x00, 0xfe}, {0x01, 0x40}, {0x01, 0x82}, /* 100-106cd */
+ {0x01, 0xc4}, {0x02, 0x06}, {0x02, 0x06}, {0x02, 0x06}, /* 108-130cd */
+ {0x02, 0x06}, {0x02, 0x06}, {0x02, 0x06}, {0x02, 0x06}, /* 140-170cd */
+ {0x02, 0x06}, {0x01, 0x9f}, {0x01, 0x37}, {0x00, 0xcf}, /* 180-186cd */
+ {0x00, 0x68}, {0x00, 0x0a}, {0x00, 0x0a}, {0x00, 0x0a}, /* 188-210cd */
+ {0x00, 0x0a}, {0x00, 0x0a}, {0x00, 0x0a}, {0x00, 0x0a}, /* 220-250cd */
+ {0x00, 0x0a}, /* 300cd */
+};
+
+static const ea8061_gamma_table ea8061_gamma_tables[GAMMA_LEVEL_NUM] = {
+ {
+ /* 20cd */
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x87, 0x88, 0x87,
+ 0x88, 0x87, 0x88, 0x86, 0x89, 0x88, 0x87, 0x88, 0x89, 0x74,
+ 0x65, 0x81, 0x68, 0x66, 0x83, 0x68, 0x6f, 0xa9, 0x37, 0x42,
+ 0x2e, 0x31, 0x02,
+ }, {
+ /* 30cd */
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x87, 0x88, 0x87,
+ 0x87, 0x87, 0x87, 0x85, 0x88, 0x87, 0x87, 0x87, 0x88, 0x7e,
+ 0x77, 0x83, 0x6d, 0x66, 0x7c, 0x68, 0x6f, 0xa1, 0x37, 0x42,
+ 0x2e, 0x31, 0x02,
+ }, {
+ /* 40cd */
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x86, 0x87, 0x87,
+ 0x88, 0x87, 0x88, 0x84, 0x87, 0x86, 0x88, 0x89, 0x89, 0x7f,
+ 0x83, 0x81, 0x70, 0x63, 0x79, 0x65, 0x67, 0x98, 0x3b, 0x48,
+ 0x31, 0x31, 0x02,
+ }, {
+ /* 50cd */
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x86, 0x87, 0x87,
+ 0x87, 0x87, 0x87, 0x85, 0x88, 0x87, 0x86, 0x87, 0x87, 0x81,
+ 0x85, 0x83, 0x75, 0x6a, 0x79, 0x6b, 0x67, 0x93, 0x3b, 0x48,
+ 0x31, 0x31, 0x02,
+ }, {
+ /* 60cd */
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x86, 0x87, 0x87,
+ 0x87, 0x87, 0x87, 0x84, 0x87, 0x86, 0x85, 0x86, 0x87, 0x80,
+ 0x83, 0x82, 0x7b, 0x6e, 0x7c, 0x6d, 0x67, 0x8e, 0x3b, 0x48,
+ 0x31, 0x31, 0x02,
+ }, {
+ /* 70cd */
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x86, 0x86, 0x86,
+ 0x87, 0x87, 0x87, 0x85, 0x88, 0x87, 0x85, 0x86, 0x87, 0x80,
+ 0x83, 0x82, 0x79, 0x6d, 0x78, 0x73, 0x6b, 0x8f, 0x3b, 0x48,
+ 0x31, 0x31, 0x02,
+ }, {
+ /* 80cd */
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x86, 0x86, 0x86,
+ 0x87, 0x87, 0x87, 0x84, 0x86, 0x85, 0x86, 0x87, 0x88, 0x80,
+ 0x83, 0x82, 0x7b, 0x6f, 0x78, 0x74, 0x6b, 0x8c, 0x3b, 0x48,
+ 0x31, 0x31, 0x02,
+ }, {
+ /* 90cd */
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x86, 0x86, 0x86,
+ 0x87, 0x87, 0x87, 0x84, 0x86, 0x85, 0x84, 0x85, 0x86, 0x7e,
+ 0x81, 0x80, 0x7f, 0x74, 0x7c, 0x75, 0x6b, 0x8a, 0x3b, 0x48,
+ 0x31, 0x31, 0x02,
+ }, {
+ /* 100cd */
+ 0xca, 0x00, 0xd9, 0x00, 0xd5, 0x00, 0xd3, 0x86, 0x86, 0x86,
+ 0x87, 0x86, 0x86, 0x85, 0x87, 0x86, 0x84, 0x85, 0x86, 0x7e,
+ 0x81, 0x80, 0x7f, 0x77, 0x7c, 0x70, 0x5f, 0x83, 0x40, 0x4f,
+ 0x35, 0x31, 0x02,
+ }, {
+ /* 102cd */
+ 0xca, 0x00, 0xdb, 0x00, 0xd7, 0x00, 0xd6, 0x85, 0x86, 0x86,
+ 0x87, 0x86, 0x86, 0x83, 0x85, 0x85, 0x86, 0x87, 0x87, 0x7e,
+ 0x81, 0x80, 0x7f, 0x77, 0x7c, 0x7b, 0x73, 0x8a, 0x37, 0x42,
+ 0x2e, 0x31, 0x02,
+ }, {
+ /* 104cd */
+ 0xca, 0x00, 0xde, 0x00, 0xda, 0x00, 0xd9, 0x85, 0x86, 0x85,
+ 0x87, 0x86, 0x86, 0x84, 0x85, 0x85, 0x85, 0x85, 0x86, 0x7f,
+ 0x83, 0x81, 0x7c, 0x73, 0x79, 0x7b, 0x72, 0x8a, 0x37, 0x42,
+ 0x2e, 0x31, 0x02,
+ }, {
+ /* 106cd */
+ 0xca, 0x00, 0xe1, 0x00, 0xdd, 0x00, 0xdc, 0x84, 0x85, 0x84,
+ 0x86, 0x85, 0x85, 0x83, 0x84, 0x84, 0x84, 0x84, 0x85, 0x7f,
+ 0x83, 0x81, 0x7e, 0x76, 0x7a, 0x80, 0x7a, 0x8b, 0x33, 0x3c,
+ 0x2b, 0x31, 0x02,
+ }, {
+ /* 108cd */
+ 0xca, 0x00, 0xe4, 0x00, 0xe1, 0x00, 0xe0, 0x84, 0x86, 0x85,
+ 0x84, 0x83, 0x84, 0x83, 0x85, 0x84, 0x84, 0x84, 0x84, 0x81,
+ 0x84, 0x83, 0x7d, 0x77, 0x7a, 0x7d, 0x74, 0x87, 0x33, 0x3c,
+ 0x2b, 0x31, 0x02,
+ }, {
+ /* 110cd */
+ 0xca, 0x00, 0xe7, 0x00, 0xe4, 0x00, 0xe3, 0x84, 0x84, 0x84,
+ 0x84, 0x83, 0x84, 0x83, 0x84, 0x84, 0x83, 0x83, 0x84, 0x80,
+ 0x83, 0x82, 0x7f, 0x79, 0x7d, 0x7a, 0x70, 0x84, 0x33, 0x3c,
+ 0x2b, 0x31, 0x02,
+ }, {
+ /* 120cd */
+ 0xca, 0x00, 0xeb, 0x00, 0xe8, 0x00, 0xe7, 0x83, 0x84, 0x84,
+ 0x83, 0x82, 0x83, 0x83, 0x84, 0x83, 0x83, 0x83, 0x83, 0x7f,
+ 0x82, 0x81, 0x7d, 0x77, 0x7a, 0x80, 0x7c, 0x89, 0x2e, 0x37,
+ 0x28, 0x31, 0x02,
+ }, {
+ /* 130cd */
+ 0xca, 0x00, 0xee, 0x00, 0xec, 0x00, 0xec, 0x83, 0x83, 0x83,
+ 0x82, 0x82, 0x82, 0x81, 0x82, 0x82, 0x84, 0x84, 0x84, 0x7f,
+ 0x80, 0x7f, 0x7e, 0x7a, 0x7c, 0x7d, 0x78, 0x86, 0x2e, 0x37,
+ 0x28, 0x31, 0x02,
+ }, {
+ /* 140cd */
+ 0xca, 0x00, 0xf1, 0x00, 0xef, 0x00, 0xef, 0x82, 0x82, 0x82,
+ 0x82, 0x82, 0x82, 0x81, 0x82, 0x82, 0x82, 0x82, 0x82, 0x7f,
+ 0x81, 0x80, 0x7f, 0x7c, 0x7e, 0x7b, 0x74, 0x82, 0x2e, 0x37,
+ 0x28, 0x31, 0x02,
+ }, {
+ /* 150cd */
+ 0xca, 0x00, 0xf4, 0x00, 0xf2, 0x00, 0xf2, 0x81, 0x82, 0x82,
+ 0x82, 0x82, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x81, 0x80,
+ 0x81, 0x80, 0x7d, 0x7b, 0x7c, 0x81, 0x7f, 0x88, 0x85,
+ 0x87,0x84, 0x31, 0x02,
+ }, {
+ /* 160cd */
+ 0xca, 0x00, 0xf7, 0x00, 0xf6, 0x00, 0xf5, 0x80, 0x81, 0x81,
+ 0x82, 0x81, 0x81, 0x80, 0x81, 0x80, 0x82, 0x82, 0x82, 0x7f,
+ 0x80, 0x7f, 0x7f, 0x7d, 0x7e, 0x7e, 0x7b, 0x84, 0x85, 0x87,
+ 0x84, 0x31, 0x02,
+ }, {
+ /* 170cd */
+ 0xca, 0x00, 0xf9, 0x00, 0xf9, 0x00, 0xf8, 0x80, 0x81, 0x80,
+ 0x81, 0x80, 0x80, 0x81, 0x82, 0x81, 0x80, 0x80, 0x81, 0x80,
+ 0x80, 0x80, 0x80, 0x7f, 0x80, 0x7b, 0x77, 0x81, 0x85, 0x87,
+ 0x84, 0x31, 0x02,
+ }, {
+ /* 180cd */
+ 0xca, 0x00, 0xfc, 0x00, 0xfb, 0x00, 0xfb, 0x80, 0x80, 0x80,
+ 0x80, 0x80, 0x80, 0x7f, 0x80, 0x80, 0x81, 0x81, 0x81, 0x80,
+ 0x81, 0x81, 0x7e, 0x7d, 0x7e, 0x81, 0x81, 0x86, 0x7f, 0x80,
+ 0x7f, 0x31, 0x02,
+ }, {
+ /* 182cd */
+ 0xca, 0x00, 0xf8, 0x00, 0xf7, 0x00, 0xf6, 0x81, 0x81, 0x81,
+ 0x81, 0x81, 0x81, 0x80, 0x81, 0x81, 0x81, 0x81, 0x81, 0x7f,
+ 0x80, 0x7f, 0x7f, 0x7d, 0x7e, 0x7f, 0x7c, 0x83, 0x85, 0x87,
+ 0x84, 0x31, 0x02,
+ }, {
+ /* 184cd */
+ 0xca, 0x00, 0xf4, 0x00, 0xf2, 0x00, 0xf2, 0x81, 0x82, 0x82,
+ 0x81, 0x81, 0x81, 0x80, 0x81, 0x81, 0x82, 0x83, 0x83, 0x7e,
+ 0x7f, 0x7f, 0x7f, 0x7c, 0x7e, 0x7c, 0x76, 0x80, 0x2e, 0x37,
+ 0x28, 0x31, 0x02,
+ }, {
+ /* 186cd */
+ 0xca, 0x00, 0xf1, 0x00, 0xef, 0x00, 0xee, 0x82, 0x82, 0x82,
+ 0x82, 0x82, 0x82, 0x81, 0x82, 0x82, 0x82, 0x82, 0x82, 0x7f,
+ 0x80, 0x7f, 0x7e, 0x7a, 0x7c, 0x7e, 0x7a, 0x83, 0x2e, 0x37,
+ 0x28, 0x31, 0x02,
+ }, {
+ /* 188cd */
+ 0xca, 0x00, 0xee, 0x00, 0xec, 0x00, 0xec, 0x82, 0x83, 0x82,
+ 0x82, 0x82, 0x82, 0x81, 0x82, 0x81, 0x82, 0x82, 0x82, 0x7f,
+ 0x82, 0x81, 0x7d, 0x77, 0x7a, 0x81, 0x7e, 0x86, 0x2e, 0x37,
+ 0x28, 0x31, 0x02,
+ }, {
+ /* 190cd */
+ 0xca, 0x00, 0xeb, 0x00, 0xe8, 0x00, 0xe8, 0x82, 0x83, 0x83,
+ 0x83, 0x82, 0x83, 0x82, 0x83, 0x83, 0x83, 0x83, 0x83, 0x7f,
+ 0x82, 0x80, 0x7f, 0x79, 0x7d, 0x7b, 0x72, 0x81, 0x33, 0x3c,
+ 0x2b, 0x31, 0x02,
+ }, {
+ /* 200cd */
+ 0xca, 0x00, 0xee, 0x00, 0xec, 0x00, 0xeb, 0x82, 0x83, 0x82,
+ 0x82, 0x82, 0x82, 0x80, 0x81, 0x81, 0x83, 0x83, 0x83, 0x7f,
+ 0x82, 0x81, 0x7d, 0x77, 0x7a, 0x7b, 0x72, 0x81, 0x33, 0x3c,
+ 0x2b, 0x31, 0x02,
+ }, {
+ /* 210cd */
+ 0xca, 0x00, 0xf0, 0x00, 0xee, 0x00, 0xed, 0x82, 0x82, 0x82,
+ 0x82, 0x81, 0x81, 0x80, 0x81, 0x81, 0x82, 0x83, 0x83, 0x7e,
+ 0x80, 0x7f, 0x80, 0x7c, 0x7e, 0x7e, 0x7a, 0x83, 0x2e, 0x37,
+ 0x28, 0x31, 0x02,
+ }, {
+ /* 220cd */
+ 0xca, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0xf0, 0x80, 0x81, 0x81,
+ 0x82, 0x82, 0x82, 0x80, 0x81, 0x81, 0x82, 0x82, 0x82, 0x7f,
+ 0x80, 0x7f, 0x7e, 0x7a, 0x7c, 0x7e, 0x7a, 0x83, 0x2e, 0x37,
+ 0x28, 0x31, 0x02,
+ }, {
+ /* 230cd */
+ 0xca, 0x00, 0xf4, 0x00, 0xf2, 0x00, 0xf2, 0x81, 0x81, 0x81,
+ 0x81, 0x81, 0x80, 0x80, 0x81, 0x80, 0x82, 0x82, 0x82, 0x7f,
+ 0x81, 0x80, 0x7c, 0x78, 0x7a, 0x7e, 0x7a, 0x83, 0x2e, 0x37,
+ 0x28, 0x31, 0x02,
+ }, {
+ /* 240cd */
+ 0xca, 0x00, 0xf6, 0x00, 0xf4, 0x00, 0xf4, 0x80, 0x81, 0x81,
+ 0x81, 0x81, 0x81, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x7f,
+ 0x81, 0x80, 0x7f, 0x7c, 0x7e, 0x7c, 0x76, 0x7f, 0x2e, 0x37,
+ 0x28, 0x31, 0x02,
+ }, {
+ /* 250cd */
+ 0xca, 0x00, 0xf8, 0x00, 0xf7, 0x00, 0xf6, 0x80, 0x80, 0x80,
+ 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x80, 0x81, 0x80,
+ 0x81, 0x80, 0x7d, 0x7b, 0x7c, 0x7c, 0x76, 0x7f, 0x2e, 0x37,
+ 0x28, 0x31, 0x02,
+ }, {
+ /* 300cd */
+ 0xca, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x7f, 0x7f, 0x7f,
+ 0x80, 0x80, 0x80, 0x7f, 0x7f, 0x80, 0x7f, 0x7f, 0x7f, 0x80,
+ 0x80, 0x7f, 0x7f, 0x80, 0x7f, 0x80, 0x80, 0x80, 0x7f, 0x80,
+ 0x7f, 0x31, 0x02,
+ },
+};
+
+static inline struct ea8061 *panel_to_ea8061(struct drm_panel *panel)
+{
+ return container_of(panel, struct ea8061, panel);
+}
+
+static int ea8061_clear_error(struct ea8061 *ctx)
+{
+ int ret = ctx->error;
+
+ ctx->error = 0;
+ return ret;
+}
+
+static void ea8061_dcs_write(struct ea8061 *ctx, const void *data, size_t len)
+{
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ ssize_t ret;
+
+ if (ctx->error < 0)
+ return;
+
+ ret = mipi_dsi_dcs_write_buffer(dsi, data, len);
+ if (ret < 0) {
+ dev_err(ctx->dev, "error %zd writing dcs seq: %*ph\n", ret,
+ (int)len, data);
+ ctx->error = ret;
+ }
+}
+
+static int ea8061_dcs_read(struct ea8061 *ctx, u8 cmd, void *data, size_t len)
+{
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int ret;
+
+ if (ctx->error < 0)
+ return ctx->error;
+
+ ret = mipi_dsi_dcs_read(dsi, cmd, data, len);
+ if (ret < 0) {
+ dev_err(ctx->dev, "error %d reading dcs seq(%#x)\n", ret, cmd);
+ ctx->error = ret;
+ }
+
+ return ret;
+}
+
+#define ea8061_dcs_write_seq_static(ctx, seq...) \
+({\
+ static const u8 d[] = { seq };\
+ ea8061_dcs_write(ctx, d, ARRAY_SIZE(d));\
+})
+
+static void ea8061_apply_level_2_key(struct ea8061 *ctx)
+{
+ ea8061_dcs_write_seq_static(ctx, 0xf0, 0x5a, 0x5a);
+}
+
+static void ea8061_panel_cond_set(struct ea8061 *ctx)
+{
+ if (ctx->version == M4_VERSION)
+ ea8061_dcs_write_seq_static(ctx,
+ 0xc4, 0x4e, 0xbd, 0x00, 0x00, 0x58, 0xa7,
+ 0x0b, 0x34, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x0b, 0x92, 0x0b, 0x92, 0x08, 0x08, 0x07,
+ 0x30, 0x50, 0x30, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x02, 0x04, 0x04);
+ else
+ ea8061_dcs_write_seq_static(ctx,
+ 0xC4, 0x4E, 0xBD, 0x00, 0x00, 0x58, 0xA7,
+ 0x0B, 0x34, 0x00, 0x00, 0x00, 0x00, 0x00,
+ 0x0B, 0x92, 0x0B, 0x92, 0x08, 0x08, 0x07,
+ 0x30, 0x30, 0x30, 0x00, 0x00, 0x00, 0x00,
+ 0x00, 0x02, 0x04, 0x04);
+}
+
+static void ea8061_display_condition_set(struct ea8061 *ctx)
+{
+ ea8061_dcs_write_seq_static(ctx, 0x36, 0x02, 0x00);
+}
+
+static void ea8061_etc_power_control(struct ea8061 *ctx)
+{
+ ea8061_dcs_write_seq_static(ctx, 0x55, 0x00, 0x00);
+}
+
+static void ea8061_etc_elvss_control(struct ea8061 *ctx)
+{
+ ea8061_dcs_write_seq_static(ctx, 0xb2, 0x0e, 0xb4, 0xa0, 0x00,
+ 0x00, 0x00, 0x00);
+}
+
+static void ea8061_apply_level_3_key(struct ea8061 *ctx)
+{
+ ea8061_dcs_write_seq_static(ctx, 0xfc, 0x5a, 0x5a);
+}
+
+static void ea8061_aid_set(struct ea8061 *ctx)
+{
+ u8 aid_cmd[AID_TABLE_LEN + 1] = {
+ 0xb3, 0x00, 0x00,
+ };
+ if (ctx->error)
+ return;
+
+ aid_cmd[1] = ea8061_aid_tables[ctx->brightness][0];
+ aid_cmd[2] = ea8061_aid_tables[ctx->brightness][1];
+
+ ea8061_dcs_write(ctx, aid_cmd, ARRAY_SIZE(aid_cmd));
+}
+
+static void ea8061_acl_set(struct ea8061 *ctx)
+{
+ u8 acl_seq[] = {0x55, 0x02, 0x00};
+ if (ctx->error)
+ return;
+
+ switch (ctx->brightness) {
+ case 0: /* <30cd */
+ acl_seq[1] = 0x00;
+ break;
+ case 1: /* 30cd */
+ acl_seq[1] = 0x01;
+ break;
+ }
+
+ ea8061_dcs_write(ctx, acl_seq, ARRAY_SIZE(acl_seq));
+}
+
+static void ea8061_elvss_set(struct ea8061 *ctx)
+{
+ u8 elvss_cmd[] = {
+ 0xb2, 0x00, 0xb4, 0xa0, 0x00, 0x00, 0x00, 0x00,
+ };
+
+ if (ctx->error)
+ return;
+
+ elvss_cmd[1] = ea8061_elvss_param[ctx->brightness];
+ ea8061_dcs_write(ctx, elvss_cmd, ARRAY_SIZE(elvss_cmd));
+}
+
+static void ea8061_brightness_set(struct ea8061 *ctx)
+{
+ const u8 *gamma;
+
+ if (ctx->error)
+ return;
+
+ gamma = ea8061_gamma_tables[ctx->brightness];
+
+ /* prepare for gamma table update */
+ ea8061_dcs_write_seq_static(ctx, 0xf7, 0x5a, 0x5a);
+
+ ea8061_dcs_write(ctx, gamma, GAMMA_TABLE_LEN);
+
+ /* apply gamma table update. */
+ ea8061_dcs_write_seq_static(ctx, 0xf7, 0xa5, 0xa5);
+
+ ea8061_aid_set(ctx);
+ ea8061_acl_set(ctx);
+ ea8061_elvss_set(ctx);
+}
+
+static void ea8061_magna_gp(struct ea8061 *ctx)
+{
+ ea8061_dcs_write_seq_static(ctx, 0xb0, 0x0e);
+}
+
+static void ea8061_magna_refresh_disable(struct ea8061 *ctx)
+{
+ ea8061_dcs_write_seq_static(ctx, 0xdd, 0x00, 0x00);
+}
+
+static void ea8061_ltps_aid(struct ea8061 *ctx)
+{
+ ea8061_dcs_write_seq_static(ctx, 0xb3, 0x0, 0x0a);
+}
+
+static void ea8061_slew(struct ea8061 *ctx)
+{
+ if (ctx->version == M4_VERSION)
+ ea8061_dcs_write_seq_static(ctx, 0xb4, 0x33, 0x0d, 0x00);
+ else {
+ if (ctx->id == 0x00 || ctx->id == 0x01)
+ ea8061_dcs_write_seq_static(ctx, 0xb4, 0x33, 0x0e, 0x00);
+ else if (ctx->id == 0x02)
+ ea8061_dcs_write_seq_static(ctx, 0xb4, 0x33, 0x09, 0x00);
+ else if (ctx->id == 0x03)
+ ea8061_dcs_write_seq_static(ctx, 0xb4, 0x33, 0x0d, 0x00);
+ else
+ ea8061_dcs_write_seq_static(ctx, 0xb4, 0x33, 0x0a, 0x00);
+ }
+}
+
+static void ea8061_panel_init(struct ea8061 *ctx)
+{
+ ea8061_apply_level_2_key(ctx);
+ ea8061_apply_level_3_key(ctx);
+ msleep(20);
+
+ ea8061_magna_gp(ctx);
+ ea8061_magna_refresh_disable(ctx);
+
+ ea8061_panel_cond_set(ctx);
+ ea8061_display_condition_set(ctx);
+ ea8061_brightness_set(ctx);
+ ea8061_ltps_aid(ctx);
+ ea8061_etc_elvss_control(ctx);
+ ea8061_etc_power_control(ctx);
+ ea8061_slew(ctx);
+ msleep(ctx->init_delay);
+
+ ea8061_dcs_write_seq_static(ctx, MIPI_DCS_EXIT_SLEEP_MODE);
+ msleep(40);
+
+ ea8061_dcs_write_seq_static(ctx, 0x29, 0x00, 0x00);
+}
+
+static void ea8061_set_maximum_return_packet_size(struct ea8061 *ctx,
+ u16 size)
+{
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int ret;
+
+ if (ctx->error < 0)
+ return;
+
+ ret = mipi_dsi_set_maximum_return_packet_size(dsi, size);
+ if (ret < 0) {
+ dev_err(ctx->dev,
+ "error %d setting maximum return packet size to %d\n",
+ ret, size);
+ ctx->error = ret;
+ }
+}
+
+static void ea8061_read_mtp_id(struct ea8061 *ctx)
+{
+ u8 id[3];
+ int ret;
+
+ ea8061_dcs_write_seq_static(ctx, 0xfd, 0xd1);
+
+ ret = ea8061_dcs_read(ctx, 0xfe, id, ARRAY_SIZE(id));
+ if (ret < 0 || ret < ARRAY_SIZE(id) || id[0] == 0x00) {
+ dev_err(ctx->dev, "read id failed\n");
+ ctx->error = -EIO;
+ return;
+ }
+
+ dev_info(ctx->dev, "ID: 0x%2x, 0x%2x, 0x%2x\n", id[0], id[1], id[2]);
+
+ ctx->version = id[1];
+ ctx->id = id[2];
+}
+
+static void ea8061_set_sequence(struct ea8061 *ctx)
+{
+ ea8061_set_maximum_return_packet_size(ctx, 3);
+ ea8061_read_mtp_id(ctx);
+ ea8061_panel_init(ctx);
+ ea8061_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_ON);
+}
+
+static int ea8061_power_on(struct ea8061 *ctx)
+{
+ int ret;
+
+ ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
+ if (ret < 0)
+ return ret;
+
+ msleep(ctx->power_on_delay);
+
+ gpiod_set_value(ctx->reset_gpio, 0);
+ usleep_range(10000, 11000);
+ gpiod_set_value(ctx->reset_gpio, 1);
+
+ msleep(ctx->reset_delay);
+
+ return 0;
+}
+
+static int ea8061_power_off(struct ea8061 *ctx)
+{
+ return regulator_bulk_disable(ARRAY_SIZE(ctx->supplies), ctx->supplies);
+}
+
+static int ea8061_disable(struct drm_panel *panel)
+{
+ return 0;
+}
+
+static int ea8061_unprepare(struct drm_panel *panel)
+{
+ struct ea8061 *ctx = panel_to_ea8061(panel);
+
+ clear_bit(EA8061_STATE_BIT_ENABLED, &ctx->state);
+ ea8061_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_OFF);
+ ea8061_dcs_write_seq_static(ctx, MIPI_DCS_ENTER_SLEEP_MODE);
+ msleep(40);
+
+ ea8061_clear_error(ctx);
+
+ return ea8061_power_off(ctx);
+}
+
+static int ea8061_prepare(struct drm_panel *panel)
+{
+ struct ea8061 *ctx = panel_to_ea8061(panel);
+ int ret;
+
+ ret = ea8061_power_on(ctx);
+ if (ret < 0)
+ return ret;
+
+ ea8061_set_sequence(ctx);
+ ret = ctx->error;
+
+ if (ret < 0)
+ ea8061_unprepare(panel);
+ else
+ set_bit(EA8061_STATE_BIT_ENABLED, &ctx->state);
+
+ return ret;
+}
+
+static int ea8061_enable(struct drm_panel *panel)
+{
+ return 0;
+}
+
+static int ea8061_get_modes(struct drm_panel *panel,
+ struct drm_connector *connector)
+{
+ struct ea8061 *ctx = panel_to_ea8061(panel);
+ struct drm_display_mode *mode;
+
+ mode = drm_mode_create(connector->dev);
+ if (!mode) {
+ dev_err(ctx->dev, "failed to create a new display mode\n");
+ return 0;
+ }
+
+ drm_display_mode_from_videomode(&ctx->vm, mode);
+ mode->width_mm = ctx->width_mm;
+ mode->height_mm = ctx->height_mm;
+ connector->display_info.width_mm = mode->width_mm;
+ connector->display_info.height_mm = mode->height_mm;
+
+ mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+ drm_mode_probed_add(connector, mode);
+
+ return 1;
+}
+
+static const struct drm_panel_funcs ea8061_drm_funcs = {
+ .disable = ea8061_disable,
+ .unprepare = ea8061_unprepare,
+ .prepare = ea8061_prepare,
+ .enable = ea8061_enable,
+ .get_modes = ea8061_get_modes,
+};
+
+static int ea8061_get_brightness(struct backlight_device *bd)
+{
+ return bd->props.brightness;
+}
+
+static int ea8061_set_brightness(struct backlight_device *bd)
+{
+ struct ea8061 *ctx = bl_get_data(bd);
+
+ bd->props.power = FB_BLANK_UNBLANK;
+ if (ctx->brightness != bd->props.brightness) {
+ ctx->brightness = bd->props.brightness;
+ if (test_bit(EA8061_STATE_BIT_ENABLED, &ctx->state))
+ ea8061_brightness_set(ctx);
+ }
+
+ return ea8061_clear_error(ctx);
+}
+
+static const struct backlight_ops ea8061_backlight_ops = {
+ .get_brightness = ea8061_get_brightness,
+ .update_status = ea8061_set_brightness,
+};
+
+static void ea8061_backlight_register(struct ea8061 *ctx)
+{
+ struct backlight_properties props = {
+ .type = BACKLIGHT_RAW,
+ .brightness = ctx->brightness,
+ .max_brightness = GAMMA_LEVEL_NUM - 1
+ };
+ struct device *dev = ctx->dev;
+ struct backlight_device *bd;
+
+ bd = devm_backlight_device_register(dev, "panel", dev, ctx,
+ &ea8061_backlight_ops, &props);
+ if (IS_ERR(bd))
+ dev_err(dev, "error registering backlight device (%ld)\n",
+ PTR_ERR(bd));
+}
+
+static int ea8061_parse_dt(struct ea8061 *ctx)
+{
+ struct device *dev = ctx->dev;
+ struct device_node *np = dev->of_node;
+ int ret;
+
+ ret = of_get_videomode(np, &ctx->vm, 0);
+ if (ret < 0)
+ return ret;
+
+ of_property_read_u32(np, "power-on-delay", &ctx->power_on_delay);
+ of_property_read_u32(np, "reset-delay", &ctx->reset_delay);
+ of_property_read_u32(np, "init-delay", &ctx->init_delay);
+ of_property_read_u32(np, "panel-width-mm", &ctx->width_mm);
+ of_property_read_u32(np, "panel-height-mm", &ctx->height_mm);
+
+ return 0;
+}
+
+static int ea8061_probe(struct mipi_dsi_device *dsi)
+{
+ struct device *dev = &dsi->dev;
+ struct ea8061 *ctx;
+ int ret;
+
+ ctx = devm_kzalloc(dev, sizeof(struct ea8061), GFP_KERNEL);
+ if (!ctx)
+ return -ENOMEM;
+
+ pr_err("ea8061 probing\n");
+
+ mipi_dsi_set_drvdata(dsi, ctx);
+
+ ctx->dev = dev;
+
+ dsi->lanes = 4;
+ dsi->format = MIPI_DSI_FMT_RGB888;
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST
+ | MIPI_DSI_MODE_VIDEO_NO_HFP | MIPI_DSI_MODE_VIDEO_NO_HBP
+ | MIPI_DSI_MODE_VIDEO_NO_HSA | MIPI_DSI_MODE_NO_EOT_PACKET
+ | MIPI_DSI_MODE_VSYNC_FLUSH | MIPI_DSI_MODE_VIDEO_AUTO_VERT;
+
+ ret = ea8061_parse_dt(ctx);
+ if (ret < 0)
+ return ret;
+
+ ctx->supplies[0].supply = "vdd3";
+ ctx->supplies[1].supply = "vci";
+ ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(ctx->supplies),
+ ctx->supplies);
+ if (ret < 0) {
+ dev_err(dev, "failed to get regulators: %d\n", ret);
+ return ret;
+ }
+
+ ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(ctx->reset_gpio)) {
+ dev_err(dev, "cannot get reset-gpios %ld\n",
+ PTR_ERR(ctx->reset_gpio));
+ return PTR_ERR(ctx->reset_gpio);
+ }
+
+ ctx->brightness = GAMMA_LEVEL_NUM - 1;
+
+ drm_panel_init(&ctx->panel, dev, &ea8061_drm_funcs, DRM_MODE_CONNECTOR_DSI);
+
+ drm_panel_add(&ctx->panel);
+
+ ret = mipi_dsi_attach(dsi);
+ if (ret < 0)
+ drm_panel_remove(&ctx->panel);
+
+ ea8061_backlight_register(ctx);
+
+ return ret;
+}
+
+static void ea8061_remove(struct mipi_dsi_device *dsi)
+{
+ struct ea8061 *ctx = mipi_dsi_get_drvdata(dsi);
+
+ mipi_dsi_detach(dsi);
+ drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id ea8061_of_match[] = {
+ { .compatible = "magnachip,ea8061" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, ea8061_of_match);
+
+static struct mipi_dsi_driver ea8061_driver = {
+ .probe = ea8061_probe,
+ .remove = ea8061_remove,
+ .driver = {
+ .name = "panel-magnachip-ea8061",
+ .of_match_table = ea8061_of_match,
+ },
+};
+module_mipi_dsi_driver(ea8061_driver);
+
+MODULE_AUTHOR("Simon Shields <simon@lineageos.org>");
+MODULE_AUTHOR("Donghwa Lee <dh09.lee@samsung.com>");
+MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
+MODULE_AUTHOR("Joongmock Shin <jmock.shin@samsung.com>");
+MODULE_AUTHOR("Eunchul Kim <chulspro.kim@samsung.com>");
+MODULE_AUTHOR("Tomasz Figa <t.figa@samsung.com>");
+MODULE_AUTHOR("Andrzej Hajda <a.hajda@samsung.com>");
+MODULE_DESCRIPTION("MIPI-DSI based ea8061 AMOLED LCD Panel Driver");
+MODULE_LICENSE("GPL v2");
--
2.30.2

205
device/community/linux-postmarketos-exynos4/0011-ARM-dts-exynos4412-n710x-add-S6EVR02-EA8061-bindings.patch
View file

@ -1,205 +0,0 @@
From 12677ada98ebfa3c857a19c6919361039b80a48e Mon Sep 17 00:00:00 2001
From: Simon Shields <simon@lineageos.org>
Date: Thu, 16 Nov 2017 22:29:03 +1100
Subject: [PATCH 11/13] ARM: dts: exynos4412-n710x: add S6EVR02/EA8061 bindings
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
[ split n710x dts instead of using overlays ]
Signed-off-by: Otto Pflüger <otto.pflueger@abscue.de>
[ Sort dts entries alphabetically ]
Signed-off-by: Henrik Grimler <henrik@grimler.se>
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/exynos4412-n710x-ea8061.dts | 17 ++++
.../arm/boot/dts/exynos4412-n710x-s6evr02.dts | 17 ++++
...os4412-n710x.dts => exynos4412-n710x.dtsi} | 99 +++++++++++++++++++
4 files changed, 135 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/exynos4412-n710x-ea8061.dts
create mode 100644 arch/arm/boot/dts/exynos4412-n710x-s6evr02.dts
rename arch/arm/boot/dts/{exynos4412-n710x.dts => exynos4412-n710x.dtsi} (56%)
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 6aa7dc4db2fc..afde0e21fc71 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -217,7 +217,8 @@ dtb-$(CONFIG_ARCH_EXYNOS4) += \
exynos4412-i9300.dtb \
exynos4412-i9305.dtb \
exynos4412-itop-elite.dtb \
- exynos4412-n710x.dtb \
+ exynos4412-n710x-ea8061.dtb \
+ exynos4412-n710x-s6evr02.dtb \
exynos4412-odroidu3.dtb \
exynos4412-odroidx.dtb \
exynos4412-odroidx2.dtb \
diff --git a/arch/arm/boot/dts/exynos4412-n710x-ea8061.dts b/arch/arm/boot/dts/exynos4412-n710x-ea8061.dts
new file mode 100644
index 000000000000..1b47392eb93b
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-n710x-ea8061.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+#include "exynos4412-n710x.dtsi"
+
+&dsi_in_ea8061 {
+ remote-endpoint = <&dsi_out>;
+ status = "okay";
+};
+
+&dsi_out {
+ remote-endpoint = <&dsi_in_ea8061>;
+ status = "okay";
+};
+
+&ea8061 {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/exynos4412-n710x-s6evr02.dts b/arch/arm/boot/dts/exynos4412-n710x-s6evr02.dts
new file mode 100644
index 000000000000..b82df0480fbc
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-n710x-s6evr02.dts
@@ -0,0 +1,17 @@
+// SPDX-License-Identifier: GPL-2.0
+/dts-v1/;
+#include "exynos4412-n710x.dtsi"
+
+&dsi_in_s6evr02 {
+ remote-endpoint = <&dsi_out>;
+ status = "okay";
+};
+
+&dsi_out {
+ remote-endpoint = <&dsi_in_s6evr02>;
+ status = "okay";
+};
+
+&s6evr02 {
+ status = "okay";
+};
diff --git a/arch/arm/boot/dts/exynos4412-n710x.dts b/arch/arm/boot/dts/exynos4412-n710x.dtsi
similarity index 56%
rename from arch/arm/boot/dts/exynos4412-n710x.dts
rename to arch/arm/boot/dts/exynos4412-n710x.dtsi
index 5f2888816e4a..5e6b941f5cb7 100644
--- a/arch/arm/boot/dts/exynos4412-n710x.dts
+++ b/arch/arm/boot/dts/exynos4412-n710x.dtsi
@@ -38,6 +38,104 @@ &cam_io_reg {
status = "okay";
};
+&dsi_0 {
+ vddcore-supply = <&ldo8_reg>;
+ vddio-supply = <&ldo10_reg>;
+ samsung,burst-clock-frequency = <500000000>;
+ samsung,esc-clock-frequency = <20000000>;
+ samsung,pll-clock-frequency = <24000000>;
+ status = "okay";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@1 {
+ reg = <1>;
+
+ dsi_out: endpoint@0 {
+ samsung,burst-clock-frequency = <500000000>;
+ samsung,esc-clock-frequency = <20000000>;
+ status = "disabled";
+ };
+
+ };
+
+ };
+
+ s6evr02: panel-s6evr02@0 {
+ compatible = "samsung,s6evr02";
+ reg = <0>;
+ vdd3-supply = <&ldo13_reg>;
+ vci-supply = <&ldo25_reg>;
+ reset-gpios = <&gpf2 1 GPIO_ACTIVE_HIGH>;
+ power-on-delay = <50>;
+ reset-delay = <100>;
+ init-delay = <100>;
+ panel-width-mm = <69>;
+ panel-height-mm = <123>;
+ // HIGH means s6evr02
+ present-gpios = <&gpf1 0 GPIO_ACTIVE_HIGH>;
+ status = "disabled";
+
+ display-timings {
+ timing0_s6evr02: timing-0 {
+ clock-frequency = <62614944>;
+ hactive = <720>;
+ vactive = <1280>;
+ hfront-porch = <70>;
+ hback-porch = <40>;
+ hsync-len = <3>;
+ vfront-porch = <13>;
+ vback-porch = <1>;
+ vsync-len = <2>;
+ };
+ };
+
+ port {
+ dsi_in_s6evr02: endpoint {
+ status = "disabled";
+ };
+ };
+ };
+
+ ea8061: panel-ea8061@0 {
+ compatible = "magnachip,ea8061";
+ reg = <0>;
+ vdd3-supply = <&ldo13_reg>;
+ vci-supply = <&ldo25_reg>;
+ reset-gpios = <&gpf2 1 GPIO_ACTIVE_HIGH>;
+ power-on-delay = <50>;
+ reset-delay = <100>;
+ init-delay = <100>;
+ panel-width-mm = <69>;
+ panel-height-mm = <123>;
+ // LOW means ea8061
+ present-gpios = <&gpf1 0 GPIO_ACTIVE_LOW>;
+ status = "disabled";
+
+ display-timings {
+ timing0_ea8061: timing-0 {
+ clock-frequency = <67425696>;
+ hactive = <720>;
+ vactive = <1280>;
+ hfront-porch = <52>;
+ hback-porch = <121>;
+ hsync-len = <4>;
+ vfront-porch = <13>;
+ vback-porch = <1>;
+ vsync-len = <2>;
+ };
+ };
+
+ port {
+ dsi_in_ea8061: endpoint {
+ status = "disabled";
+ };
+ };
+ };
+};
+
&i2c_3 {
samsung,i2c-sda-delay = <100>;
samsung,i2c-slave-addr = <0x10>;
@@ -55,6 +153,7 @@ touchscreen@48 {
touchscreen-size-y = <1280>;
avdd-supply = <&ldo23_reg>;
vdd-supply = <&ldo24_reg>;
+
};
};
--
2.30.2

32
device/community/linux-postmarketos-exynos4/0012-drm-Allow-DRM_IOCTL_MODE_CREATE_DUMB-on-render-nodes.patch
View file

@ -1,32 +0,0 @@
From 27e9aab52565740c4845565c4a307884ef86a082 Mon Sep 17 00:00:00 2001
From: Newbyte <newbie13xd@gmail.com>
Date: Thu, 24 Mar 2022 11:25:26 +0100
Subject: [PATCH 12/13] drm: Allow DRM_IOCTL_MODE_CREATE_DUMB on render nodes
Due to a change in Mesa, the render node ends up being picked
instead of the primary node when using Exynos DRM kmsro. In turn,
this results in that dumb buffers cannot be allocated with
DRM_IOCTL_MODE_CREATE_DUMB, so many applications crash. This works
around that by allowing dumb buffers to be created by render nodes.
Mesa issue: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5510
---
drivers/gpu/drm/drm_ioctl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/drm_ioctl.c b/drivers/gpu/drm/drm_ioctl.c
index ca2a6e6101dc..233b218f8cc8 100644
--- a/drivers/gpu/drm/drm_ioctl.c
+++ b/drivers/gpu/drm/drm_ioctl.c
@@ -678,7 +678,7 @@ static const struct drm_ioctl_desc drm_ioctls[] = {
DRM_IOCTL_DEF(DRM_IOCTL_MODE_RMFB, drm_mode_rmfb_ioctl, 0),
DRM_IOCTL_DEF(DRM_IOCTL_MODE_PAGE_FLIP, drm_mode_page_flip_ioctl, DRM_MASTER),
DRM_IOCTL_DEF(DRM_IOCTL_MODE_DIRTYFB, drm_mode_dirtyfb_ioctl, DRM_MASTER),
- DRM_IOCTL_DEF(DRM_IOCTL_MODE_CREATE_DUMB, drm_mode_create_dumb_ioctl, 0),
+ DRM_IOCTL_DEF(DRM_IOCTL_MODE_CREATE_DUMB, drm_mode_create_dumb_ioctl, DRM_RENDER_ALLOW),
DRM_IOCTL_DEF(DRM_IOCTL_MODE_MAP_DUMB, drm_mode_mmap_dumb_ioctl, 0),
DRM_IOCTL_DEF(DRM_IOCTL_MODE_DESTROY_DUMB, drm_mode_destroy_dumb_ioctl, 0),
DRM_IOCTL_DEF(DRM_IOCTL_MODE_OBJ_GETPROPERTIES, drm_mode_obj_get_properties_ioctl, 0),
--
2.30.2

63
device/community/linux-postmarketos-exynos4/0013-ARM-dts-exynos-disable-HDMI-on-Midas.patch
View file

@ -1,63 +0,0 @@
From c000bea377de54d5df8fa1609b2f288b37ef6a7f Mon Sep 17 00:00:00 2001
From: Oliver Smith <ollieparanoid@postmarketos.org>
Date: Thu, 1 Sep 2022 21:56:03 +0200
Subject: [PATCH 13/13] ARM: dts: exynos: disable HDMI on Midas
Disable it as workaround because when unplugged, HDMI appears as
DRM_MNODE_CONNECTED with a surface are of 0x0.
Related: https://gitlab.gnome.org/World/Phosh/phosh/-/issues/828
---
arch/arm/boot/dts/exynos4412-midas.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/boot/dts/exynos4412-midas.dtsi b/arch/arm/boot/dts/exynos4412-midas.dtsi
index 3d6faa222f1d..41cae9a4f708 100644
--- a/arch/arm/boot/dts/exynos4412-midas.dtsi
+++ b/arch/arm/boot/dts/exynos4412-midas.dtsi
@@ -308,11 +308,13 @@ sii9234: hdmi-bridge@39 {
interrupts = <5 IRQ_TYPE_LEVEL_HIGH>;
reg = <0x39>;
+/*
port {
mhl_to_hdmi: endpoint {
remote-endpoint = <&hdmi_to_mhl>;
};
};
+*/
};
};
@@ -545,6 +547,7 @@ &gpu {
status = "okay";
};
+/*
&hdmi {
hpd-gpios = <&gpx3 7 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
@@ -567,6 +570,7 @@ hdmi_to_mhl: endpoint {
};
};
};
+*/
&hsotg {
vusb_d-supply = <&ldo15_reg>;
@@ -1201,10 +1205,12 @@ sdhci2_cd: sdhci2-cd-irq-pins {
samsung,pin-pud = <EXYNOS_PIN_PULL_NONE>;
};
+/*
hdmi_hpd: hdmi-hpd-pins {
samsung,pins = "gpx3-7";
samsung,pin-pud = <EXYNOS_PIN_PULL_DOWN>;
};
+*/
sleep1: sleep-state {
PIN_SLP(gpk0-0, PREV, NONE);
--
2.30.2

41
device/community/linux-postmarketos-exynos4/APKBUILD
View file

@ -3,13 +3,13 @@
# Kernel config based on: arch/arm/configs/exynos_defconfig
pkgname=linux-postmarketos-exynos4
pkgver=6.1
pkgrel=4
pkgver=6.3_rc7
pkgrel=0
pkgdesc="Mainline kernel fork for Samsung Exynos4 devices"
arch="armv7"
_carch="arm"
_flavor="${pkgname#linux-}"
url="https://kernel.org"
url="https://gitlab.com/exynos4-mainline/linux"
license="GPL-2.0-only"
options="!strip !check !tracedeps
pmb:cross-native
@ -36,26 +36,14 @@ case $pkgver in
*.*.*) _kernver=${pkgver%.0};;
*.*) _kernver=$pkgver;;
esac
_tag="v${pkgver//_/-}-exynos4"
source="
https://cdn.kernel.org/pub/linux/kernel/v${_kernver%%.*}.x/linux-$_kernver.tar.xz
$pkgname-$_tag.tar.bz2::$url/-/archive/$_tag/linux-$_tag.tar.bz2
$_config
0001-ARM-decompressor-Flush-tlb-before-swiching-domain-0-.patch
0002-ARM-dts-exynos-Add-reboot-modes-to-midas.patch
0003-mmc-core-Workaround-VTU00M-0xf1-FTL-metadata-corrupt.patch
0004-drivers-drm-Add-backlight-control-support-for-s6e8aa.patch
0005-power_supply-max77693-Listen-for-cable-events-and-en.patch
0006-mfd-max77693-Add-defines-for-charger-current-control.patch
0007-power_supply-max77693-change-the-supply-type-to-POWE.patch
0008-samsung-t0lte-add-leds.patch
0009-drm-panel-add-S6EVR02-panel-driver.patch
0010-drm-panel-add-Magnachip-EA8061-5.5-AMOLED-panel-driv.patch
0011-ARM-dts-exynos4412-n710x-add-S6EVR02-EA8061-bindings.patch
0012-drm-Allow-DRM_IOCTL_MODE_CREATE_DUMB-on-render-nodes.patch
0013-ARM-dts-exynos-disable-HDMI-on-Midas.patch
initramfs.list
init
"
builddir="$srcdir/linux-${_kernver//_/-}"
builddir="$srcdir/linux-$_tag"
prepare_isorec() {
# https://wiki.postmarketos.org/wiki/Boot_process#isorec
@ -93,21 +81,8 @@ package() {
}
sha512sums="
6ed2a73c2699d0810e54753715635736fc370288ad5ce95c594f2379959b0e418665cd71bc512a0273fe226fe90074d8b10d14c209080a6466498417a4fdda68 linux-6.1.tar.xz
334da503f8b088b0a7f51b9a45a490a8f22fa620c235815d93d2cc9da04c355276a67f5ad32f6e7f4459905b5ecba663c60ff4f325f2fc7fe027b4ea04e90d2a config-postmarketos-exynos4.armv7
bfad5fadb442a6d6c7f8a43565c4f706e4c0b47949e8bbe6dbcbe058da3fbebd11df17a567493d263e6b5d6b050fe1bdd3c394c3692c26f3d7ab8c45e1471e79 0001-ARM-decompressor-Flush-tlb-before-swiching-domain-0-.patch
28996ef4b8be4dc247b62c4a793336326a5beb6a61f0fba5048082e3363c8876fb5dc118e54a9ea7e63ba803b82f7d2d8ecf67577c76a20823c7e01449f44d7f 0002-ARM-dts-exynos-Add-reboot-modes-to-midas.patch
1202c766db844be9c89514cf82a87b2e253d5eeefb1bcaa3e55b8f0bc033eccd11097687cb2780cdc3d09d3790038f8235f5849eee734adc04b5fd739a51bacf 0003-mmc-core-Workaround-VTU00M-0xf1-FTL-metadata-corrupt.patch
533e84597f7a6bd0f3b59089017458f5d6b41aff7712676ce7d4ca6ff181432eea9b1122cee569e521a3644f35cdd11c0d7f79a72945c723bae78c428c482488 0004-drivers-drm-Add-backlight-control-support-for-s6e8aa.patch
dc132c9ad180439efa2dd3f2085adca6c090fa4f243fcdf7c315d15629825cfa03fb677a1cd361d6b14d1e474340a7461470da90d29667f71ca3cd7cb5cb493b 0005-power_supply-max77693-Listen-for-cable-events-and-en.patch
5f8116b7771091d9c89132cb87ffed31fe717e796d4d6b3fc5f691e312a90b2e8be7c47ec7f2ae746f130c8b847a47f17a336d533480ec80e0e0f6430c88bb0b 0006-mfd-max77693-Add-defines-for-charger-current-control.patch
2d9123ebb9b6c82d4f947e47a5786ec96691bd930c17acc307af8fd5850e605a1ee7ed1a49c13f65e794684c10d00e1522324a8bff6dce6374c318af944c69c3 0007-power_supply-max77693-change-the-supply-type-to-POWE.patch
7cd0a047b6966cc2f15994ac46c3d962385372400ccb049a53343077816bd10765971a48dab3bfe49a3671faf4f8b2d6310d99e7646e4d50da4218398488f22e 0008-samsung-t0lte-add-leds.patch
918714bcee7ae6b897a50064ba5498c678d0b85eb0e7b6ee3f0df398fc73380a04cf67fab1824a9991098b41659e00b229f372d9621cd67e5b9dfee251f34904 0009-drm-panel-add-S6EVR02-panel-driver.patch
201d75a2a1bd0c3fba0862852c3b159cc754133011ba2fe98f051cdb8f082de9e3826a8ce9f8d2a9e0ee46140b4d00f61d5334cf8aada828b38858aa4fd1b093 0010-drm-panel-add-Magnachip-EA8061-5.5-AMOLED-panel-driv.patch
5aedf7fb653c8c5118e0023e6ed31ec6f1a57257a801c042bede671853b8b3f23a07a8a33ec2238cb30044c4a63a017b20c55ba55b1c45e4ad860c977b56a348 0011-ARM-dts-exynos4412-n710x-add-S6EVR02-EA8061-bindings.patch
0f5ef8996ca61cb599153d0cf1e2fd021f58d9a6d8ae395e219abdd9384fd998165ceaf70133b9f590d7875c62fa01a8ed015062328060d923bd8d77d85a5a15 0012-drm-Allow-DRM_IOCTL_MODE_CREATE_DUMB-on-render-nodes.patch
da44d616c1a4bee9b657d702b54e732965b1c0991a545e35f23163cd3db2e0d1141e519a8aafe7d15372ea1838a88466ab3fef0b13825b862ae99a83a238d8c7 0013-ARM-dts-exynos-disable-HDMI-on-Midas.patch
db6008ec77215d0339e1e5f844dc2d90ada2ad3bd85c27f889764e8118087f6cbf2993696644aa18aee66de0db83959f9ab65b5c3ccefb186b239e116b315fdc linux-postmarketos-exynos4-v6.3-rc7-exynos4.tar.bz2
3e99322a6f3c1ec0ea7ea2de8de44f8ba5c6214a6f807446f4efd0e9b9bd4e3d0c18276e458cb78f370abfe880bcd68d497e10a2d6d3c2ddaccfa5db83b87fd9 config-postmarketos-exynos4.armv7
aaff0332b90e1f9f62de1128cace934717336e54ab09de46477369fa808302482d97334e43a85ee8597c1bcab64d3484750103559fea2ce8cd51776156bf7591 initramfs.list
09f1f214a24300696809727a7b04378887c06ca6f40803ca51a12bf2176a360b2eb8632139d6a0722094e05cb2038bdb04018a1e3d33fc2697674552ade03bee init
"

149
device/community/linux-postmarketos-exynos4/config-postmarketos-exynos4.armv7
View file

@ -1,8 +1,8 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm 6.1.0 Kernel Configuration
# Linux/arm 6.3.0-rc7 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="armv7-alpine-linux-musleabihf-gcc (Alpine 12.2.1_git20220924-r9) 12.2.1 20220924"
CONFIG_CC_VERSION_TEXT="armv7-alpine-linux-musleabihf-gcc (Alpine 12.2.1_git20220924-r10) 12.2.1 20220924"
CONFIG_CC_IS_GCC=y
CONFIG_GCC_VERSION=120201
CONFIG_CLANG_VERSION=0
@ -129,6 +129,7 @@ CONFIG_PREEMPT_RCU=y
# CONFIG_RCU_EXPERT is not set
CONFIG_SRCU=y
CONFIG_TREE_SRCU=y
CONFIG_NEED_SRCU_NMI_SAFE=y
CONFIG_TASKS_RCU_GENERIC=y
CONFIG_TASKS_RCU=y
CONFIG_TASKS_TRACE_RCU=y
@ -150,6 +151,7 @@ CONFIG_GENERIC_SCHED_CLOCK=y
# end of Scheduler features
CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5"
CONFIG_GCC11_NO_ARRAY_BOUNDS=y
CONFIG_GCC12_NO_ARRAY_BOUNDS=y
CONFIG_CC_NO_ARRAY_BOUNDS=y
CONFIG_CGROUPS=y
@ -163,6 +165,7 @@ CONFIG_CGROUP_SCHED=y
CONFIG_FAIR_GROUP_SCHED=y
CONFIG_CFS_BANDWIDTH=y
CONFIG_RT_GROUP_SCHED=y
CONFIG_SCHED_MM_CID=y
CONFIG_CGROUP_PIDS=y
# CONFIG_CGROUP_RDMA is not set
CONFIG_CGROUP_FREEZER=y
@ -209,6 +212,7 @@ CONFIG_INITRAMFS_PRESERVE_MTIME=y
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
CONFIG_LD_ORPHAN_WARN=y
CONFIG_LD_ORPHAN_WARN_LEVEL="error"
CONFIG_SYSCTL=y
CONFIG_HAVE_UID16=y
# CONFIG_EXPERT is not set
@ -233,6 +237,7 @@ CONFIG_IO_URING=y
CONFIG_ADVISE_SYSCALLS=y
CONFIG_MEMBARRIER=y
CONFIG_KALLSYMS=y
# CONFIG_KALLSYMS_SELFTEST is not set
CONFIG_KALLSYMS_BASE_RELATIVE=y
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
CONFIG_KCMP=y
@ -451,7 +456,6 @@ CONFIG_PAGE_OFFSET=0xC0000000
CONFIG_NR_CPUS=4
CONFIG_HOTPLUG_CPU=y
# CONFIG_ARM_PSCI is not set
CONFIG_ARCH_NR_GPIO=512
CONFIG_HZ_FIXED=0
CONFIG_HZ_100=y
# CONFIG_HZ_200 is not set
@ -488,7 +492,6 @@ CONFIG_STACKPROTECTOR_PER_TASK=y
#
CONFIG_USE_OF=y
CONFIG_ATAGS=y
# CONFIG_UNUSED_BOARD_FILES is not set
# CONFIG_DEPRECATED_PARAM_STRUCT is not set
CONFIG_ZBOOT_ROM_TEXT=0x0
CONFIG_ZBOOT_ROM_BSS=0x0
@ -611,6 +614,7 @@ CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
CONFIG_HAVE_OPTPROBES=y
CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
CONFIG_HAVE_NMI=y
CONFIG_TRACE_IRQFLAGS_SUPPORT=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
@ -678,6 +682,7 @@ CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
CONFIG_HAVE_GCC_PLUGINS=y
CONFIG_GCC_PLUGINS=y
# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set
CONFIG_FUNCTION_ALIGNMENT=0
# end of General architecture-dependent options
CONFIG_RT_MUTEXES=y
@ -782,6 +787,7 @@ CONFIG_SWAP=y
# CONFIG_ZSWAP is not set
CONFIG_ZSMALLOC=m
# CONFIG_ZSMALLOC_STAT is not set
CONFIG_ZSMALLOC_CHAIN_SIZE=8
#
# SLAB allocator options
@ -977,7 +983,6 @@ CONFIG_NFT_MASQ=m
# CONFIG_NFT_REDIR is not set
CONFIG_NFT_NAT=m
# CONFIG_NFT_TUNNEL is not set
# CONFIG_NFT_OBJREF is not set
CONFIG_NFT_QUOTA=m
CONFIG_NFT_REJECT=m
CONFIG_NFT_REJECT_INET=m
@ -1151,7 +1156,6 @@ CONFIG_IP_NF_TARGET_MASQUERADE=m
# CONFIG_IP_NF_TARGET_NETMAP is not set
CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_MANGLE=m
# CONFIG_IP_NF_TARGET_CLUSTERIP is not set
# CONFIG_IP_NF_TARGET_ECN is not set
# CONFIG_IP_NF_TARGET_TTL is not set
# CONFIG_IP_NF_RAW is not set
@ -1224,7 +1228,6 @@ CONFIG_NET_SCHED=y
#
# Queueing/Scheduling
#
# CONFIG_NET_SCH_CBQ is not set
# CONFIG_NET_SCH_HTB is not set
# CONFIG_NET_SCH_HFSC is not set
# CONFIG_NET_SCH_PRIO is not set
@ -1238,7 +1241,6 @@ CONFIG_NET_SCHED=y
# CONFIG_NET_SCH_ETF is not set
# CONFIG_NET_SCH_TAPRIO is not set
# CONFIG_NET_SCH_GRED is not set
# CONFIG_NET_SCH_DSMARK is not set
# CONFIG_NET_SCH_NETEM is not set
# CONFIG_NET_SCH_DRR is not set
# CONFIG_NET_SCH_MQPRIO is not set
@ -1260,12 +1262,9 @@ CONFIG_NET_SCHED=y
#
CONFIG_NET_CLS=y
# CONFIG_NET_CLS_BASIC is not set
# CONFIG_NET_CLS_TCINDEX is not set
# CONFIG_NET_CLS_ROUTE4 is not set
# CONFIG_NET_CLS_FW is not set
# CONFIG_NET_CLS_U32 is not set
# CONFIG_NET_CLS_RSVP is not set
# CONFIG_NET_CLS_RSVP6 is not set
# CONFIG_NET_CLS_FLOW is not set
CONFIG_NET_CLS_CGROUP=y
# CONFIG_NET_CLS_BPF is not set
@ -1318,6 +1317,7 @@ CONFIG_BT_BNEP_PROTO_FILTER=y
CONFIG_BT_HIDP=m
CONFIG_BT_HS=y
CONFIG_BT_LE=y
CONFIG_BT_LE_L2CAP_ECRED=y
CONFIG_BT_LEDS=y
# CONFIG_BT_MSFTEXT is not set
# CONFIG_BT_AOSPEXT is not set
@ -1330,6 +1330,7 @@ CONFIG_BT_BCM=m
CONFIG_BT_RTL=m
CONFIG_BT_HCIBTUSB=m
# CONFIG_BT_HCIBTUSB_AUTOSUSPEND is not set
CONFIG_BT_HCIBTUSB_POLL_SYNC=y
CONFIG_BT_HCIBTUSB_BCM=y
# CONFIG_BT_HCIBTUSB_MTK is not set
CONFIG_BT_HCIBTUSB_RTL=y
@ -1537,6 +1538,7 @@ CONFIG_ZRAM_DEF_COMP_LZORLE=y
# CONFIG_ZRAM_DEF_COMP_LZO is not set
CONFIG_ZRAM_DEF_COMP="lzo-rle"
# CONFIG_ZRAM_WRITEBACK is not set
# CONFIG_ZRAM_MULTI_COMP is not set
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_DEV_LOOP_MIN_COUNT=8
# CONFIG_BLK_DEV_DRBD is not set
@ -1775,6 +1777,7 @@ CONFIG_NET_VENDOR_MICREL=y
CONFIG_NET_VENDOR_MICROCHIP=y
# CONFIG_ENC28J60 is not set
# CONFIG_ENCX24J600 is not set
# CONFIG_VCAP is not set
CONFIG_NET_VENDOR_MICROSEMI=y
CONFIG_NET_VENDOR_MICROSOFT=y
CONFIG_NET_VENDOR_NI=y
@ -1798,7 +1801,6 @@ CONFIG_NET_VENDOR_SEEQ=y
CONFIG_NET_VENDOR_SOLARFLARE=y
CONFIG_NET_VENDOR_SMSC=y
# CONFIG_SMC91X is not set
# CONFIG_SMC911X is not set
CONFIG_SMSC911X=y
CONFIG_NET_VENDOR_SOCIONEXT=y
CONFIG_NET_VENDOR_STMICRO=y
@ -1856,6 +1858,7 @@ CONFIG_MICROCHIP_PHY=m
# CONFIG_NATIONAL_PHY is not set
# CONFIG_NXP_C45_TJA11XX_PHY is not set
# CONFIG_NXP_TJA11XX_PHY is not set
# CONFIG_NCN26000_PHY is not set
# CONFIG_AT803X_PHY is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_REALTEK_PHY is not set
@ -2114,6 +2117,7 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=y
# CONFIG_TOUCHSCREEN_CY8CTMG110 is not set
# CONFIG_TOUCHSCREEN_CYTTSP_CORE is not set
# CONFIG_TOUCHSCREEN_CYTTSP4_CORE is not set
# CONFIG_TOUCHSCREEN_CYTTSP5 is not set
# CONFIG_TOUCHSCREEN_DYNAPRO is not set
# CONFIG_TOUCHSCREEN_HAMPSHIRE is not set
# CONFIG_TOUCHSCREEN_EETI is not set
@ -2124,6 +2128,7 @@ CONFIG_TOUCHSCREEN_ATMEL_MXT=y
# CONFIG_TOUCHSCREEN_GOODIX is not set
# CONFIG_TOUCHSCREEN_HIDEEP is not set
# CONFIG_TOUCHSCREEN_HYCON_HY46XX is not set
# CONFIG_TOUCHSCREEN_HYNITRON_CSTXXX is not set
# CONFIG_TOUCHSCREEN_ILI210X is not set
# CONFIG_TOUCHSCREEN_ILITEK is not set
# CONFIG_TOUCHSCREEN_S6SY761 is not set
@ -2170,6 +2175,7 @@ CONFIG_TOUCHSCREEN_MMS114=y
# CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set
# CONFIG_TOUCHSCREEN_IQS5XX is not set
# CONFIG_TOUCHSCREEN_ZINITIX is not set
# CONFIG_TOUCHSCREEN_HIMAX_HX83112B is not set
CONFIG_INPUT_MISC=y
# CONFIG_INPUT_AD714X is not set
# CONFIG_INPUT_ATMEL_CAPTOUCH is not set
@ -2236,6 +2242,7 @@ CONFIG_VT_HW_CONSOLE_BINDING=y
CONFIG_UNIX98_PTYS=y
CONFIG_LEGACY_PTYS=y
CONFIG_LEGACY_PTY_COUNT=256
CONFIG_LEGACY_TIOCSTI=y
CONFIG_LDISC_AUTOLOAD=y
#
@ -2260,7 +2267,7 @@ CONFIG_SERIAL_OF_PLATFORM=y
#
# CONFIG_SERIAL_AMBA_PL010 is not set
# CONFIG_SERIAL_AMBA_PL011 is not set
# CONFIG_SERIAL_EARLYCON_ARM_SEMIHOST is not set
# CONFIG_SERIAL_EARLYCON_SEMIHOST is not set
CONFIG_SERIAL_SAMSUNG=y
CONFIG_SERIAL_SAMSUNG_UARTS_4=y
CONFIG_SERIAL_SAMSUNG_UARTS=4
@ -2315,8 +2322,6 @@ CONFIG_TCG_TIS_I2C_INFINEON=y
# CONFIG_TCG_TIS_ST33ZP24_SPI is not set
# CONFIG_XILLYBUS is not set
# CONFIG_XILLYUSB is not set
CONFIG_RANDOM_TRUST_CPU=y
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
# end of Character devices
#
@ -2536,6 +2541,7 @@ CONFIG_GPIO_WM8994=y
# Virtual GPIO drivers
#
# CONFIG_GPIO_AGGREGATOR is not set
# CONFIG_GPIO_LATCH is not set
# CONFIG_GPIO_MOCKUP is not set
# CONFIG_GPIO_SIM is not set
# end of Virtual GPIO drivers
@ -2557,7 +2563,6 @@ CONFIG_POWER_RESET_SYSCON_POWEROFF=y
CONFIG_POWER_SUPPLY=y
# CONFIG_POWER_SUPPLY_DEBUG is not set
CONFIG_POWER_SUPPLY_HWMON=y
# CONFIG_PDA_POWER is not set
# CONFIG_GENERIC_ADC_BATTERY is not set
# CONFIG_IP5XXX_POWER is not set
# CONFIG_TEST_POWER is not set
@ -2599,6 +2604,8 @@ CONFIG_CHARGER_TPS65090=y
# CONFIG_BATTERY_GOLDFISH is not set
# CONFIG_BATTERY_RT5033 is not set
# CONFIG_CHARGER_RT9455 is not set
# CONFIG_CHARGER_RT9467 is not set
# CONFIG_CHARGER_RT9471 is not set
# CONFIG_CHARGER_CROS_USBPD is not set
# CONFIG_CHARGER_CROS_PCHG is not set
# CONFIG_CHARGER_UCS1002 is not set
@ -2677,6 +2684,7 @@ CONFIG_HWMON=y
# CONFIG_SENSORS_MAX6650 is not set
# CONFIG_SENSORS_MAX6697 is not set
# CONFIG_SENSORS_MAX31790 is not set
# CONFIG_SENSORS_MC34VR500 is not set
# CONFIG_SENSORS_MCP3021 is not set
# CONFIG_SENSORS_TC654 is not set
# CONFIG_SENSORS_TPS23861 is not set
@ -2702,7 +2710,6 @@ CONFIG_SENSORS_LM90=y
# CONFIG_SENSORS_PC87427 is not set
CONFIG_SENSORS_NTC_THERMISTOR=y
# CONFIG_SENSORS_NCT6683 is not set
# CONFIG_SENSORS_NCT6775 is not set
# CONFIG_SENSORS_NCT6775_I2C is not set
# CONFIG_SENSORS_NCT7802 is not set
# CONFIG_SENSORS_NCT7904 is not set
@ -2832,6 +2839,7 @@ CONFIG_BCMA_POSSIBLE=y
CONFIG_MFD_CORE=y
# CONFIG_MFD_ACT8945A is not set
# CONFIG_MFD_AS3711 is not set
# CONFIG_MFD_SMPRO is not set
# CONFIG_MFD_AS3722 is not set
# CONFIG_PMIC_ADP5520 is not set
# CONFIG_MFD_AAT2870_CORE is not set
@ -2842,7 +2850,6 @@ CONFIG_MFD_CORE=y
# CONFIG_MFD_AXP20X_I2C is not set
CONFIG_MFD_CROS_EC_DEV=y
# CONFIG_MFD_MADERA is not set
# CONFIG_MFD_ASIC3 is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_DA9052_SPI is not set
# CONFIG_MFD_DA9052_I2C is not set
@ -2857,8 +2864,6 @@ CONFIG_MFD_CROS_EC_DEV=y
# CONFIG_MFD_MC13XXX_I2C is not set
# CONFIG_MFD_MP2629 is not set
# CONFIG_MFD_HI6421_PMIC is not set
# CONFIG_HTC_PASIC3 is not set
# CONFIG_HTC_I2CPLD is not set
# CONFIG_MFD_IQS62X is not set
# CONFIG_MFD_KEMPLD is not set
# CONFIG_MFD_88PM800 is not set
@ -2914,6 +2919,7 @@ CONFIG_MFD_TPS65090=y
# CONFIG_MFD_TI_LP873X is not set
# CONFIG_MFD_TI_LP87565 is not set
# CONFIG_MFD_TPS65218 is not set
# CONFIG_MFD_TPS65219 is not set
# CONFIG_MFD_TPS6586X is not set
# CONFIG_MFD_TPS65910 is not set
# CONFIG_MFD_TPS65912_I2C is not set
@ -2923,9 +2929,6 @@ CONFIG_MFD_TPS65090=y
# CONFIG_MFD_WL1273_CORE is not set
# CONFIG_MFD_LM3533 is not set
# CONFIG_MFD_TC3589X is not set
# CONFIG_MFD_T7L66XB is not set
# CONFIG_MFD_TC6387XB is not set
# CONFIG_MFD_TC6393XB is not set
# CONFIG_MFD_TQMX86 is not set
# CONFIG_MFD_LOCHNAGAR is not set
# CONFIG_MFD_ARIZONA_I2C is not set
@ -2943,7 +2946,7 @@ CONFIG_MFD_WM8994=y
# CONFIG_MFD_ATC260X_I2C is not set
# CONFIG_MFD_QCOM_PM8008 is not set
# CONFIG_RAVE_SP_CORE is not set
# CONFIG_MFD_INTEL_M10_BMC is not set
# CONFIG_MFD_INTEL_M10_BMC_SPI is not set
# CONFIG_MFD_RSMU_I2C is not set
# CONFIG_MFD_RSMU_SPI is not set
# end of Multifunction device drivers
@ -2981,6 +2984,7 @@ CONFIG_REGULATOR_MAX8952=y
CONFIG_REGULATOR_MAX8997=y
CONFIG_REGULATOR_MAX8998=y
# CONFIG_REGULATOR_MAX20086 is not set
# CONFIG_REGULATOR_MAX20411 is not set
CONFIG_REGULATOR_MAX77686=y
CONFIG_REGULATOR_MAX77693=y
CONFIG_REGULATOR_MAX77802=y
@ -3003,6 +3007,7 @@ CONFIG_REGULATOR_MAX77802=y
# CONFIG_REGULATOR_RT5190A is not set
# CONFIG_REGULATOR_RT5759 is not set
# CONFIG_REGULATOR_RT6160 is not set
# CONFIG_REGULATOR_RT6190 is not set
# CONFIG_REGULATOR_RT6245 is not set
# CONFIG_REGULATOR_RTQ2134 is not set
# CONFIG_REGULATOR_RTMV20 is not set
@ -3173,7 +3178,6 @@ CONFIG_V4L_PLATFORM_DRIVERS=y
#
# Aspeed media platform drivers
#
# CONFIG_VIDEO_ASPEED is not set
#
# Atmel media platform drivers
@ -3201,6 +3205,10 @@ CONFIG_V4L_PLATFORM_DRIVERS=y
# Mediatek media platform drivers
#
#
# Microchip Technology, Inc. media platform drivers
#
#
# NVidia media platform drivers
#
@ -3255,6 +3263,7 @@ CONFIG_VIDEO_S5P_MIPI_CSIS=m
# Xilinx media platform drivers
#
# CONFIG_VIDEO_XILINX is not set
CONFIG_UVC_COMMON=m
CONFIG_VIDEOBUF2_CORE=m
CONFIG_VIDEOBUF2_V4L2=m
CONFIG_VIDEOBUF2_MEMOPS=m
@ -3279,11 +3288,13 @@ CONFIG_VIDEOBUF2_VMALLOC=m
# CONFIG_VIDEO_IMX258 is not set
# CONFIG_VIDEO_IMX274 is not set
# CONFIG_VIDEO_IMX290 is not set
# CONFIG_VIDEO_IMX296 is not set
# CONFIG_VIDEO_IMX319 is not set
# CONFIG_VIDEO_IMX334 is not set
# CONFIG_VIDEO_IMX335 is not set
# CONFIG_VIDEO_IMX355 is not set
# CONFIG_VIDEO_IMX412 is not set
# CONFIG_VIDEO_IMX415 is not set
# CONFIG_VIDEO_MT9M001 is not set
# CONFIG_VIDEO_MT9M032 is not set
# CONFIG_VIDEO_MT9M111 is not set
@ -3297,12 +3308,14 @@ CONFIG_VIDEOBUF2_VMALLOC=m
# CONFIG_VIDEO_OG01A1B is not set
# CONFIG_VIDEO_OV02A10 is not set
# CONFIG_VIDEO_OV08D10 is not set
# CONFIG_VIDEO_OV08X40 is not set
# CONFIG_VIDEO_OV13858 is not set
# CONFIG_VIDEO_OV13B10 is not set
# CONFIG_VIDEO_OV2640 is not set
# CONFIG_VIDEO_OV2659 is not set
# CONFIG_VIDEO_OV2680 is not set
# CONFIG_VIDEO_OV2685 is not set
# CONFIG_VIDEO_OV4689 is not set
# CONFIG_VIDEO_OV5640 is not set
# CONFIG_VIDEO_OV5645 is not set
# CONFIG_VIDEO_OV5647 is not set
@ -3318,6 +3331,7 @@ CONFIG_VIDEOBUF2_VMALLOC=m
# CONFIG_VIDEO_OV772X is not set
# CONFIG_VIDEO_OV7740 is not set
# CONFIG_VIDEO_OV8856 is not set
# CONFIG_VIDEO_OV8858 is not set
# CONFIG_VIDEO_OV8865 is not set
# CONFIG_VIDEO_OV9282 is not set
# CONFIG_VIDEO_OV9640 is not set
@ -3326,11 +3340,11 @@ CONFIG_VIDEOBUF2_VMALLOC=m
# CONFIG_VIDEO_RDACM21 is not set
# CONFIG_VIDEO_RJ54N1 is not set
CONFIG_VIDEO_S5C73M3=m
# CONFIG_VIDEO_S5K4ECGX is not set
CONFIG_VIDEO_S5K5BAF=m
CONFIG_VIDEO_S5K6A3=m
# CONFIG_VIDEO_S5K6AA is not set
# CONFIG_VIDEO_SR030PC30 is not set
# CONFIG_VIDEO_ST_VGXY61 is not set
# CONFIG_VIDEO_VS6624 is not set
# CONFIG_VIDEO_CCS is not set
# CONFIG_VIDEO_ET8EK8 is not set
@ -3400,6 +3414,7 @@ CONFIG_VIDEO_S5K6A3=m
# CONFIG_VIDEO_SAA7110 is not set
# CONFIG_VIDEO_SAA711X is not set
# CONFIG_VIDEO_TC358743 is not set
# CONFIG_VIDEO_TC358746 is not set
# CONFIG_VIDEO_TVP514X is not set
# CONFIG_VIDEO_TVP5150 is not set
# CONFIG_VIDEO_TVP7002 is not set
@ -3468,6 +3483,7 @@ CONFIG_VIDEO_S5K6A3=m
#
# Graphics support
#
CONFIG_VIDEO_NOMODESET=y
# CONFIG_IMX_IPUV3_CORE is not set
CONFIG_DRM=y
CONFIG_DRM_MIPI_DSI=y
@ -3531,9 +3547,6 @@ CONFIG_DRM_EXYNOS_HDMI=y
# CONFIG_DRM_EXYNOS_GSC is not set
# CONFIG_DRM_UDL is not set
# CONFIG_DRM_ARMADA is not set
# CONFIG_DRM_RCAR_DW_HDMI is not set
# CONFIG_DRM_RCAR_USE_LVDS is not set
# CONFIG_DRM_RCAR_USE_MIPI_DSI is not set
# CONFIG_DRM_OMAP is not set
# CONFIG_DRM_TILCDC is not set
# CONFIG_DRM_VIRTIO_GPU is not set
@ -3547,6 +3560,7 @@ CONFIG_DRM_PANEL=y
# CONFIG_DRM_PANEL_ABT_Y030XX067A is not set
# CONFIG_DRM_PANEL_ARM_VERSATILE is not set
# CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596 is not set
# CONFIG_DRM_PANEL_AUO_A030JTN01 is not set
# CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0 is not set
# CONFIG_DRM_PANEL_BOE_HIMAX8279D is not set
# CONFIG_DRM_PANEL_BOE_TV101WUM_NL6 is not set
@ -3558,11 +3572,13 @@ CONFIG_DRM_PANEL_SIMPLE=y
# CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set
# CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set
# CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set
# CONFIG_DRM_PANEL_HIMAX_HX8394 is not set
# CONFIG_DRM_PANEL_ILITEK_IL9322 is not set
# CONFIG_DRM_PANEL_ILITEK_ILI9341 is not set
# CONFIG_DRM_PANEL_ILITEK_ILI9881C is not set
# CONFIG_DRM_PANEL_INNOLUX_EJ030NA is not set
# CONFIG_DRM_PANEL_INNOLUX_P079ZCA is not set
# CONFIG_DRM_PANEL_JADARD_JD9365DA_H3 is not set
# CONFIG_DRM_PANEL_JDI_LT070ME05000 is not set
# CONFIG_DRM_PANEL_JDI_R63452 is not set
# CONFIG_DRM_PANEL_KHADAS_TS050 is not set
@ -3573,6 +3589,7 @@ CONFIG_DRM_PANEL_SAMSUNG_LD9040=y
# CONFIG_DRM_PANEL_LG_LB035Q02 is not set
# CONFIG_DRM_PANEL_LG_LG4573 is not set
# CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set
# CONFIG_DRM_PANEL_NEWVISION_NV3051D is not set
# CONFIG_DRM_PANEL_NEWVISION_NV3052C is not set
# CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set
# CONFIG_DRM_PANEL_NOVATEK_NT35560 is not set
@ -3582,6 +3599,7 @@ CONFIG_DRM_PANEL_SAMSUNG_LD9040=y
CONFIG_DRM_PANEL_MAGNACHIP_EA8061=y
# CONFIG_DRM_PANEL_MANTIX_MLAF057WE51 is not set
# CONFIG_DRM_PANEL_OLIMEX_LCD_OLINUXINO is not set
# CONFIG_DRM_PANEL_ORISETECH_OTA5601A is not set
# CONFIG_DRM_PANEL_ORISETECH_OTM8009A is not set
# CONFIG_DRM_PANEL_OSD_OSD101T2587_53TS is not set
# CONFIG_DRM_PANEL_PANASONIC_VVX10F034N00 is not set
@ -3616,6 +3634,7 @@ CONFIG_DRM_PANEL_SAMSUNG_S6EVR02=y
# CONFIG_DRM_PANEL_TPO_TPG110 is not set
# CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA is not set
# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set
# CONFIG_DRM_PANEL_VISIONOX_VTDR6130 is not set
# CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set
# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set
# end of Display Panels
@ -3626,7 +3645,6 @@ CONFIG_DRM_PANEL_BRIDGE=y
#
# Display Interface Bridges
#
# CONFIG_DRM_CDNS_DSI is not set
# CONFIG_DRM_CHIPONE_ICN6211 is not set
# CONFIG_DRM_CHRONTEL_CH7033 is not set
# CONFIG_DRM_CROS_EC_ANX7688 is not set
@ -3663,14 +3681,13 @@ CONFIG_DRM_TOSHIBA_TC358764=y
CONFIG_DRM_ANALOGIX_DP=y
# CONFIG_DRM_ANALOGIX_ANX7625 is not set
# CONFIG_DRM_I2C_ADV7511 is not set
# CONFIG_DRM_CDNS_DSI is not set
# CONFIG_DRM_CDNS_MHDP8546 is not set
# end of Display Interface Bridges
# CONFIG_DRM_STI is not set
# CONFIG_DRM_ETNAVIV is not set
# CONFIG_DRM_LOGICVC is not set
# CONFIG_DRM_MXSFB is not set
# CONFIG_DRM_IMX_LCDIF is not set
# CONFIG_DRM_ARCPGU is not set
# CONFIG_DRM_GM12U320 is not set
# CONFIG_DRM_PANEL_MIPI_DBI is not set
@ -3694,7 +3711,6 @@ CONFIG_DRM_PANFROST=y
# CONFIG_DRM_SSD130X is not set
# CONFIG_DRM_LEGACY is not set
CONFIG_DRM_PANEL_ORIENTATION_QUIRKS=y
CONFIG_DRM_NOMODESET=y
#
# Frame buffer Devices
@ -3748,6 +3764,7 @@ CONFIG_LCD_PLATFORM=y
# CONFIG_LCD_OTM3225A is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=y
# CONFIG_BACKLIGHT_KTD253 is not set
# CONFIG_BACKLIGHT_KTZ8866 is not set
CONFIG_BACKLIGHT_PWM=y
# CONFIG_BACKLIGHT_QCOM_WLED is not set
# CONFIG_BACKLIGHT_ADP8860 is not set
@ -3782,6 +3799,7 @@ CONFIG_LOGO_LINUX_VGA16=y
CONFIG_LOGO_LINUX_CLUT224=y
# end of Graphics support
# CONFIG_DRM_ACCEL is not set
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_TIMER=y
@ -3910,6 +3928,7 @@ CONFIG_SND_SOC_WM_HUBS=y
# CONFIG_SND_SOC_AK5558 is not set
# CONFIG_SND_SOC_ALC5623 is not set
# CONFIG_SND_SOC_AW8738 is not set
# CONFIG_SND_SOC_AW88395 is not set
# CONFIG_SND_SOC_BD28623 is not set
# CONFIG_SND_SOC_BT_SCO is not set
# CONFIG_SND_SOC_CROS_EC_CODEC is not set
@ -3951,6 +3970,7 @@ CONFIG_SND_SOC_HDMI_CODEC=y
# CONFIG_SND_SOC_GTM601 is not set
# CONFIG_SND_SOC_HDA is not set
# CONFIG_SND_SOC_ICS43432 is not set
# CONFIG_SND_SOC_IDT821034 is not set
# CONFIG_SND_SOC_INNO_RK3036 is not set
# CONFIG_SND_SOC_MAX98088 is not set
CONFIG_SND_SOC_MAX98090=y
@ -3978,6 +3998,7 @@ CONFIG_SND_SOC_MAX98095=y
# CONFIG_SND_SOC_PCM5102A is not set
# CONFIG_SND_SOC_PCM512x_I2C is not set
# CONFIG_SND_SOC_PCM512x_SPI is not set
# CONFIG_SND_SOC_PEB2466 is not set
# CONFIG_SND_SOC_RK3328 is not set
# CONFIG_SND_SOC_RT5616 is not set
CONFIG_SND_SOC_RT5631=y
@ -3987,6 +4008,7 @@ CONFIG_SND_SOC_RT5631=y
# CONFIG_SND_SOC_SGTL5000 is not set
# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set
# CONFIG_SND_SOC_SIMPLE_MUX is not set
# CONFIG_SND_SOC_SMA1303 is not set
# CONFIG_SND_SOC_SPDIF is not set
# CONFIG_SND_SOC_SRC4XXX_I2C is not set
# CONFIG_SND_SOC_SSM2305 is not set
@ -4044,6 +4066,7 @@ CONFIG_SND_SOC_RT5631=y
# CONFIG_SND_SOC_WM8904 is not set
# CONFIG_SND_SOC_WM8940 is not set
# CONFIG_SND_SOC_WM8960 is not set
# CONFIG_SND_SOC_WM8961 is not set
# CONFIG_SND_SOC_WM8962 is not set
# CONFIG_SND_SOC_WM8974 is not set
# CONFIG_SND_SOC_WM8978 is not set
@ -4072,10 +4095,7 @@ CONFIG_SND_SIMPLE_CARD=y
# CONFIG_SND_AUDIO_GRAPH_CARD is not set
# CONFIG_SND_AUDIO_GRAPH_CARD2 is not set
# CONFIG_SND_TEST_COMPONENT is not set
#
# HID support
#
CONFIG_HID_SUPPORT=y
CONFIG_HID=y
# CONFIG_HID_BATTERY_STRENGTH is not set
# CONFIG_HIDRAW is not set
@ -4109,6 +4129,7 @@ CONFIG_HID_CYPRESS=y
# CONFIG_HID_ELAN is not set
# CONFIG_HID_ELECOM is not set
# CONFIG_HID_ELO is not set
# CONFIG_HID_EVISION is not set
CONFIG_HID_EZKEY=y
# CONFIG_HID_GEMBIRD is not set
# CONFIG_HID_GFRM is not set
@ -4191,6 +4212,11 @@ CONFIG_HID_MONTEREY=y
# CONFIG_HID_MCP2221 is not set
# end of Special HID drivers
#
# HID-BPF support
#
# end of HID-BPF support
#
# USB HID support
#
@ -4199,15 +4225,10 @@ CONFIG_USB_HID=y
# CONFIG_USB_HIDDEV is not set
# end of USB HID support
#
# I2C HID support
#
CONFIG_I2C_HID=y
# CONFIG_I2C_HID_OF is not set
# CONFIG_I2C_HID_OF_ELAN is not set
# CONFIG_I2C_HID_OF_GOODIX is not set
# end of I2C HID support
# end of HID support
CONFIG_USB_OHCI_LITTLE_ENDIAN=y
CONFIG_USB_SUPPORT=y
CONFIG_USB_COMMON=y
@ -4246,7 +4267,6 @@ CONFIG_USB_EHCI_EXYNOS=y
# CONFIG_USB_EHCI_HCD_PLATFORM is not set
# CONFIG_USB_OXU210HP_HCD is not set
# CONFIG_USB_ISP116X_HCD is not set
# CONFIG_USB_FOTG210_HCD is not set
# CONFIG_USB_MAX3421_HCD is not set
CONFIG_USB_OHCI_HCD=y
CONFIG_USB_OHCI_EXYNOS=y
@ -4294,6 +4314,10 @@ CONFIG_USB_UAS=y
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USBIP_CORE is not set
#
# USB dual-mode controller drivers
#
# CONFIG_USB_CDNS_SUPPORT is not set
# CONFIG_USB_MUSB_HDRC is not set
CONFIG_USB_DWC3=y
@ -4373,7 +4397,6 @@ CONFIG_USB_GADGET_STORAGE_NUM_BUFFERS=2
# USB Peripheral Controller
#
# CONFIG_USB_FUSB300 is not set
# CONFIG_USB_FOTG210_UDC is not set
# CONFIG_USB_GR_UDC is not set
# CONFIG_USB_R8A66597 is not set
# CONFIG_USB_PXA27X is not set
@ -4653,7 +4676,6 @@ CONFIG_RTC_I2C_AND_SPI=y
# CONFIG_RTC_DRV_MSM6242 is not set
# CONFIG_RTC_DRV_BQ4802 is not set
# CONFIG_RTC_DRV_RP5C01 is not set
# CONFIG_RTC_DRV_V3020 is not set
# CONFIG_RTC_DRV_ZYNQMP is not set
# CONFIG_RTC_DRV_CROS_EC is not set
@ -4687,6 +4709,7 @@ CONFIG_DMA_OF=y
# CONFIG_INTEL_IDMA64 is not set
# CONFIG_NBPFAXI_DMA is not set
CONFIG_PL330_DMA=y
# CONFIG_XILINX_XDMA is not set
# CONFIG_XILINX_ZYNQMP_DPDMA is not set
# CONFIG_QCOM_HIDMA_MGMT is not set
# CONFIG_QCOM_HIDMA is not set
@ -4734,7 +4757,6 @@ CONFIG_STAGING=y
# CONFIG_RTLLIB is not set
# CONFIG_RTL8723BS is not set
# CONFIG_R8712U is not set
# CONFIG_R8188EU is not set
# CONFIG_VT6656 is not set
#
@ -4806,6 +4828,7 @@ CONFIG_CROS_EC_LIGHTBAR=y
CONFIG_CROS_EC_VBC=y
CONFIG_CROS_EC_SENSORHUB=y
CONFIG_CROS_EC_SYSFS=y
# CONFIG_CROS_HPS_I2C is not set
CONFIG_CROS_USBPD_NOTIFY=y
# CONFIG_MELLANOX_PLATFORM is not set
CONFIG_HAVE_CLK=y
@ -4874,6 +4897,7 @@ CONFIG_IOMMU_DEFAULT_DMA_STRICT=y
# CONFIG_IOMMU_DEFAULT_DMA_LAZY is not set
# CONFIG_IOMMU_DEFAULT_PASSTHROUGH is not set
CONFIG_OF_IOMMU=y
# CONFIG_IOMMUFD is not set
CONFIG_EXYNOS_IOMMU=y
# CONFIG_EXYNOS_IOMMU_DEBUG is not set
# CONFIG_ARM_SMMU is not set
@ -4930,6 +4954,8 @@ CONFIG_EXYNOS_IOMMU=y
# CONFIG_LITEX_SOC_CONTROLLER is not set
# end of Enable LiteX SoC Builder specific drivers
# CONFIG_WPCM450_SOC is not set
#
# Qualcomm SoC drivers
#
@ -5035,6 +5061,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
# CONFIG_FXLS8962AF_I2C is not set
# CONFIG_FXLS8962AF_SPI is not set
# CONFIG_IIO_ST_ACCEL_3AXIS is not set
# CONFIG_IIO_KX022A_SPI is not set
# CONFIG_IIO_KX022A_I2C is not set
# CONFIG_KXSD9 is not set
# CONFIG_KXCJK1013 is not set
# CONFIG_MC3230 is not set
@ -5056,6 +5084,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
#
# Analog to digital converters
#
# CONFIG_AD4130 is not set
# CONFIG_AD7091R5 is not set
# CONFIG_AD7124 is not set
# CONFIG_AD7192 is not set
@ -5090,6 +5119,7 @@ CONFIG_EXYNOS_ADC=y
# CONFIG_MAX11100 is not set
# CONFIG_MAX1118 is not set
# CONFIG_MAX11205 is not set
# CONFIG_MAX11410 is not set
# CONFIG_MAX1241 is not set
# CONFIG_MAX1363 is not set
# CONFIG_MAX9611 is not set
@ -5107,11 +5137,13 @@ CONFIG_EXYNOS_ADC=y
# CONFIG_TI_ADC128S052 is not set
# CONFIG_TI_ADC161S626 is not set
# CONFIG_TI_ADS1015 is not set
# CONFIG_TI_ADS7924 is not set
# CONFIG_TI_ADS7950 is not set
# CONFIG_TI_ADS8344 is not set
# CONFIG_TI_ADS8688 is not set
# CONFIG_TI_ADS124S08 is not set
# CONFIG_TI_ADS131E08 is not set
# CONFIG_TI_LMP92064 is not set
# CONFIG_TI_TLC4541 is not set
# CONFIG_TI_TSC2046 is not set
# CONFIG_VF610_ADC is not set
@ -5121,6 +5153,7 @@ CONFIG_EXYNOS_ADC=y
#
# Analog to digital and digital to analog converters
#
# CONFIG_AD74115 is not set
# CONFIG_AD74413R is not set
# end of Analog to digital and digital to analog converters
@ -5215,6 +5248,7 @@ CONFIG_EXYNOS_ADC=y
# CONFIG_LTC2632 is not set
# CONFIG_M62332 is not set
# CONFIG_MAX517 is not set
# CONFIG_MAX5522 is not set
# CONFIG_MAX5821 is not set
# CONFIG_MCP4725 is not set
# CONFIG_MCP4922 is not set
@ -5250,6 +5284,7 @@ CONFIG_EXYNOS_ADC=y
#
# CONFIG_ADF4350 is not set
# CONFIG_ADF4371 is not set
# CONFIG_ADF4377 is not set
# CONFIG_ADMV1013 is not set
# CONFIG_ADMV4420 is not set
# CONFIG_ADRF6780 is not set
@ -5388,6 +5423,7 @@ CONFIG_AK8975=y
# CONFIG_SENSORS_HMC5843_SPI is not set
# CONFIG_SENSORS_RM3100_I2C is not set
# CONFIG_SENSORS_RM3100_SPI is not set
# CONFIG_TI_TMAG5273 is not set
# CONFIG_YAMAHA_YAS530 is not set
# end of Magnetometer sensors
@ -5500,6 +5536,7 @@ CONFIG_AK8975=y
# CONFIG_TMP117 is not set
# CONFIG_TSYS01 is not set
# CONFIG_TSYS02D is not set
# CONFIG_MAX30208 is not set
# CONFIG_MAX31856 is not set
# CONFIG_MAX31865 is not set
# end of Temperature sensors
@ -5614,6 +5651,7 @@ CONFIG_PM_OPP=y
CONFIG_DCACHE_WORD_ACCESS=y
# CONFIG_VALIDATE_FS_PARSER is not set
CONFIG_FS_IOMAP=y
CONFIG_LEGACY_DIRECT_IO=y
CONFIG_EXT2_FS=m
# CONFIG_EXT2_FS_XATTR is not set
# CONFIG_EXT3_FS is not set
@ -5729,8 +5767,10 @@ CONFIG_SQUASHFS=y
CONFIG_SQUASHFS_FILE_CACHE=y
# CONFIG_SQUASHFS_FILE_DIRECT is not set
CONFIG_SQUASHFS_DECOMP_SINGLE=y
# CONFIG_SQUASHFS_DECOMP_MULTI is not set
# CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU is not set
# CONFIG_SQUASHFS_CHOICE_DECOMP_BY_MOUNT is not set
CONFIG_SQUASHFS_COMPILE_DECOMP_SINGLE=y
# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI is not set
# CONFIG_SQUASHFS_COMPILE_DECOMP_MULTI_PERCPU is not set
CONFIG_SQUASHFS_XATTR=y
CONFIG_SQUASHFS_ZLIB=y
# CONFIG_SQUASHFS_LZ4 is not set
@ -5781,6 +5821,7 @@ CONFIG_NFS_V4_2_SSC_HELPER=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
CONFIG_SUNRPC_BACKCHANNEL=y
CONFIG_RPCSEC_GSS_KRB5=y
# CONFIG_SUNRPC_DEBUG is not set
# CONFIG_CEPH_FS is not set
# CONFIG_CIFS is not set
@ -5913,7 +5954,6 @@ CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
CONFIG_CRYPTO_USER=m
CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y
CONFIG_CRYPTO_GF128MUL=m
CONFIG_CRYPTO_NULL=m
CONFIG_CRYPTO_NULL2=y
# CONFIG_CRYPTO_PCRYPT is not set
@ -6135,6 +6175,7 @@ CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_LIB_AES=m
CONFIG_CRYPTO_LIB_ARC4=m
CONFIG_CRYPTO_LIB_GF128MUL=m
CONFIG_CRYPTO_ARCH_HAVE_LIB_BLAKE2S=y
CONFIG_CRYPTO_ARCH_HAVE_LIB_CHACHA=m
CONFIG_CRYPTO_LIB_CHACHA=m
@ -6223,7 +6264,6 @@ CONFIG_CMA_SIZE_SEL_MBYTES=y
CONFIG_CMA_ALIGNMENT=8
# CONFIG_DMA_API_DEBUG is not set
CONFIG_SGL_ALLOC=y
# CONFIG_FORCE_NR_CPUS is not set
CONFIG_CPU_RMAP=y
CONFIG_DQL=y
CONFIG_GLOB=y
@ -6253,6 +6293,7 @@ CONFIG_FONT_7x14=y
# CONFIG_FONT_TER16x32 is not set
# CONFIG_FONT_6x8 is not set
CONFIG_SG_POOL=y
CONFIG_ARCH_STACKWALK=y
CONFIG_STACKDEPOT=y
CONFIG_SBITMAP=y
# end of Library routines
@ -6297,6 +6338,7 @@ CONFIG_SECTION_MISMATCH_WARN_ONLY=y
# CONFIG_MAGIC_SYSRQ is not set
# CONFIG_DEBUG_FS is not set
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_ARCH_HAS_UBSAN_SANITIZE_ALL=y
# CONFIG_UBSAN is not set
CONFIG_HAVE_KCSAN_COMPILER=y
# end of Generic Kernel Debugging Instruments
@ -6365,6 +6407,7 @@ CONFIG_STACKTRACE=y
#
CONFIG_RCU_CPU_STALL_TIMEOUT=21
CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0
# CONFIG_RCU_CPU_STALL_CPUTIME is not set
# end of RCU Debugging
CONFIG_HAVE_FUNCTION_TRACER=y
@ -6402,6 +6445,7 @@ CONFIG_ARCH_HAS_KCOV=y
CONFIG_CC_HAS_SANCOV_TRACE_PC=y
# CONFIG_KCOV is not set
CONFIG_RUNTIME_TESTING_MENU=y
# CONFIG_TEST_DHRY is not set
# CONFIG_TEST_MIN_HEAP is not set
# CONFIG_TEST_DIV64 is not set
# CONFIG_REED_SOLOMON_TEST is not set
@ -6409,16 +6453,13 @@ CONFIG_RUNTIME_TESTING_MENU=y
# CONFIG_TEST_HEXDUMP is not set
# CONFIG_STRING_SELFTEST is not set
# CONFIG_TEST_STRING_HELPERS is not set
# CONFIG_TEST_STRSCPY is not set
# CONFIG_TEST_KSTRTOX is not set
# CONFIG_TEST_PRINTF is not set
# CONFIG_TEST_SCANF is not set
# CONFIG_TEST_BITMAP is not set
# CONFIG_TEST_UUID is not set
# CONFIG_TEST_XARRAY is not set
# CONFIG_TEST_MAPLE_TREE is not set
# CONFIG_TEST_RHASHTABLE is not set
# CONFIG_TEST_SIPHASH is not set
# CONFIG_TEST_IDA is not set
# CONFIG_TEST_LKM is not set
# CONFIG_TEST_BITOPS is not set