linux-samsung-coreprimevelte: upgrade to 6.19.10

Many of the patches were upstreamed in 6.19, so they are dropped here.

Besides that, there are two new QoL patches (to be upstreamed
eventually) and kconfig fixes.

Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
Part-of: <https://gitlab.postmarketos.org/postmarketOS/pmaports/-/merge_requests/8249>
This commit is contained in:
Duje Mihanović 2026-03-29 19:45:14 +02:00 committed by The Friendly Meow (merge) Bot
parent 6ff3ee9670
commit e2a6787183
No known key found for this signature in database
25 changed files with 430 additions and 1043 deletions

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@ -1,61 +0,0 @@
From bbc6ef53a5dd771d18815d12fb337d64994690ae Mon Sep 17 00:00:00 2001
From: Karel Balej <balejk@matfyz.cz>
Date: Thu, 28 Aug 2025 11:49:02 +0200
Subject: [PATCH 01/21] arm64: dts: samsung,coreprimevelte: add PMIC
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Bind power management chip to the samsung,coreprimevelte smartphone.
This enables support for onkey and RTC as well as for regulators two of
which are explicitly bound here to the SD card.
Signed-off-by: Karel Balej <balejk@matfyz.cz>
Reviewed-by: Duje Mihanović <duje@dujemihanovic.xyz>
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
.../mmp/pxa1908-samsung-coreprimevelte.dts | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index 47a4f01a7077..54131b0e5617 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -303,6 +303,27 @@ &twsi1 {
&twsi2 {
status = "okay";
+
+ pmic@30 {
+ compatible = "marvell,88pm886-a1";
+ reg = <0x30>;
+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
+ wakeup-source;
+
+ regulators {
+ ldo6: ldo6 {
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3300000>;
+ };
+
+ ldo14: ldo14 {
+ regulator-boot-on;
+ regulator-min-microvolt = <1200000>;
+ regulator-max-microvolt = <3300000>;
+ };
+ };
+ };
};
&twsi3 {
@@ -328,4 +349,6 @@ &sdh0 {
cd-inverted;
bus-width = <4>;
wp-inverted;
+ vmmc-supply = <&ldo14>;
+ vqmmc-supply = <&ldo6>;
};
--
2.52.0

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@ -1,7 +1,7 @@
From 25bfba3b505551e6a5f1655b50f946a525fe4478 Mon Sep 17 00:00:00 2001
From 3c4c127ab88c15f824f08140c718349be8d3d634 Mon Sep 17 00:00:00 2001
From: Karel Balej <balejk@matfyz.cz>
Date: Sun, 26 Oct 2025 19:20:38 +0100
Subject: [PATCH 15/21] dt-bindings: mwifiex: document use with the SD8777
Subject: [PATCH 1/9] dt-bindings: mwifiex: document use with the SD8777
chipset
Document the corresponding compatible string for the use of this driver
@ -26,5 +26,5 @@ index 930b700b73d0..d31ff38f57d1 100644
- marvell,sd8897
- marvell,sd8978
--
2.52.0
2.53.0

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@ -1,57 +0,0 @@
From 4dffeb561799a5c0a8da799a85f8bc6f7321622a Mon Sep 17 00:00:00 2001
From: Karel Balej <balejk@matfyz.cz>
Date: Thu, 28 Aug 2025 11:49:03 +0200
Subject: [PATCH 02/21] arm64: dts: samsung,coreprimevelte: add touchscreen
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Bind touchscreen for the samsung,coreprimevelte smartphone. The
downstream code sets the VDD voltage to the exact value of 3.1 V,
however it's been empirically verified that the lower bound used here
sufficies for the proper operation of the chip and is thus used for
power-saving purposes.
Signed-off-by: Karel Balej <balejk@matfyz.cz>
Reviewed-by: Duje Mihanović <duje@dujemihanovic.xyz>
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
.../mmp/pxa1908-samsung-coreprimevelte.dts | 15 +++++++++++++++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index 54131b0e5617..0ac1a24dc410 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -311,6 +311,11 @@ pmic@30 {
wakeup-source;
regulators {
+ ldo2: ldo2 {
+ regulator-min-microvolt = <1900000>;
+ regulator-max-microvolt = <3100000>;
+ };
+
ldo6: ldo6 {
regulator-boot-on;
regulator-min-microvolt = <1200000>;
@@ -328,6 +333,16 @@ ldo14: ldo14 {
&twsi3 {
status = "okay";
+
+ touchscreen@50 {
+ compatible = "imagis,ist3032c";
+ reg = <0x50>;
+ interrupt-parent = <&gpio>;
+ interrupts = <72 IRQ_TYPE_EDGE_FALLING>;
+ vdd-supply = <&ldo2>;
+ touchscreen-size-x = <480>;
+ touchscreen-size-y = <800>;
+ };
};
&usb {
--
2.52.0

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@ -1,7 +1,7 @@
From e2c22430d2eb16ef6563fd64fa13e5d617cf560c Mon Sep 17 00:00:00 2001
From fbc9c71ce76dd55b95f0b4b700920d43699e23ea Mon Sep 17 00:00:00 2001
From: Karel Balej <balejk@matfyz.cz>
Date: Sun, 26 Oct 2025 19:20:39 +0100
Subject: [PATCH 16/21] net: mwifiex: add support for the SD8777 chipset
Subject: [PATCH 2/9] net: mwifiex: add support for the SD8777 chipset
Marvell SD8777 is a wireless chipset used for instance in the PXA1908
SoC found for example in the samsung,coreprimevelte smartphone, with
@ -94,5 +94,5 @@ index 673cbdf43453..61e95b5a528c 100644
#define SDIO_DEVICE_ID_MARVELL_8887_WLAN 0x9135
#define SDIO_DEVICE_ID_MARVELL_8887_BT 0x9136
--
2.52.0
2.53.0

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@ -1,7 +1,7 @@
From fba17af904cf656a9553dddc93146f1691cf4d03 Mon Sep 17 00:00:00 2001
From 2c09590041c6cda3fcd4ef57bd544c251bd87460 Mon Sep 17 00:00:00 2001
From: Karel Balej <balejk@matfyz.cz>
Date: Sun, 26 Oct 2025 19:20:40 +0100
Subject: [PATCH 17/21] DONOTMERGE: net: mwifiex: fix timeouts with the SD8777
Subject: [PATCH 3/9] DONOTMERGE: net: mwifiex: fix timeouts with the SD8777
chip
It has been observed with the samsung,coreprimevelte smartphone which
@ -170,5 +170,5 @@ index 9d0ef04ebe02..4ffa0e22aca9 100644
ARRAY_SIZE(priv->wmm.user_pri_pkt_tx_ctrl))
/*
--
2.52.0
2.53.0

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@ -1,123 +0,0 @@
From e97f7f095f1348e52ee2b2d873ba3f3cae9b3a81 Mon Sep 17 00:00:00 2001
From: Karel Balej <balejk@matfyz.cz>
Date: Thu, 28 Aug 2025 11:49:04 +0200
Subject: [PATCH 03/21] arm64: dts: samsung,coreprimevelte: add SDIO
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Set some basic properties of the SDIO card of the samsung,coreprimevelte
smartphone.
The SDIO is used as an interface for WiFi, Bluetooth and FM radio
serviced by the Marvell 88W8777 (SD8777) chipset. Support for this
chipset is currently not in-tree because the firmware is not available
in linux-firmware, however it is possible to trivially run it
out-of-tree using the mwifiex and Marvell Bluetooth drivers with some
caveats.
Link: https://lore.kernel.org/r/20231029111807.19261-1-balejk@matfyz.cz/
Signed-off-by: Karel Balej <balejk@matfyz.cz>
Reviewed-by: Duje Mihanović <duje@dujemihanovic.xyz>
[Duje: fix formatting of pins_0 and fast_pins_1 pin arrays]
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
.../mmp/pxa1908-samsung-coreprimevelte.dts | 71 +++++++++++++++++++
1 file changed, 71 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index 0ac1a24dc410..fadc34c13398 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -10,6 +10,7 @@ / {
aliases {
mmc0 = &sdh2; /* eMMC */
mmc1 = &sdh0; /* SD card */
+ mmc2 = &sdh1; /* SDIO */
serial0 = &uart0;
};
@@ -286,6 +287,68 @@ sdh0_pins_2: sdh0-pins-2 {
pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>;
pinctrl-single,low-power-mode = <0x208 0x388>;
};
+
+ sdh1_pins_0: sdh1-pins-0 {
+ pinctrl-single,pins = <
+ 0x170 1
+ 0x174 1
+ 0x178 1
+ 0x17c 1
+ 0x180 1
+ >;
+ pinctrl-single,drive-strength = <0x1000 0x1800>;
+ pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>;
+ pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>;
+ pinctrl-single,input-schmitt = <0 0x30>;
+ pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>;
+ pinctrl-single,low-power-mode = <0 0x388>;
+ };
+
+ sdh1_pins_1: sdh1-pins-1 {
+ pinctrl-single,pins = <0x184 1>;
+ pinctrl-single,drive-strength = <0 0x1800>;
+ pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>;
+ pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>;
+ pinctrl-single,input-schmitt = <0 0x30>;
+ pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>;
+ pinctrl-single,low-power-mode = <0x208 0x388>;
+ };
+
+ sdh1_pins_2: sdh1-pins-2 {
+ pinctrl-single,pins = <0xec 0>;
+ pinctrl-single,drive-strength = <0x1000 0x1800>;
+ pinctrl-single,bias-pullup = <0x8000 0x8000 0 0xc000>;
+ pinctrl-single,bias-pulldown = <0x8000 0x8000 0 0xa000>;
+ pinctrl-single,input-schmitt = <0 0x30>;
+ pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>;
+ pinctrl-single,low-power-mode = <0 0x388>;
+ };
+
+ sdh1_fast_pins_0: sdh1-fast-pins-0 {
+ pinctrl-single,pins = <
+ 0x170 1
+ 0x174 1
+ 0x178 1
+ 0x17c 1
+ 0x180 1
+ >;
+ pinctrl-single,drive-strength = <0x1800 0x1800>;
+ pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>;
+ pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>;
+ pinctrl-single,input-schmitt = <0 0x30>;
+ pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>;
+ pinctrl-single,low-power-mode = <0 0x388>;
+ };
+
+ sdh1_fast_pins_1: sdh1-fast-pins-1 {
+ pinctrl-single,pins = <0x184 1>;
+ pinctrl-single,drive-strength = <0x1800 0x1800>;
+ pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>;
+ pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>;
+ pinctrl-single,input-schmitt = <0 0x30>;
+ pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>;
+ pinctrl-single,low-power-mode = <0x208 0x388>;
+ };
};
&uart0 {
@@ -367,3 +430,11 @@ &sdh0 {
vmmc-supply = <&ldo14>;
vqmmc-supply = <&ldo6>;
};
+
+&sdh1 {
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&sdh1_pins_0 &sdh1_pins_1 &sdh1_pins_2>;
+ pinctrl-1 = <&sdh1_fast_pins_0 &sdh1_fast_pins_1 &sdh1_pins_2>;
+ bus-width = <4>;
+ non-removable;
+};
--
2.52.0

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@ -1,36 +0,0 @@
From 28757d5a501827bfd0de7b10032365154beb0241 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= <duje@dujemihanovic.xyz>
Date: Sat, 13 Sep 2025 23:21:03 +0200
Subject: [PATCH 04/21] arm64: dts: marvell: samsung,coreprimevelte: Add
backlight
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Add a node for the KTD2801 backlight chip found on the board.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
.../boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index fadc34c13398..cc54ab874244 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -116,6 +116,12 @@ key-voldown {
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
};
};
+
+ backlight {
+ compatible = "kinetic,ktd2801";
+ ctrl-gpios = <&gpio 97 GPIO_ACTIVE_HIGH>;
+ max-brightness = <210>;
+ };
};
&smmu {
--
2.52.0

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@ -1,7 +1,7 @@
From 29824c5af1a943c61550b1cad83f3532e8606eda Mon Sep 17 00:00:00 2001
From 72469a9519d3aa34348ea2fd9e60b66532f2f69c Mon Sep 17 00:00:00 2001
From: Karel Balej <balejk@matfyz.cz>
Date: Sun, 26 Oct 2025 19:20:41 +0100
Subject: [PATCH 18/21] arm64: dts: samsung,coreprimevelte: add wifi node
Subject: [PATCH 4/9] arm64: dts: samsung,coreprimevelte: add wifi node
Add a node for the phone's WiFi serviced by the Marvell SD8777 chip a
communication with which happens over the SDIO. Also enable a regulator
@ -47,5 +47,5 @@ index b2ce5edd9c6a..36d6ae4e902e 100644
&pwm3 {
--
2.52.0
2.53.0

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@ -1,7 +1,7 @@
From 9fad0d0903211dccdbb4364446ce204f8ad27858 Mon Sep 17 00:00:00 2001
From e608e191696c097c062a30d9b539634d68ab9fea Mon Sep 17 00:00:00 2001
From: blacksilver <blacksilver@debdan.net>
Date: Wed, 1 Nov 2023 10:33:06 +0100
Subject: [PATCH 19/21] Bluetooth: btmrvl_sdio: Add support for SD8777 chipset
Subject: [PATCH 5/9] Bluetooth: btmrvl_sdio: Add support for SD8777 chipset
Support for Marvell's chipset SD8777 is added.
Existing btmrvl_reg_87xx register definition is reused.
@ -69,5 +69,5 @@ index 61e95b5a528c..8ab0a59f8be6 100644
#define SDIO_DEVICE_ID_MARVELL_8887_WLAN 0x9135
#define SDIO_DEVICE_ID_MARVELL_8887_BT 0x9136
--
2.52.0
2.53.0

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@ -1,34 +0,0 @@
From 77f882f3314c7beab3551c4575943a27b302931b Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= <duje@dujemihanovic.xyz>
Date: Sat, 13 Sep 2025 23:21:04 +0200
Subject: [PATCH 05/21] arm64: dts: marvell: samsung,coreprimevelte: Correct CD
GPIO
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Right now, the CD GPIO is defined as active high with a cd-inverted
property. Just define the GPIO as active low instead.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
.../boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index cc54ab874244..0990c3e21bd3 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -429,8 +429,7 @@ &sdh2 {
&sdh0 {
pinctrl-names = "default";
pinctrl-0 = <&sdh0_pins_0 &sdh0_pins_1 &sdh0_pins_2>;
- cd-gpios = <&gpio 11 0>;
- cd-inverted;
+ cd-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
bus-width = <4>;
wp-inverted;
vmmc-supply = <&ldo14>;
--
2.52.0

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@ -1,120 +0,0 @@
From 3623c83568fa24000c40d02824747f84c256e496 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= <duje@dujemihanovic.xyz>
Date: Sat, 13 Sep 2025 23:21:05 +0200
Subject: [PATCH 06/21] arm64: dts: marvell: samsung,coreprimevelte: Enable
eMMC
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Commit a41fcca4b342 ("mmc: sdhci-pxav3: set NEED_RSP_BUSY capability")
fixed eMMC probing on this board. Enable the eMMC and add its pinctrl.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
.../mmp/pxa1908-samsung-coreprimevelte.dts | 79 ++++++++++++++++++-
1 file changed, 77 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index 0990c3e21bd3..fad72854e2b7 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -355,6 +355,79 @@ sdh1_fast_pins_1: sdh1-fast-pins-1 {
pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>;
pinctrl-single,low-power-mode = <0x208 0x388>;
};
+
+ sdh2_pins_0: sdh2-pins-0 {
+ pinctrl-single,pins = <
+ 0x24 1
+ 0x28 1
+ 0x2c 1
+ 0x30 1
+ 0x34 1
+ 0x38 1
+ 0x3c 1
+ 0x40 1
+ >;
+ pinctrl-single,drive-strength = <0x1000 0x1800>;
+ pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>;
+ pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>;
+ pinctrl-single,input-schmitt = <0 0x30>;
+ pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>;
+ pinctrl-single,low-power-mode = <0 0x388>;
+ };
+
+ sdh2_pins_1: sdh2-pins-1 {
+ pinctrl-single,pins = <0x64 1>;
+ pinctrl-single,drive-strength = <0x1000 0x1800>;
+ pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>;
+ pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>;
+ pinctrl-single,input-schmitt = <0 0x30>;
+ pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>;
+ pinctrl-single,low-power-mode = <0x208 0x388>;
+ };
+
+ sdh2_pins_2: sdh2-pins-2 {
+ pinctrl-single,pins = <0x5c 1>;
+ pinctrl-single,bias-pullup = <0xc000 0xc000 0 0xc000>;
+ pinctrl-single,bias-pulldown = <0x8000 0xa000 0x8000 0xa000>;
+ pinctrl-single,low-power-mode = <0x288 0x388>;
+ };
+
+ sdh2_fast_pins_0: sdh2-fast-pins-0 {
+ pinctrl-single,pins = <
+ 0x24 1
+ 0x28 1
+ 0x2c 1
+ 0x30 1
+ 0x34 1
+ 0x38 1
+ 0x3c 1
+ 0x40 1
+ >;
+ pinctrl-single,drive-strength = <0x1800 0x1800>;
+ pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>;
+ pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>;
+ pinctrl-single,input-schmitt = <0 0x30>;
+ pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>;
+ pinctrl-single,low-power-mode = <0 0x388>;
+ };
+
+ sdh2_fast_pins_1: sdh2-fast-pins-1 {
+ pinctrl-single,pins = <0x64 1>;
+ pinctrl-single,drive-strength = <0x1800 0x1800>;
+ pinctrl-single,bias-pullup = <0 0xc000 0 0xc000>;
+ pinctrl-single,bias-pulldown = <0 0xa000 0 0xa000>;
+ pinctrl-single,input-schmitt = <0 0x30>;
+ pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>;
+ pinctrl-single,low-power-mode = <0x208 0x388>;
+ };
+
+ sdh2_fast_pins_2: sdh2-fast-pins-2 {
+ pinctrl-single,pins = <0x5c 1>;
+ pinctrl-single,drive-strength = <0x1800 0x1800>;
+ pinctrl-single,bias-pullup = <0xc000 0xc000 0 0xc000>;
+ pinctrl-single,bias-pulldown = <0x8000 0xa000 0x8000 0xa000>;
+ pinctrl-single,low-power-mode = <0x288 0x388>;
+ };
};
&uart0 {
@@ -419,11 +492,13 @@ &usb {
};
&sdh2 {
- /* Disabled for now because initialization fails with -ETIMEDOUT. */
- status = "disabled";
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&sdh2_pins_0 &sdh2_pins_1 &sdh2_pins_2>;
+ pinctrl-1 = <&sdh2_fast_pins_0 &sdh2_fast_pins_1 &sdh2_fast_pins_2>;
bus-width = <8>;
non-removable;
mmc-ddr-1_8v;
+ mmc-hs200-1_8v;
};
&sdh0 {
--
2.52.0

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@ -1,7 +1,7 @@
From 561a9692469c126936c238f570338489d6983710 Mon Sep 17 00:00:00 2001
From 2ebbc5585b50866cc02ee682db2c12770361c52d Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= <duje@dujemihanovic.xyz>
Date: Thu, 18 Sep 2025 16:46:23 +0200
Subject: [PATCH 20/21] arm64: dts: marvell: samsung,coreprimevelte: Use
Subject: [PATCH 6/9] arm64: dts: marvell: samsung,coreprimevelte: Use
memory-region for framebuffer
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
@ -45,5 +45,5 @@ index 36d6ae4e902e..faeea5001364 100644
};
};
--
2.52.0
2.53.0

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@ -1,61 +0,0 @@
From ca6879aa66ea5a62af59f1db1d77497947668019 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= <duje@dujemihanovic.xyz>
Date: Sat, 13 Sep 2025 23:21:06 +0200
Subject: [PATCH 07/21] arm64: dts: marvell: pxa1908: Add PWMs
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The SoC has 4 onboard PWMs. Add a node for each of them.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi | 32 ++++++++++++++++++++
1 file changed, 32 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
index cf2b9109688c..61498fd75d1d 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
@@ -195,6 +195,38 @@ gpio@100 {
};
};
+ pwm0: pwm@1a000 {
+ compatible = "marvell,pxa250-pwm";
+ reg = <0x1a000 0x10>;
+ clocks = <&apbc PXA1908_CLK_PWM0>;
+ #pwm-cells = <1>;
+ status = "disabled";
+ };
+
+ pwm1: pwm@1a400 {
+ compatible = "marvell,pxa250-pwm";
+ reg = <0x1a400 0x10>;
+ clocks = <&apbc PXA1908_CLK_PWM1>;
+ #pwm-cells = <1>;
+ status = "disabled";
+ };
+
+ pwm2: pwm@1a800 {
+ compatible = "marvell,pxa250-pwm";
+ reg = <0x1a800 0x10>;
+ clocks = <&apbc PXA1908_CLK_PWM2>;
+ #pwm-cells = <1>;
+ status = "disabled";
+ };
+
+ pwm3: pwm@1ac00 {
+ compatible = "marvell,pxa250-pwm";
+ reg = <0x1ac00 0x10>;
+ clocks = <&apbc PXA1908_CLK_PWM3>;
+ #pwm-cells = <1>;
+ status = "disabled";
+ };
+
pmx: pinmux@1e000 {
compatible = "marvell,pxa1908-padconf", "pinconf-single";
reg = <0x1e000 0x330>;
--
2.52.0

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@ -1,7 +1,7 @@
From 89fc57a00cc966a2624a01d7485683e6d3a1ad98 Mon Sep 17 00:00:00 2001
From fa6ad6e2493c66a0ed760cf6ba741ec97d0ee828 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= <duje@dujemihanovic.xyz>
Date: Sun, 14 Dec 2025 13:13:11 +0100
Subject: [PATCH 21/21] arm64: dts: marvell: samsung-coreprimevelte: Increase
Subject: [PATCH 7/9] arm64: dts: marvell: samsung-coreprimevelte: Increase
touchscreen voltage
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
@ -31,5 +31,5 @@ index faeea5001364..fd16760f1072 100644
};
--
2.52.0
2.53.0

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@ -0,0 +1,34 @@
From 12e608294afcfc34896f5ff14a1b163a74644c03 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= <duje@dujemihanovic.xyz>
Date: Sat, 24 Jan 2026 17:39:12 +0100
Subject: [PATCH 8/9] arm64: dts: marvell: samsung-coreprimevelte: Add missing
SDIO properties
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
According to the vendor device tree, the WiFi+BT card must not be
powered off during suspend and is capable of waking up the board. Add
the respective properties to the SDIO node to reflect this.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
.../boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index fd16760f1072..ecae615b4414 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -532,6 +532,8 @@ &sdh1 {
pinctrl-1 = <&sdh1_fast_pins_0 &sdh1_fast_pins_1 &sdh1_pins_2>;
bus-width = <4>;
non-removable;
+ keep-power-in-suspend;
+ wakeup-source;
#address-cells = <1>;
#size-cells = <0>;
--
2.53.0

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@ -1,65 +0,0 @@
From b51c2b866ff737094146d69cb5aaa869e2c572d1 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= <duje@dujemihanovic.xyz>
Date: Sat, 13 Sep 2025 23:21:07 +0200
Subject: [PATCH 08/21] arm64: dts: marvell: samsung,coreprimevelte: Add
vibrator
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The board has a vibrator hooked up to PWM3. Add a node for it and its
associated pinctrl configuration.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
.../mmp/pxa1908-samsung-coreprimevelte.dts | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index fad72854e2b7..1de9dd14b83b 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -122,6 +122,15 @@ backlight {
ctrl-gpios = <&gpio 97 GPIO_ACTIVE_HIGH>;
max-brightness = <210>;
};
+
+ vibrator {
+ compatible = "pwm-vibrator";
+ pwm-names = "enable";
+ pwms = <&pwm3 100000>;
+ enable-gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&vibrator_pin>;
+ };
};
&smmu {
@@ -428,6 +437,16 @@ sdh2_fast_pins_2: sdh2-fast-pins-2 {
pinctrl-single,bias-pulldown = <0x8000 0xa000 0x8000 0xa000>;
pinctrl-single,low-power-mode = <0x288 0x388>;
};
+
+ vibrator_pin: vibrator-pin {
+ pinctrl-single,pins = <0x12c 0>;
+ pinctrl-single,drive-strength = <0x1000 0x1800>;
+ pinctrl-single,bias-pullup = <0x8000 0xc000 0x8000 0xc000>;
+ pinctrl-single,bias-pulldown = <0xa000 0xa000 0 0xa000>;
+ pinctrl-single,input-schmitt = <0 0x30>;
+ pinctrl-single,input-schmitt-enable = <0x40 0 0x40 0x40>;
+ pinctrl-single,low-power-mode = <0 0x388>;
+ };
};
&uart0 {
@@ -518,3 +537,7 @@ &sdh1 {
bus-width = <4>;
non-removable;
};
+
+&pwm3 {
+ status = "okay";
+};
--
2.52.0

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@ -1,75 +0,0 @@
From d4b7eb5865779e21a3819fc39785cb31bb754cea Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= <duje@dujemihanovic.xyz>
Date: Sat, 13 Sep 2025 23:21:08 +0200
Subject: [PATCH 09/21] arm64: dts: marvell: pxa1908: Move ramoops to SoC dtsi
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The ramoops memory region is the same for all boards based on the SoC.
Move its node to the appropriate dtsi.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
.../marvell/mmp/pxa1908-samsung-coreprimevelte.dts | 12 ------------
arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi | 14 ++++++++++++++
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index 1de9dd14b83b..e78e176575ef 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -38,10 +38,6 @@ memory@0 {
};
reserved-memory {
- #address-cells = <2>;
- #size-cells = <2>;
- ranges;
-
framebuffer@17000000 {
reg = <0 0x17000000 0 0x1800000>;
no-map;
@@ -63,14 +59,6 @@ cm3@a000000 {
seclog@8000000 {
reg = <0 0x8000000 0 0x100000>;
};
-
- ramoops@8100000 {
- compatible = "ramoops";
- reg = <0 0x8100000 0 0x40000>;
- record-size = <0x8000>;
- console-size = <0x20000>;
- max-reason = <5>;
- };
};
i2c-muic {
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
index 61498fd75d1d..deb1a9df27c2 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
@@ -58,6 +58,20 @@ psci {
method = "smc";
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ ramoops@8100000 {
+ compatible = "ramoops";
+ reg = <0 0x8100000 0 0x40000>;
+ record-size = <0x8000>;
+ console-size = <0x20000>;
+ max-reason = <5>;
+ };
+ };
+
timer {
compatible = "arm,armv8-timer";
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
--
2.52.0

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@ -0,0 +1,35 @@
From 809338abe1c7571df68443b4f5d5ce1b4951f718 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= <duje@dujemihanovic.xyz>
Date: Sat, 14 Mar 2026 16:03:38 +0100
Subject: [PATCH 9/9] backlight: ktd2801: enable BL_CORE_SUSPENDRESUME
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Boards using this backlight chip do not power the backlight off on
suspend. Enable BL_CORE_SUSPENDRESUME so the chip gets powered off by
the backlight core on suspend.
Tested on samsung-coreprimevelte.
Cc: stable@vger.kernel.org # v6.19
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
drivers/video/backlight/ktd2801-backlight.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/video/backlight/ktd2801-backlight.c b/drivers/video/backlight/ktd2801-backlight.c
index 17eac1b3bce4..1b1307e03b20 100644
--- a/drivers/video/backlight/ktd2801-backlight.c
+++ b/drivers/video/backlight/ktd2801-backlight.c
@@ -53,6 +53,7 @@ static int ktd2801_update_status(struct backlight_device *bd)
}
static const struct backlight_ops ktd2801_backlight_ops = {
+ .options = BL_CORE_SUSPENDRESUME,
.update_status = ktd2801_update_status,
};
--
2.53.0

View file

@ -1,48 +0,0 @@
From 3cab66ec47c0691a9dbd8117766055b5e5bec874 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= <duje@dujemihanovic.xyz>
Date: Sat, 13 Sep 2025 23:21:09 +0200
Subject: [PATCH 10/21] arm64: dts: marvell: samsung,coreprimevelte: Drop some
reserved memory
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Most of the memory marked as reserved is actually usable. Delete its
reserved-memory nodes so that the memory can be used.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
.../mmp/pxa1908-samsung-coreprimevelte.dts | 17 -----------------
1 file changed, 17 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index e78e176575ef..2f4f052ad890 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -42,23 +42,6 @@ framebuffer@17000000 {
reg = <0 0x17000000 0 0x1800000>;
no-map;
};
-
- gpu@9000000 {
- reg = <0 0x9000000 0 0x1000000>;
- };
-
- /* Communications processor, aka modem */
- cp@5000000 {
- reg = <0 0x5000000 0 0x3000000>;
- };
-
- cm3@a000000 {
- reg = <0 0xa000000 0 0x80000>;
- };
-
- seclog@8000000 {
- reg = <0 0x8000000 0 0x100000>;
- };
};
i2c-muic {
--
2.52.0

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@ -1,50 +0,0 @@
From 42ea99911fb5046073cd3cb1efe879499cb2c4fe Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= <duje@dujemihanovic.xyz>
Date: Sat, 13 Sep 2025 23:21:10 +0200
Subject: [PATCH 11/21] arm64: dts: marvell: samsung,coreprimevelte: Fill in
memory node
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The board is known to have 1 GiB of DRAM with the first 16 MiB unusable.
Instead of relying on the bootloader to fill in the memory node, do it
ourselves.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
.../marvell/mmp/pxa1908-samsung-coreprimevelte.dts | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index 2f4f052ad890..7fd5420937bd 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -31,13 +31,22 @@ fb0: framebuffer@17177000 {
};
};
- /* Bootloader fills this in */
memory@0 {
device_type = "memory";
- reg = <0 0 0 0>;
+ reg = <0 0 0 0x40000000>;
};
reserved-memory {
+ /*
+ * Reserved by the vendor bootloader as a "secure region".
+ *
+ * TODO: See if the responsible stage of the bootloader can be
+ * replaced
+ */
+ secure-region@0 {
+ reg = <0 0 0 0x1000000>;
+ };
+
framebuffer@17000000 {
reg = <0 0x17000000 0 0x1800000>;
no-map;
--
2.52.0

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@ -1,36 +0,0 @@
From 9172802977b738581bd9e3d8fd75fb6289ece97e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= <duje@dujemihanovic.xyz>
Date: Sat, 13 Sep 2025 23:21:11 +0200
Subject: [PATCH 12/21] arm64: dts: marvell: samsung,coreprimevelte: Add USB
connector
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Add a node for the micro-USB connector found on the board.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
.../boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index 7fd5420937bd..10e6730d71b6 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -69,6 +69,12 @@ muic: extcon@14 {
reg = <0x14>;
interrupt-parent = <&gpio>;
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
+
+ usb_con: connector {
+ compatible = "usb-b-connector";
+ label = "micro-USB";
+ type = "micro";
+ };
};
};
--
2.52.0

View file

@ -1,65 +0,0 @@
From 07faaf235b21a015d7b1de5e6938aa8527c73ec7 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Duje=20Mihanovi=C4=87?= <duje@dujemihanovic.xyz>
Date: Sat, 13 Sep 2025 23:12:51 +0200
Subject: [PATCH 13/21] arm64: dts: marvell: pxa1908: Add power domains
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Update the APMU clock controller's compatible to allow the new power
domain driver to probe. Also add the first two power domain consumers:
IOMMU (fixes probing) and framebuffer.
Signed-off-by: Duje Mihanović <duje@dujemihanovic.xyz>
---
.../boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts | 1 +
arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi | 5 ++++-
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
index 10e6730d71b6..b2ce5edd9c6a 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908-samsung-coreprimevelte.dts
@@ -24,6 +24,7 @@ chosen {
fb0: framebuffer@17177000 {
compatible = "simple-framebuffer";
reg = <0 0x17177000 0 (480 * 800 * 4)>;
+ power-domains = <&apmu PXA1908_POWER_DOMAIN_DSI>;
width = <480>;
height = <800>;
stride = <(480 * 4)>;
diff --git a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
index deb1a9df27c2..5778bfdb8567 100644
--- a/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
+++ b/arch/arm64/boot/dts/marvell/mmp/pxa1908.dtsi
@@ -3,6 +3,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/marvell,pxa1908.h>
+#include <dt-bindings/power/marvell,pxa1908-power.h>
/ {
model = "Marvell Armada PXA1908";
@@ -93,6 +94,7 @@ smmu: iommu@c0010000 {
#iommu-cells = <1>;
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
+ power-domains = <&apmu PXA1908_POWER_DOMAIN_VPU>;
status = "disabled";
};
@@ -337,9 +339,10 @@ sdh2: mmc@81000 {
};
apmu: clock-controller@82800 {
- compatible = "marvell,pxa1908-apmu";
+ compatible = "marvell,pxa1908-apmu", "syscon";
reg = <0x82800 0x400>;
#clock-cells = <1>;
+ #power-domain-cells = <1>;
};
};
};
--
2.52.0

View file

@ -1,103 +0,0 @@
From 63632767d27a746c6e53551b790af9332f0e69dd Mon Sep 17 00:00:00 2001
From: Guodong Xu <guodong@riscstar.com>
Date: Thu, 18 Sep 2025 22:27:27 +0800
Subject: [PATCH 14/21] dmaengine: mmp_pdma: fix DMA mask handling
The driver's existing logic for setting the DMA mask for "marvell,pdma-1.0"
was flawed. It incorrectly relied on pdev->dev->coherent_dma_mask instead
of declaring the hardware's fixed addressing capability. A cleaner and
more correct approach is to define the mask directly based on the hardware
limitations.
The MMP/PXA PDMA controller is a 32-bit DMA engine. This is supported by
datasheets and various dtsi files for PXA25x, PXA27x, PXA3xx, and MMP2,
all of which are 32-bit systems.
This patch simplifies the driver's logic by replacing the 'u64 dma_mask'
field with a simpler 'u32 dma_width' to store the addressing capability
in bits. The complex if/else block in probe() is then replaced with a
single, clear call to dma_set_mask_and_coherent(). This sets a fixed
32-bit DMA mask for "marvell,pdma-1.0" and a 64-bit mask for
"spacemit,k1-pdma," matching each device's hardware capabilities.
Finally, this change also works around a specific build error encountered
with clang-20 on x86_64 allyesconfig. The shift-count-overflow error is
caused by a known clang compiler issue where the DMA_BIT_MASK(n) macro's
ternary operator is not correctly evaluated in static initializers. By
moving the macro's evaluation into the probe() function, the driver avoids
this compiler bug.
Fixes: 5cfe585d8624 ("dmaengine: mmp_pdma: Add SpacemiT K1 PDMA support with 64-bit addressing")
Reported-by: Naresh Kamboju <naresh.kamboju@linaro.org>
Closes: https://lore.kernel.org/lkml/CA+G9fYsPcMfW-e_0_TRqu4cnwqOqYF3aJOeKUYk6Z4qRStdFvg@mail.gmail.com
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Guodong Xu <guodong@riscstar.com>
Tested-by: Naresh Kamboju <naresh.kamboju@linaro.org>
Tested-by: Nathan Chancellor <nathan@kernel.org> # build
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
---
drivers/dma/mmp_pdma.c | 20 ++++++++------------
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/drivers/dma/mmp_pdma.c b/drivers/dma/mmp_pdma.c
index d07229a74886..86661eb3cde1 100644
--- a/drivers/dma/mmp_pdma.c
+++ b/drivers/dma/mmp_pdma.c
@@ -152,8 +152,8 @@ struct mmp_pdma_phy {
*
* Controller Configuration:
* @run_bits: Control bits in DCSR register for channel start/stop
- * @dma_mask: DMA addressing capability of controller. 0 to use OF/platform
- * settings, or explicit mask like DMA_BIT_MASK(32/64)
+ * @dma_width: DMA addressing width in bits (32 or 64). Determines the
+ * DMA mask capability of the controller hardware.
*/
struct mmp_pdma_ops {
/* Hardware Register Operations */
@@ -173,7 +173,7 @@ struct mmp_pdma_ops {
/* Controller Configuration */
u32 run_bits;
- u64 dma_mask;
+ u32 dma_width;
};
struct mmp_pdma_device {
@@ -1172,7 +1172,7 @@ static const struct mmp_pdma_ops marvell_pdma_v1_ops = {
.get_desc_src_addr = get_desc_src_addr_32,
.get_desc_dst_addr = get_desc_dst_addr_32,
.run_bits = (DCSR_RUN),
- .dma_mask = 0, /* let OF/platform set DMA mask */
+ .dma_width = 32,
};
static const struct mmp_pdma_ops spacemit_k1_pdma_ops = {
@@ -1185,7 +1185,7 @@ static const struct mmp_pdma_ops spacemit_k1_pdma_ops = {
.get_desc_src_addr = get_desc_src_addr_64,
.get_desc_dst_addr = get_desc_dst_addr_64,
.run_bits = (DCSR_RUN | DCSR_LPAEEN),
- .dma_mask = DMA_BIT_MASK(64), /* force 64-bit DMA addr capability */
+ .dma_width = 64,
};
static const struct of_device_id mmp_pdma_dt_ids[] = {
@@ -1314,13 +1314,9 @@ static int mmp_pdma_probe(struct platform_device *op)
pdev->device.directions = BIT(DMA_MEM_TO_DEV) | BIT(DMA_DEV_TO_MEM);
pdev->device.residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR;
- /* Set DMA mask based on ops->dma_mask, or OF/platform */
- if (pdev->ops->dma_mask)
- dma_set_mask(pdev->dev, pdev->ops->dma_mask);
- else if (pdev->dev->coherent_dma_mask)
- dma_set_mask(pdev->dev, pdev->dev->coherent_dma_mask);
- else
- dma_set_mask(pdev->dev, DMA_BIT_MASK(64));
+ /* Set DMA mask based on controller hardware capabilities */
+ dma_set_mask_and_coherent(pdev->dev,
+ DMA_BIT_MASK(pdev->ops->dma_width));
ret = dma_async_device_register(&pdev->device);
if (ret) {
--
2.52.0

View file

@ -2,7 +2,7 @@
maintainer="Duje Mihanović <duje@dujemihanovic.xyz>"
_flavor=samsung-coreprimevelte
pkgname=linux-$_flavor
pkgver=6.18.2
pkgver=6.19.10
pkgrel=0
pkgdesc="Samsung Galaxy Core Prime VE LTE mainline kernel"
arch="aarch64"
@ -35,27 +35,15 @@ esac
source="
https://cdn.kernel.org/pub/linux/kernel/v${_kernver%%.*}.x/linux-$_kernver.tar.xz
0001-arm64-dts-samsung-coreprimevelte-add-PMIC.patch
0002-arm64-dts-samsung-coreprimevelte-add-touchscreen.patch
0003-arm64-dts-samsung-coreprimevelte-add-SDIO.patch
0004-arm64-dts-marvell-samsung-coreprimevelte-Add-backlig.patch
0005-arm64-dts-marvell-samsung-coreprimevelte-Correct-CD-.patch
0006-arm64-dts-marvell-samsung-coreprimevelte-Enable-eMMC.patch
0007-arm64-dts-marvell-pxa1908-Add-PWMs.patch
0008-arm64-dts-marvell-samsung-coreprimevelte-Add-vibrato.patch
0009-arm64-dts-marvell-pxa1908-Move-ramoops-to-SoC-dtsi.patch
0010-arm64-dts-marvell-samsung-coreprimevelte-Drop-some-r.patch
0011-arm64-dts-marvell-samsung-coreprimevelte-Fill-in-mem.patch
0012-arm64-dts-marvell-samsung-coreprimevelte-Add-USB-con.patch
0013-arm64-dts-marvell-pxa1908-Add-power-domains.patch
0014-dmaengine-mmp_pdma-fix-DMA-mask-handling.patch
0015-dt-bindings-mwifiex-document-use-with-the-SD8777-chi.patch
0016-net-mwifiex-add-support-for-the-SD8777-chipset.patch
0017-DONOTMERGE-net-mwifiex-fix-timeouts-with-the-SD8777-.patch
0018-arm64-dts-samsung-coreprimevelte-add-wifi-node.patch
0019-Bluetooth-btmrvl_sdio-Add-support-for-SD8777-chipset.patch
0020-arm64-dts-marvell-samsung-coreprimevelte-Use-memory-.patch
0021-arm64-dts-marvell-samsung-coreprimevelte-Increase-to.patch
0001-dt-bindings-mwifiex-document-use-with-the-SD8777-chi.patch
0002-net-mwifiex-add-support-for-the-SD8777-chipset.patch
0003-DONOTMERGE-net-mwifiex-fix-timeouts-with-the-SD8777-.patch
0004-arm64-dts-samsung-coreprimevelte-add-wifi-node.patch
0005-Bluetooth-btmrvl_sdio-Add-support-for-SD8777-chipset.patch
0006-arm64-dts-marvell-samsung-coreprimevelte-Use-memory-.patch
0007-arm64-dts-marvell-samsung-coreprimevelte-Increase-to.patch
0008-arm64-dts-marvell-samsung-coreprimevelte-Add-missing.patch
0009-backlight-ktd2801-enable-BL_CORE_SUSPENDRESUME.patch
$_config
"
builddir="$srcdir"/linux-"$_kernver"
@ -87,27 +75,15 @@ package() {
}
sha512sums="
15989d1a26c6a5200b8eab4ba348b308466398aa75dda3844b37e7eb320206236d47c94cbc0e0b1d7ead10385ca84d34d0f2aa02ba5c1bd65ca6a5aa71c57117 linux-6.18.2.tar.xz
319b165b01814a13efb3c765440d031c1ba3b773434d5523c12d306c5450aa143ca942b15efaa1df7442c7f966c781b09d431acdb06295cf70a8daa90d890d71 0001-arm64-dts-samsung-coreprimevelte-add-PMIC.patch
aa79d55f31fd2d5b8aec2a532a8b792eef07c5f57a7f3dbd5477047b1ce674b9a82ab057248807214383fd6441f08423acbcfe54c9e48aee5a2459afbd29743d 0002-arm64-dts-samsung-coreprimevelte-add-touchscreen.patch
57935ec12875a8c543789f91c5839e8cdeef27bc909f8136e8bad3ab2e48347872916841a2e369140bf99e59bec85bec6b89458e6a98735730253b8df6c038df 0003-arm64-dts-samsung-coreprimevelte-add-SDIO.patch
b7af2099b8ed4fbb1a6644cfbb798e86174802d61b96202e948a5695750f7b2ce9d271e53f8b2a414287fa30bb008a6ec603535ba2854e9fcbbeb3e38eaf3d10 0004-arm64-dts-marvell-samsung-coreprimevelte-Add-backlig.patch
c8e107023208cc105737e3de383895cd8c978feddee321fb32772dad6ae43fa329ccaa2b40e63c6b5542500ecadeb4d11caa86d04c24b605ac2d0625cb49c9e2 0005-arm64-dts-marvell-samsung-coreprimevelte-Correct-CD-.patch
e8e30b5f46c1d017db27edb1cf2812454a30701927957bf8248040c221892b610543792986c937e421430f662d18e2ab06456af0447cba3a8fddd3fe90d59a5f 0006-arm64-dts-marvell-samsung-coreprimevelte-Enable-eMMC.patch
f89c2d44cd5233eac3d157957703585fa60aea96de98e12c3d3eb146108ec321a1bdfec539e9dabdb2fa7cc00dbbfef456182ee546d879864ce1aea10e8ada99 0007-arm64-dts-marvell-pxa1908-Add-PWMs.patch
a02309ca372dcb551c21a8d98e80d8fc35da53b0aa06c09c05d812960aa60f431c473a9cae85a31bf67645da69e160ea9df8cb8a626e7e5a6eea7a59ba82f5a3 0008-arm64-dts-marvell-samsung-coreprimevelte-Add-vibrato.patch
4151f51571fc94db8b2b5d48edfea4ea74d77d23d4a4676e4c2db482a63a70b7493ae3393d4a71bfc0f9941ebb70528dc0a23ae8734e1ceac1900a207e3bea4b 0009-arm64-dts-marvell-pxa1908-Move-ramoops-to-SoC-dtsi.patch
46f17f2a2ee571b6d794a958d532f506e305f26c105a70fe5676d5fdf11823fe0fc364505fe3c9ee3fa5ac86d86032d1874b1c5d704b5c9ffaa47a9e30284f2e 0010-arm64-dts-marvell-samsung-coreprimevelte-Drop-some-r.patch
a7d11b3fe58dd5349ba8307af77df75d3ed7d2a971872251eb8b4bcc3d4c9c80c15224fecac2d0c950da7a39e91a52bbd20c258c9b089c5fbdec6d684a94f21d 0011-arm64-dts-marvell-samsung-coreprimevelte-Fill-in-mem.patch
db58b31fa35ab95d30a0132a419dacac1e35a6b7a7cc2b45d13c9878a74ca489512e67c3b5bf85c95428fbc905b3fcda945bcbf6080008d1760067f3e61f43d0 0012-arm64-dts-marvell-samsung-coreprimevelte-Add-USB-con.patch
662aa29dd8e5d95ad4dbb7ad3c98761f9493d6713378f4b4a449d747241e6d6be63d363b9dd5f6ffc33f814ccd13fbed571f4082d864cf538ae89a1da55df8a1 0013-arm64-dts-marvell-pxa1908-Add-power-domains.patch
61f5d7faef590c1fc87513d777b8fceed6502075589d5a4a49962647e7cdf6f75482bfd2ecdb48c66b8a1372604cd0189a97a1c8a36d05652d1f7c2178ee7597 0014-dmaengine-mmp_pdma-fix-DMA-mask-handling.patch
2393932e4b91cd7ef59a9c1795cc5987e184e7d24199993df1d8d19af470acb1e7c7fd0c05d08fe5b8ad213f521077b7138d1eed8f12c23cab42aa91ef529c57 0015-dt-bindings-mwifiex-document-use-with-the-SD8777-chi.patch
16ffff8c2eebee47db8298841ac5627a7a956711b7308fa8b1e24c97a3c84a596d0c8ef279d3c2d5e0a028859b4b10fc2fa3bf9b19609df92e3355ad5accbc70 0016-net-mwifiex-add-support-for-the-SD8777-chipset.patch
0ccd19306ba8555673a85a491ee12bc5ed3d43ad1aa4548dbdfd58ea9b4ba81ff294f4cda4daabc5d7f0064e389b6b32d34c1e2a84c69b5241ae923baa2e643d 0017-DONOTMERGE-net-mwifiex-fix-timeouts-with-the-SD8777-.patch
d93d9a3ad2c02b9df69dc5291cd1f038a35aa2af2156f2d0c79e43a7b24e9e97dbf183421a9a448df54d35144cb827115246617ad3e95b9a5589c528ba320630 0018-arm64-dts-samsung-coreprimevelte-add-wifi-node.patch
b03f0cbbc5ec4d2bfeb1d021c5e91cc55c6d8742043e8e0e9754ec160571eb2ffc83f9811efa0c459dade1854b3fe51f7cb21ab3001a53e5db7651171ed784a5 0019-Bluetooth-btmrvl_sdio-Add-support-for-SD8777-chipset.patch
560b45049530c5453dc7f51a2632fa390e9f7380ee142f17a311eb806d3a7275e7b8e6de7b5f956a76ea2e99210841098b83320e3db808d9f0aa2de7c1ada8e7 0020-arm64-dts-marvell-samsung-coreprimevelte-Use-memory-.patch
95a6f5d31df6869dd36eb7397339ccecc1b40456159932071a19d76551de528970765230de09b733a4a51d4b6d501c3d77c20b1d052846626b624d5e079170b2 0021-arm64-dts-marvell-samsung-coreprimevelte-Increase-to.patch
3fd69d4c87d72a472bc05669864d50b8c9fe5816e98faace31fc63b55c118eff8c30594e5e10c65b6f6e38ff99305dd3bf6e5fcfa91d3a6a08ba5e9e12e0b98d config-samsung-coreprimevelte.aarch64
11a397c54dddf02fc62b52b2571a0d13cf96450c2e67cffa759c34b9432e51dcb39871347c9cdbca36cfaf78198015d8d7a4d2c2a8d506e22b998fd2b185341b linux-6.19.10.tar.xz
853f63245c4c8c4a6229d52e2f1444eea6b67e8ecfacea4431c0a661ae0dff307086cba6677639a02d723c97a184a0075171747058107ac62ee98641c54fbde6 0001-dt-bindings-mwifiex-document-use-with-the-SD8777-chi.patch
1813ae97fc99fa451f52a79cfb4a33ade26db3d357d4a7d0faec39eeec5046e6905d7caee7f0f8ef9029cd14690fd4794de568d94608559ea03720185f689d7c 0002-net-mwifiex-add-support-for-the-SD8777-chipset.patch
a75a8f203d36e2410107e39bc591582b659ec242298125935d6daf027259d845ab8235c04bcd7ca008d309d1bfcc42a8be20e7a95d168ec7f9ffff6bb8c9a5a4 0003-DONOTMERGE-net-mwifiex-fix-timeouts-with-the-SD8777-.patch
b09f1e155728dd4322df42fc1ad8221ca3c6999724bd647566e073a20f91b0e67dab202a92f2c8f6ee977c3c1985e0e646212f653287660d05652d2791dd74cb 0004-arm64-dts-samsung-coreprimevelte-add-wifi-node.patch
24e6a9e7f39ba72df60c91b48488951a0b3ad5bc3568ba191c98de48be7f58c050c392504729c4f27bb2664f55d5ff8c3b72a196614aa43ee5cfb81be16754b8 0005-Bluetooth-btmrvl_sdio-Add-support-for-SD8777-chipset.patch
fcd10232882fcdabc122689aad63cb32eab6f626f76fea67a92928affe48705d92a4a75ff6e587419537c8baa3eaa815f68905d6d164915ed7cdd8b91de5a0d0 0006-arm64-dts-marvell-samsung-coreprimevelte-Use-memory-.patch
2cd76bf89f2b8baa9eb998f7a6553782c0b8e213fc9d0ed6cf8707af5a8d3e4722f00626642571a9d381078ada6fcf8f39763edab869db459455d3f6b66a1edd 0007-arm64-dts-marvell-samsung-coreprimevelte-Increase-to.patch
e5cf0fbe4a727bfe83d582714b5a109e989f9b325303d33905cace7534c63462d5ee3374388b802b973fb288d3d7d390806982269465ea461312f8e6940ae534 0008-arm64-dts-marvell-samsung-coreprimevelte-Add-missing.patch
b454382126dd51ebd51dd7b596088a937dec339f2763233ba1ed39b087a84b3342fbec15f03cab6829a55b6342fb80670490e09ee292188670673e0f5bab3fe7 0009-backlight-ktd2801-enable-BL_CORE_SUSPENDRESUME.patch
5f63b452563505bc16d613cd7051706bfb08b51752562b696b7aec9b320b5b57968ce08bcc7751c459580a3c19a4bb08461ede4f39f0fd0e8501c20edab1eba0 config-samsung-coreprimevelte.aarch64
"

View file

@ -1,16 +1,16 @@
#
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 6.18.2 Kernel Configuration
# Linux/arm64 6.19.10 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="Alpine clang version 21.1.7"
CONFIG_CC_VERSION_TEXT="Alpine clang version 22.1.2"
CONFIG_GCC_VERSION=0
CONFIG_CC_IS_CLANG=y
CONFIG_CLANG_VERSION=210107
CONFIG_CLANG_VERSION=220102
CONFIG_AS_IS_LLVM=y
CONFIG_AS_VERSION=210107
CONFIG_AS_VERSION=220102
CONFIG_LD_VERSION=0
CONFIG_LD_IS_LLD=y
CONFIG_LLD_VERSION=210107
CONFIG_LLD_VERSION=220102
CONFIG_RUSTC_VERSION=0
CONFIG_RUSTC_LLVM_VERSION=0
CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y
@ -103,7 +103,7 @@ CONFIG_BPF_JIT=y
CONFIG_BPF_JIT_DEFAULT_ON=y
CONFIG_BPF_UNPRIV_DEFAULT_OFF=y
# CONFIG_BPF_PRELOAD is not set
# CONFIG_BPF_LSM is not set
CONFIG_BPF_LSM=y
# end of BPF subsystem
CONFIG_PREEMPT_BUILD=y
@ -224,6 +224,7 @@ CONFIG_RD_LZO=y
CONFIG_RD_LZ4=y
CONFIG_RD_ZSTD=y
# CONFIG_BOOT_CONFIG is not set
CONFIG_CMDLINE_LOG_WRAP_IDEAL_LEN=1021
CONFIG_INITRAMFS_PRESERVE_MTIME=y
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y
# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
@ -284,10 +285,15 @@ CONFIG_KEXEC_CORE=y
CONFIG_KEXEC=y
CONFIG_KEXEC_FILE=y
# CONFIG_KEXEC_SIG is not set
# CONFIG_KEXEC_HANDOVER is not set
CONFIG_CRASH_DUMP=y
# CONFIG_CRASH_DM_CRYPT is not set
# end of Kexec and crash features
#
# Live Update and Kexec HandOver
#
# CONFIG_KEXEC_HANDOVER is not set
# end of Live Update and Kexec HandOver
# end of General setup
CONFIG_ARM64=y
@ -330,6 +336,7 @@ CONFIG_BUILTIN_RETURN_ADDRESS_STRIPS_PAC=y
# CONFIG_ARCH_BERLIN is not set
# CONFIG_ARCH_BITMAIN is not set
# CONFIG_ARCH_BLAIZE is not set
# CONFIG_ARCH_BST is not set
# CONFIG_ARCH_CIX is not set
# CONFIG_ARCH_EXYNOS is not set
# CONFIG_ARCH_K3 is not set
@ -515,6 +522,7 @@ CONFIG_AS_HAS_CFI_NEGATE_RA_STATE=y
#
CONFIG_ARM64_AMU_EXTN=y
CONFIG_ARM64_TLB_RANGE=y
# CONFIG_ARM64_MPAM is not set
# end of ARMv8.4 architectural features
#
@ -592,6 +600,7 @@ CONFIG_PM_SLEEP_SMP=y
# CONFIG_PM_AUTOSLEEP is not set
# CONFIG_PM_USERSPACE_AUTOSLEEP is not set
# CONFIG_PM_WAKELOCKS is not set
# CONFIG_PM_QOS_CPU_SYSTEM_WAKEUP is not set
CONFIG_PM=y
# CONFIG_PM_DEBUG is not set
CONFIG_PM_CLK=y
@ -681,11 +690,12 @@ CONFIG_SCHED_MC=y
CONFIG_HOTPLUG_CORE_SYNC=y
CONFIG_HOTPLUG_CORE_SYNC_DEAD=y
CONFIG_GENERIC_IRQ_ENTRY=y
# CONFIG_KPROBES is not set
CONFIG_KPROBES=y
CONFIG_JUMP_LABEL=y
# CONFIG_STATIC_KEYS_SELFTEST is not set
CONFIG_UPROBES=y
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_KRETPROBES=y
CONFIG_HAVE_IOREMAP_PROT=y
CONFIG_HAVE_KPROBES=y
CONFIG_HAVE_KRETPROBES=y
@ -978,6 +988,14 @@ CONFIG_TRANSPARENT_HUGEPAGE=y
CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y
# CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set
# CONFIG_TRANSPARENT_HUGEPAGE_NEVER is not set
CONFIG_TRANSPARENT_HUGEPAGE_SHMEM_HUGE_NEVER=y
# CONFIG_TRANSPARENT_HUGEPAGE_SHMEM_HUGE_ALWAYS is not set
# CONFIG_TRANSPARENT_HUGEPAGE_SHMEM_HUGE_WITHIN_SIZE is not set
# CONFIG_TRANSPARENT_HUGEPAGE_SHMEM_HUGE_ADVISE is not set
CONFIG_TRANSPARENT_HUGEPAGE_TMPFS_HUGE_NEVER=y
# CONFIG_TRANSPARENT_HUGEPAGE_TMPFS_HUGE_ALWAYS is not set
# CONFIG_TRANSPARENT_HUGEPAGE_TMPFS_HUGE_WITHIN_SIZE is not set
# CONFIG_TRANSPARENT_HUGEPAGE_TMPFS_HUGE_ADVISE is not set
CONFIG_THP_SWAP=y
# CONFIG_READ_ONLY_THP_FOR_FS is not set
# CONFIG_NO_PAGE_MAPCOUNT is not set
@ -1212,11 +1230,13 @@ CONFIG_NETFILTER_XT_NAT=m
# CONFIG_NETFILTER_XT_TARGET_NETMAP is not set
# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
# CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set
# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
CONFIG_NETFILTER_XT_TARGET_REDIRECT=m
CONFIG_NETFILTER_XT_TARGET_MASQUERADE=m
# CONFIG_NETFILTER_XT_TARGET_TEE is not set
# CONFIG_NETFILTER_XT_TARGET_TPROXY is not set
# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
CONFIG_NETFILTER_XT_TARGET_TCPMSS=m
# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
@ -1350,7 +1370,7 @@ CONFIG_IP_NF_TARGET_REDIRECT=m
CONFIG_IP_NF_MANGLE=m
# CONFIG_IP_NF_TARGET_ECN is not set
# CONFIG_IP_NF_TARGET_TTL is not set
# CONFIG_IP_NF_RAW is not set
CONFIG_IP_NF_RAW=m
# CONFIG_IP_NF_SECURITY is not set
# CONFIG_IP_NF_ARPTABLES is not set
# CONFIG_IP_NF_ARPFILTER is not set
@ -1385,7 +1405,7 @@ CONFIG_IP6_NF_FILTER=m
CONFIG_IP6_NF_TARGET_REJECT=m
# CONFIG_IP6_NF_TARGET_SYNPROXY is not set
CONFIG_IP6_NF_MANGLE=m
# CONFIG_IP6_NF_RAW is not set
CONFIG_IP6_NF_RAW=m
# CONFIG_IP6_NF_SECURITY is not set
CONFIG_IP6_NF_NAT=m
CONFIG_IP6_NF_TARGET_MASQUERADE=m
@ -1563,6 +1583,7 @@ CONFIG_RFKILL_INPUT=y
# CONFIG_LWTUNNEL is not set
CONFIG_DST_CACHE=y
CONFIG_GRO_CELLS=y
CONFIG_NET_SELFTESTS=m
CONFIG_NET_SOCK_MSG=y
CONFIG_PAGE_POOL=y
# CONFIG_PAGE_POOL_STATS is not set
@ -1639,11 +1660,7 @@ CONFIG_MHI_BUS=m
# CONFIG_MHI_BUS_EP is not set
# end of Bus devices
#
# Cache Drivers
#
# end of Cache Drivers
# CONFIG_CACHEMAINT_FOR_HOTPLUG is not set
# CONFIG_CONNECTOR is not set
#
@ -1750,7 +1767,7 @@ CONFIG_ZRAM_BACKEND_LZ4=y
CONFIG_ZRAM_BACKEND_LZ4HC=y
CONFIG_ZRAM_BACKEND_ZSTD=y
CONFIG_ZRAM_BACKEND_DEFLATE=y
# CONFIG_ZRAM_BACKEND_842 is not set
CONFIG_ZRAM_BACKEND_842=y
CONFIG_ZRAM_BACKEND_LZO=y
# CONFIG_ZRAM_DEF_COMP_LZORLE is not set
# CONFIG_ZRAM_DEF_COMP_LZO is not set
@ -1758,6 +1775,7 @@ CONFIG_ZRAM_DEF_COMP_LZ4=y
# CONFIG_ZRAM_DEF_COMP_LZ4HC is not set
# CONFIG_ZRAM_DEF_COMP_ZSTD is not set
# CONFIG_ZRAM_DEF_COMP_DEFLATE is not set
# CONFIG_ZRAM_DEF_COMP_842 is not set
CONFIG_ZRAM_DEF_COMP="lz4"
# CONFIG_ZRAM_WRITEBACK is not set
# CONFIG_ZRAM_TRACK_ENTRY_ACTIME is not set
@ -1771,7 +1789,8 @@ CONFIG_BLK_DEV_NBD=m
# CONFIG_ATA_OVER_ETH is not set
# CONFIG_XEN_BLKDEV_FRONTEND is not set
# CONFIG_BLK_DEV_RBD is not set
# CONFIG_BLK_DEV_UBLK is not set
CONFIG_BLK_DEV_UBLK=m
CONFIG_BLKDEV_UBLK_LEGACY_OPCODES=y
#
# NVME Support
@ -1832,9 +1851,43 @@ CONFIG_NTSYNC=m
#
# SCSI device support
#
CONFIG_SCSI_MOD=y
CONFIG_SCSI_MOD=m
# CONFIG_RAID_ATTRS is not set
# CONFIG_SCSI is not set
CONFIG_SCSI_COMMON=m
CONFIG_SCSI=m
CONFIG_SCSI_DMA=y
CONFIG_SCSI_PROC_FS=y
#
# SCSI support type (disk, tape, CD-ROM)
#
CONFIG_BLK_DEV_SD=m
# CONFIG_CHR_DEV_ST is not set
# CONFIG_BLK_DEV_SR is not set
# CONFIG_CHR_DEV_SG is not set
CONFIG_BLK_DEV_BSG=y
# CONFIG_CHR_DEV_SCH is not set
# CONFIG_SCSI_CONSTANTS is not set
# CONFIG_SCSI_LOGGING is not set
# CONFIG_SCSI_SCAN_ASYNC is not set
#
# SCSI Transports
#
# CONFIG_SCSI_SPI_ATTRS is not set
# CONFIG_SCSI_FC_ATTRS is not set
# CONFIG_SCSI_ISCSI_ATTRS is not set
# CONFIG_SCSI_SAS_ATTRS is not set
# CONFIG_SCSI_SAS_LIBSAS is not set
# CONFIG_SCSI_SRP_ATTRS is not set
# end of SCSI Transports
CONFIG_SCSI_LOWLEVEL=y
# CONFIG_ISCSI_TCP is not set
# CONFIG_ISCSI_BOOT_SYSFS is not set
# CONFIG_XEN_SCSI_FRONTEND is not set
# CONFIG_SCSI_DEBUG is not set
# CONFIG_SCSI_DH is not set
# end of SCSI device support
# CONFIG_ATA is not set
@ -1875,6 +1928,7 @@ CONFIG_DM_INTEGRITY=m
# CONFIG_DM_VDO is not set
# CONFIG_TARGET_CORE is not set
CONFIG_NETDEVICES=y
CONFIG_MII=m
CONFIG_NET_CORE=y
# CONFIG_BONDING is not set
CONFIG_DUMMY=m
@ -1904,9 +1958,92 @@ CONFIG_VETH=m
# CONFIG_NET_VRF is not set
# CONFIG_MHI_NET is not set
# CONFIG_ETHERNET is not set
# CONFIG_MDIO_BUS is not set
# CONFIG_PHYLIB is not set
CONFIG_MDIO_BUS=m
CONFIG_PHYLINK=m
CONFIG_PHYLIB=m
CONFIG_SWPHY=y
# CONFIG_LED_TRIGGER_PHY is not set
CONFIG_PHYLIB_LEDS=y
CONFIG_FIXED_PHY=m
# CONFIG_SFP is not set
#
# MII PHY device drivers
#
# CONFIG_AS21XXX_PHY is not set
# CONFIG_AIR_EN8811H_PHY is not set
# CONFIG_AMD_PHY is not set
# CONFIG_ADIN_PHY is not set
# CONFIG_ADIN1100_PHY is not set
# CONFIG_AQUANTIA_PHY is not set
CONFIG_AX88796B_PHY=m
# CONFIG_BROADCOM_PHY is not set
# CONFIG_BCM54140_PHY is not set
# CONFIG_BCM7XXX_PHY is not set
# CONFIG_BCM84881_PHY is not set
# CONFIG_BCM87XX_PHY is not set
# CONFIG_CICADA_PHY is not set
# CONFIG_CORTINA_PHY is not set
# CONFIG_DAVICOM_PHY is not set
# CONFIG_ICPLUS_PHY is not set
# CONFIG_LXT_PHY is not set
# CONFIG_INTEL_XWAY_PHY is not set
# CONFIG_LSI_ET1011C_PHY is not set
# CONFIG_MARVELL_PHY is not set
# CONFIG_MARVELL_10G_PHY is not set
# CONFIG_MARVELL_88Q2XXX_PHY is not set
# CONFIG_MARVELL_88X2222_PHY is not set
# CONFIG_MAXLINEAR_GPHY is not set
# CONFIG_MAXLINEAR_86110_PHY is not set
# CONFIG_MEDIATEK_GE_PHY is not set
# CONFIG_MICREL_PHY is not set
# CONFIG_MICROCHIP_T1S_PHY is not set
# CONFIG_MICROCHIP_PHY is not set
# CONFIG_MICROCHIP_T1_PHY is not set
# CONFIG_MICROSEMI_PHY is not set
# CONFIG_MOTORCOMM_PHY is not set
# CONFIG_NATIONAL_PHY is not set
# CONFIG_NXP_CBTX_PHY is not set
# CONFIG_NXP_C45_TJA11XX_PHY is not set
# CONFIG_NCN26000_PHY is not set
# CONFIG_AT803X_PHY is not set
# CONFIG_QCA83XX_PHY is not set
# CONFIG_QCA808X_PHY is not set
# CONFIG_QCA807X_PHY is not set
# CONFIG_QSEMI_PHY is not set
# CONFIG_REALTEK_PHY is not set
# CONFIG_RENESAS_PHY is not set
# CONFIG_ROCKCHIP_PHY is not set
# CONFIG_SMSC_PHY is not set
# CONFIG_STE10XP is not set
# CONFIG_TERANETICS_PHY is not set
# CONFIG_DP83822_PHY is not set
# CONFIG_DP83TC811_PHY is not set
# CONFIG_DP83848_PHY is not set
# CONFIG_DP83867_PHY is not set
# CONFIG_DP83869_PHY is not set
# CONFIG_DP83TD510_PHY is not set
# CONFIG_DP83TG720_PHY is not set
# CONFIG_VITESSE_PHY is not set
# CONFIG_XILINX_GMII2RGMII is not set
# CONFIG_PSE_CONTROLLER is not set
CONFIG_FWNODE_MDIO=m
CONFIG_OF_MDIO=m
# CONFIG_MDIO_BITBANG is not set
# CONFIG_MDIO_BCM_UNIMAC is not set
# CONFIG_MDIO_HISI_FEMAC is not set
# CONFIG_MDIO_MVUSB is not set
# CONFIG_MDIO_MSCC_MIIM is not set
# CONFIG_MDIO_OCTEON is not set
# CONFIG_MDIO_IPQ4019 is not set
# CONFIG_MDIO_IPQ8064 is not set
#
# MDIO Multiplexers
#
# CONFIG_MDIO_BUS_MUX_GPIO is not set
# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set
# CONFIG_MDIO_BUS_MUX_MMIOREG is not set
#
# PCS device drivers
@ -1916,7 +2053,51 @@ CONFIG_VETH=m
# CONFIG_PPP is not set
# CONFIG_SLIP is not set
# CONFIG_USB_NET_DRIVERS is not set
CONFIG_USB_NET_DRIVERS=m
# CONFIG_USB_CATC is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_RTL8150 is not set
CONFIG_USB_RTL8152=m
# CONFIG_USB_LAN78XX is not set
CONFIG_USB_USBNET=m
CONFIG_USB_NET_AX8817X=m
CONFIG_USB_NET_AX88179_178A=m
CONFIG_USB_NET_CDCETHER=m
# CONFIG_USB_NET_CDC_EEM is not set
CONFIG_USB_NET_CDC_NCM=m
# CONFIG_USB_NET_HUAWEI_CDC_NCM is not set
# CONFIG_USB_NET_CDC_MBIM is not set
# CONFIG_USB_NET_DM9601 is not set
# CONFIG_USB_NET_SR9700 is not set
# CONFIG_USB_NET_SR9800 is not set
# CONFIG_USB_NET_SMSC75XX is not set
# CONFIG_USB_NET_SMSC95XX is not set
# CONFIG_USB_NET_GL620A is not set
CONFIG_USB_NET_NET1080=m
# CONFIG_USB_NET_PLUSB is not set
# CONFIG_USB_NET_MCS7830 is not set
# CONFIG_USB_NET_RNDIS_HOST is not set
CONFIG_USB_NET_CDC_SUBSET_ENABLE=m
CONFIG_USB_NET_CDC_SUBSET=m
# CONFIG_USB_ALI_M5632 is not set
# CONFIG_USB_AN2720 is not set
CONFIG_USB_BELKIN=y
CONFIG_USB_ARMLINUX=y
# CONFIG_USB_EPSON2888 is not set
# CONFIG_USB_KC2190 is not set
CONFIG_USB_NET_ZAURUS=m
# CONFIG_USB_NET_CX82310_ETH is not set
# CONFIG_USB_NET_KALMIA is not set
# CONFIG_USB_NET_QMI_WWAN is not set
# CONFIG_USB_HSO is not set
# CONFIG_USB_NET_INT51X1 is not set
# CONFIG_USB_IPHETH is not set
# CONFIG_USB_SIERRA_NET is not set
# CONFIG_USB_VL600 is not set
# CONFIG_USB_NET_CH9200 is not set
# CONFIG_USB_NET_AQC111 is not set
CONFIG_USB_RTL8153_ECM=m
CONFIG_WLAN=y
# CONFIG_WLAN_VENDOR_ADMTEK is not set
# CONFIG_WLAN_VENDOR_ATH is not set
@ -2203,7 +2384,6 @@ CONFIG_LDISC_AUTOLOAD=y
#
CONFIG_SERIAL_EARLYCON=y
CONFIG_SERIAL_8250=y
# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
# CONFIG_SERIAL_8250_16550A_VARIANTS is not set
# CONFIG_SERIAL_8250_FINTEK is not set
CONFIG_SERIAL_8250_CONSOLE=y
@ -2367,8 +2547,8 @@ CONFIG_SPI_MASTER=y
# CONFIG_SPI_DESIGNWARE is not set
# CONFIG_SPI_GPIO is not set
# CONFIG_SPI_FSL_SPI is not set
# CONFIG_SPI_MICROCHIP_CORE is not set
# CONFIG_SPI_MICROCHIP_CORE_QSPI is not set
# CONFIG_SPI_MICROCHIP_CORE_SPI is not set
# CONFIG_SPI_OC_TINY is not set
# CONFIG_SPI_PL022 is not set
# CONFIG_SPI_PXA2XX is not set
@ -2581,6 +2761,7 @@ CONFIG_POWER_SUPPLY=y
# CONFIG_CHARGER_RT9455 is not set
# CONFIG_CHARGER_RT9467 is not set
# CONFIG_CHARGER_RT9471 is not set
# CONFIG_CHARGER_RT9756 is not set
# CONFIG_CHARGER_UCS1002 is not set
# CONFIG_CHARGER_BD99954 is not set
# CONFIG_BATTERY_UG3105 is not set
@ -2647,6 +2828,7 @@ CONFIG_MFD_CORE=y
# CONFIG_MFD_MC13XXX_SPI is not set
# CONFIG_MFD_MC13XXX_I2C is not set
# CONFIG_MFD_MP2629 is not set
# CONFIG_MFD_PF1550 is not set
# CONFIG_MFD_HI6421_PMIC is not set
# CONFIG_MFD_IQS62X is not set
# CONFIG_MFD_KEMPLD is not set
@ -2717,7 +2899,6 @@ CONFIG_MFD_SYSCON=y
# CONFIG_MFD_TPS6594_SPI is not set
# CONFIG_TWL4030_CORE is not set
# CONFIG_TWL6040_CORE is not set
# CONFIG_MFD_WL1273_CORE is not set
# CONFIG_MFD_LM3533 is not set
# CONFIG_MFD_TC3589X is not set
# CONFIG_MFD_TQMX86 is not set
@ -2766,6 +2947,7 @@ CONFIG_REGULATOR_88PM886=m
# CONFIG_REGULATOR_GPIO is not set
# CONFIG_REGULATOR_ISL9305 is not set
# CONFIG_REGULATOR_ISL6271A is not set
# CONFIG_REGULATOR_FP9931 is not set
# CONFIG_REGULATOR_LP3971 is not set
# CONFIG_REGULATOR_LP3972 is not set
# CONFIG_REGULATOR_LP872X is not set
@ -2893,7 +3075,7 @@ CONFIG_DRM_SIMPLEDRM=y
# CONFIG_DRM_VGEM is not set
# CONFIG_DRM_VKMS is not set
# CONFIG_DRM_UDL is not set
CONFIG_DRM_UDL=m
CONFIG_DRM_PANEL=y
#
@ -3039,7 +3221,6 @@ CONFIG_FB_SYSMEM_FOPS=y
CONFIG_FB_DEFERRED_IO=y
CONFIG_FB_SYSMEM_HELPERS=y
CONFIG_FB_SYSMEM_HELPERS_DEFERRED=y
# CONFIG_FB_MODE_HELPERS is not set
# CONFIG_FB_TILEBLITTING is not set
# end of Frame buffer Devices
@ -3060,6 +3241,7 @@ CONFIG_LCD_CLASS_DEVICE=m
# CONFIG_LCD_HX8357 is not set
# CONFIG_LCD_OTM3225A is not set
CONFIG_BACKLIGHT_CLASS_DEVICE=m
# CONFIG_BACKLIGHT_AW99706 is not set
# CONFIG_BACKLIGHT_KTD253 is not set
CONFIG_BACKLIGHT_KTD2801=m
# CONFIG_BACKLIGHT_KTZ8866 is not set
@ -3104,7 +3286,12 @@ CONFIG_LOGO_LINUX_CLUT224=y
# CONFIG_DRM_ACCEL is not set
CONFIG_SOUND=m
CONFIG_SND=m
CONFIG_SND_TIMER=m
CONFIG_SND_PCM=m
CONFIG_SND_HWDEP=m
CONFIG_SND_RAWMIDI=m
CONFIG_SND_UMP=m
# CONFIG_SND_UMP_LEGACY_RAWMIDI is not set
# CONFIG_SND_OSSEMUL is not set
CONFIG_SND_PCM_TIMER=y
# CONFIG_SND_HRTIMER is not set
@ -3115,6 +3302,7 @@ CONFIG_SND_VERBOSE_PROCFS=y
CONFIG_SND_CTL_FAST_LOOKUP=y
# CONFIG_SND_DEBUG is not set
# CONFIG_SND_CTL_INPUT_VALIDATION is not set
# CONFIG_SND_UTIMER is not set
# CONFIG_SND_SEQUENCER is not set
CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
@ -3132,7 +3320,8 @@ CONFIG_SND_DRIVERS=y
# CONFIG_SND_SPI is not set
CONFIG_SND_USB=y
# CONFIG_SND_USB_AUDIO is not set
CONFIG_SND_USB_AUDIO=m
CONFIG_SND_USB_AUDIO_MIDI_V2=y
# CONFIG_SND_USB_UA101 is not set
# CONFIG_SND_USB_CAIAQ is not set
# CONFIG_SND_USB_6FIRE is not set
@ -3362,11 +3551,28 @@ CONFIG_USB_PRINTER=m
#
# NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may also be needed; see USB_STORAGE Help for more info
#
CONFIG_USB_STORAGE=m
# CONFIG_USB_STORAGE_DEBUG is not set
# CONFIG_USB_STORAGE_REALTEK is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_ISD200 is not set
# CONFIG_USB_STORAGE_USBAT is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_ONETOUCH is not set
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
# CONFIG_USB_STORAGE_ENE_UB6250 is not set
CONFIG_USB_UAS=m
#
# USB Imaging devices
#
# CONFIG_USB_MDC800 is not set
# CONFIG_USB_MICROTEK is not set
# CONFIG_USBIP_CORE is not set
#
@ -3389,7 +3595,59 @@ CONFIG_USB_CHIPIDEA_TEGRA=m
#
# USB port drivers
#
# CONFIG_USB_SERIAL is not set
CONFIG_USB_SERIAL=m
# CONFIG_USB_SERIAL_GENERIC is not set
CONFIG_USB_SERIAL_SIMPLE=m
# CONFIG_USB_SERIAL_AIRCABLE is not set
# CONFIG_USB_SERIAL_ARK3116 is not set
# CONFIG_USB_SERIAL_BELKIN is not set
# CONFIG_USB_SERIAL_CH341 is not set
# CONFIG_USB_SERIAL_WHITEHEAT is not set
# CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set
CONFIG_USB_SERIAL_CP210X=m
# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
# CONFIG_USB_SERIAL_EMPEG is not set
# CONFIG_USB_SERIAL_FTDI_SIO is not set
# CONFIG_USB_SERIAL_VISOR is not set
# CONFIG_USB_SERIAL_IPAQ is not set
# CONFIG_USB_SERIAL_IR is not set
# CONFIG_USB_SERIAL_EDGEPORT is not set
# CONFIG_USB_SERIAL_EDGEPORT_TI is not set
# CONFIG_USB_SERIAL_F81232 is not set
# CONFIG_USB_SERIAL_F8153X is not set
# CONFIG_USB_SERIAL_GARMIN is not set
# CONFIG_USB_SERIAL_IPW is not set
# CONFIG_USB_SERIAL_IUU is not set
# CONFIG_USB_SERIAL_KEYSPAN_PDA is not set
# CONFIG_USB_SERIAL_KEYSPAN is not set
# CONFIG_USB_SERIAL_KLSI is not set
# CONFIG_USB_SERIAL_KOBIL_SCT is not set
# CONFIG_USB_SERIAL_MCT_U232 is not set
# CONFIG_USB_SERIAL_METRO is not set
# CONFIG_USB_SERIAL_MOS7720 is not set
# CONFIG_USB_SERIAL_MOS7840 is not set
# CONFIG_USB_SERIAL_MXUPORT is not set
# CONFIG_USB_SERIAL_NAVMAN is not set
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_OTI6858 is not set
# CONFIG_USB_SERIAL_QCAUX is not set
# CONFIG_USB_SERIAL_QUALCOMM is not set
# CONFIG_USB_SERIAL_SPCP8X5 is not set
# CONFIG_USB_SERIAL_SAFE is not set
# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
# CONFIG_USB_SERIAL_SYMBOL is not set
# CONFIG_USB_SERIAL_TI is not set
# CONFIG_USB_SERIAL_CYBERJACK is not set
# CONFIG_USB_SERIAL_OPTION is not set
# CONFIG_USB_SERIAL_OMNINET is not set
# CONFIG_USB_SERIAL_OPTICON is not set
# CONFIG_USB_SERIAL_XSENS_MT is not set
# CONFIG_USB_SERIAL_WISHBONE is not set
# CONFIG_USB_SERIAL_SSU100 is not set
# CONFIG_USB_SERIAL_QT2 is not set
# CONFIG_USB_SERIAL_UPD78F0730 is not set
# CONFIG_USB_SERIAL_XR is not set
# CONFIG_USB_SERIAL_DEBUG is not set
#
# USB Miscellaneous drivers
@ -3537,6 +3795,7 @@ CONFIG_MMC_SDHCI_PXAV3=y
# CONFIG_MMC_HSQ is not set
# CONFIG_MMC_MTK is not set
# CONFIG_MMC_SDHCI_XENON is not set
# CONFIG_SCSI_UFSHCD is not set
# CONFIG_MEMSTICK is not set
CONFIG_LEDS_EXPRESSWIRE=y
CONFIG_NEW_LEDS=y
@ -3848,6 +4107,7 @@ CONFIG_XEN_AUTO_XLATE=y
# CONFIG_GREYBUS is not set
# CONFIG_COMEDI is not set
# CONFIG_GPIB is not set
# CONFIG_STAGING is not set
# CONFIG_GOLDFISH is not set
# CONFIG_CHROME_PLATFORMS is not set
@ -3916,7 +4176,6 @@ CONFIG_IOMMU_SUPPORT=y
#
CONFIG_IOMMU_IO_PGTABLE=y
CONFIG_IOMMU_IO_PGTABLE_LPAE=y
# CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set
CONFIG_IOMMU_IO_PGTABLE_ARMV7S=y
# CONFIG_IOMMU_IO_PGTABLE_ARMV7S_SELFTEST is not set
# CONFIG_IOMMU_IO_PGTABLE_DART is not set
@ -4187,6 +4446,7 @@ CONFIG_88PM886_GPADC=m
# CONFIG_MAX11410 is not set
# CONFIG_MAX1241 is not set
# CONFIG_MAX1363 is not set
# CONFIG_MAX14001 is not set
# CONFIG_MAX34408 is not set
# CONFIG_MAX9611 is not set
# CONFIG_MCP320X is not set
@ -4306,7 +4566,8 @@ CONFIG_HID_SENSOR_IIO_TRIGGER=m
# CONFIG_AD5360 is not set
# CONFIG_AD5380 is not set
# CONFIG_AD5421 is not set
# CONFIG_AD5446 is not set
# CONFIG_AD5446_SPI is not set
# CONFIG_AD5446_I2C is not set
# CONFIG_AD5449 is not set
# CONFIG_AD5592R is not set
# CONFIG_AD5593R is not set
@ -4451,9 +4712,13 @@ CONFIG_HID_SENSOR_HUMIDITY=m
# CONFIG_KMX61 is not set
# CONFIG_INV_ICM42600_I2C is not set
# CONFIG_INV_ICM42600_SPI is not set
# CONFIG_INV_ICM45600_I2C is not set
# CONFIG_INV_ICM45600_SPI is not set
# CONFIG_INV_MPU6050_I2C is not set
# CONFIG_INV_MPU6050_SPI is not set
# CONFIG_SMI240 is not set
# CONFIG_SMI330_I2C is not set
# CONFIG_SMI330_SPI is not set
# CONFIG_IIO_ST_LSM6DSX is not set
# CONFIG_IIO_ST_LSM9DS0 is not set
# end of Inertial measurement units
@ -4621,6 +4886,7 @@ CONFIG_HID_SENSOR_CUSTOM_INTEL_HINGE=m
# CONFIG_T5403 is not set
# CONFIG_HP206C is not set
# CONFIG_ZPA2326 is not set
# CONFIG_ADP810 is not set
# end of Pressure sensors
#
@ -4705,7 +4971,6 @@ CONFIG_ARM_GIC_V5=y
CONFIG_IRQ_MSI_LIB=y
# CONFIG_AL_FIC is not set
# CONFIG_XILINX_INTC is not set
CONFIG_PARTITION_PERCPU=y
# end of IRQ chip support
# CONFIG_IPACK_BUS is not set
@ -4992,19 +5257,20 @@ CONFIG_PSTORE_PMSG=y
CONFIG_PSTORE_RAM=m
# CONFIG_PSTORE_BLK is not set
# CONFIG_UFS_FS is not set
CONFIG_EROFS_FS=y
CONFIG_EROFS_FS=m
# CONFIG_EROFS_FS_DEBUG is not set
CONFIG_EROFS_FS_XATTR=y
CONFIG_EROFS_FS_POSIX_ACL=y
CONFIG_EROFS_FS_SECURITY=y
CONFIG_EROFS_FS_BACKED_BY_FILE=y
CONFIG_EROFS_FS_ZIP=y
# CONFIG_EROFS_FS_ZIP_LZMA is not set
# CONFIG_EROFS_FS_ZIP_DEFLATE is not set
# CONFIG_EROFS_FS_ZIP_ZSTD is not set
CONFIG_EROFS_FS_ZIP_LZMA=y
CONFIG_EROFS_FS_ZIP_DEFLATE=y
CONFIG_EROFS_FS_ZIP_ZSTD=y
# CONFIG_EROFS_FS_ZIP_ACCEL is not set
# CONFIG_EROFS_FS_ONDEMAND is not set
# CONFIG_EROFS_FS_PCPU_KTHREAD is not set
CONFIG_EROFS_FS_PCPU_KTHREAD=y
CONFIG_EROFS_FS_PCPU_KTHREAD_HIPRI=y
CONFIG_NETWORK_FILESYSTEMS=y
# CONFIG_NFS_FS is not set
# CONFIG_NFSD is not set
@ -5302,7 +5568,6 @@ CONFIG_CRYPTO_ZSTD=m
#
# Random number generation
#
CONFIG_CRYPTO_ANSI_CPRNG=y
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_DRBG_HMAC=y
# CONFIG_CRYPTO_DRBG_HASH is not set
@ -5332,10 +5597,8 @@ CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y
# Accelerated Cryptographic Algorithms for CPU (arm64)
#
CONFIG_CRYPTO_GHASH_ARM64_CE=y
CONFIG_CRYPTO_SHA3_ARM64=y
# CONFIG_CRYPTO_SM3_NEON is not set
# CONFIG_CRYPTO_SM3_ARM64_CE is not set
# CONFIG_CRYPTO_POLYVAL_ARM64_CE is not set
# CONFIG_CRYPTO_AES_ARM64 is not set
CONFIG_CRYPTO_AES_ARM64_CE=y
CONFIG_CRYPTO_AES_ARM64_CE_BLK=y
@ -5417,6 +5680,7 @@ CONFIG_CRYPTO_LIB_UTILS=y
CONFIG_CRYPTO_LIB_AES=y
CONFIG_CRYPTO_LIB_ARC4=m
CONFIG_CRYPTO_LIB_GF128MUL=y
CONFIG_CRYPTO_LIB_BLAKE2B=y
CONFIG_CRYPTO_LIB_CHACHA=m
CONFIG_CRYPTO_LIB_CHACHA_ARCH=y
CONFIG_CRYPTO_LIB_CURVE25519=m
@ -5433,12 +5697,16 @@ CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LIB_SHA256_ARCH=y
CONFIG_CRYPTO_LIB_SHA512=y
CONFIG_CRYPTO_LIB_SHA512_ARCH=y
CONFIG_CRYPTO_LIB_SHA3=y
CONFIG_CRYPTO_LIB_SHA3_ARCH=y
CONFIG_CRYPTO_LIB_SM3=y
# end of Crypto library routines
CONFIG_XXHASH=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
# CONFIG_RANDOM32_SELFTEST is not set
CONFIG_842_COMPRESS=y
CONFIG_842_DECOMPRESS=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_LZO_COMPRESS=y
@ -5457,7 +5725,7 @@ CONFIG_XZ_DEC_ARMTHUMB=y
CONFIG_XZ_DEC_ARM64=y
CONFIG_XZ_DEC_SPARC=y
CONFIG_XZ_DEC_RISCV=y
# CONFIG_XZ_DEC_MICROLZMA is not set
CONFIG_XZ_DEC_MICROLZMA=y
CONFIG_XZ_DEC_BCJ=y
# CONFIG_XZ_DEC_TEST is not set
CONFIG_DECOMPRESS_GZIP=y
@ -5530,6 +5798,9 @@ CONFIG_FONT_SUPPORT=y
# CONFIG_FONTS is not set
CONFIG_FONT_8x8=y
CONFIG_FONT_8x16=y
CONFIG_SG_POOL=y
CONFIG_ARCH_HAS_CPU_CACHE_INVALIDATE_MEMREGION=y
CONFIG_GENERIC_CPU_CACHE_MAINTENANCE=y
CONFIG_ARCH_STACKWALK=y
CONFIG_STACKDEPOT=y
CONFIG_STACKDEPOT_MAX_FRAMES=64
@ -5559,6 +5830,7 @@ CONFIG_DYNAMIC_DEBUG=y
CONFIG_DYNAMIC_DEBUG_CORE=y
CONFIG_SYMBOLIC_ERRNAME=y
CONFIG_DEBUG_BUGVERBOSE=y
# CONFIG_DEBUG_BUGVERBOSE_DETAILED is not set
# end of printk and dmesg options
CONFIG_DEBUG_KERNEL=y
@ -5597,7 +5869,6 @@ CONFIG_MAGIC_SYSRQ_SERIAL=y
CONFIG_MAGIC_SYSRQ_SERIAL_SEQUENCE=""
CONFIG_DEBUG_FS=y
CONFIG_DEBUG_FS_ALLOW_ALL=y
# CONFIG_DEBUG_FS_DISALLOW_MOUNT is not set
# CONFIG_DEBUG_FS_ALLOW_NONE is not set
CONFIG_HAVE_ARCH_KGDB=y
# CONFIG_KGDB is not set
@ -5705,7 +5976,6 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y
# CONFIG_DEBUG_IRQFLAGS is not set
CONFIG_STACKTRACE=y
# CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set
# CONFIG_DEBUG_KOBJECT is not set
#
@ -5734,6 +6004,7 @@ CONFIG_RCU_TRACE=y
# CONFIG_DEBUG_WQ_FORCE_RR_CPU is not set
# CONFIG_CPU_HOTPLUG_STATE_CONTROL is not set
# CONFIG_LATENCYTOP is not set
# CONFIG_DEBUG_CGROUP_REF is not set
CONFIG_USER_STACKTRACE_SUPPORT=y
CONFIG_NOP_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
@ -5763,6 +6034,7 @@ CONFIG_FUNCTION_GRAPH_TRACER=y
# CONFIG_FUNCTION_GRAPH_RETADDR is not set
CONFIG_DYNAMIC_FTRACE=y
CONFIG_DYNAMIC_FTRACE_WITH_ARGS=y
# CONFIG_FUNCTION_SELF_TRACING is not set
# CONFIG_FPROBE is not set
# CONFIG_FUNCTION_PROFILER is not set
# CONFIG_STACK_TRACER is not set
@ -5778,6 +6050,8 @@ CONFIG_BRANCH_PROFILE_NONE=y
# CONFIG_PROFILE_ANNOTATED_BRANCHES is not set
# CONFIG_PROFILE_ALL_BRANCHES is not set
# CONFIG_BLK_DEV_IO_TRACE is not set
CONFIG_KPROBE_EVENTS=y
# CONFIG_KPROBE_EVENTS_ON_NOTRACE is not set
CONFIG_UPROBE_EVENTS=y
CONFIG_EPROBE_EVENTS=y
CONFIG_BPF_EVENTS=y
@ -5798,6 +6072,7 @@ CONFIG_FTRACE_MCOUNT_USE_PATCHABLE_FUNCTION_ENTRY=y
# CONFIG_RING_BUFFER_STARTUP_TEST is not set
# CONFIG_RING_BUFFER_VALIDATE_TIME_DELTAS is not set
# CONFIG_PREEMPTIRQ_DELAY_TEST is not set
# CONFIG_KPROBE_EVENT_GEN_TEST is not set
# CONFIG_RV is not set
# CONFIG_SAMPLES is not set
CONFIG_HAVE_SAMPLE_FTRACE_DIRECT=y
@ -5819,6 +6094,7 @@ CONFIG_STRICT_DEVMEM=y
#
# CONFIG_KUNIT is not set
# CONFIG_NOTIFIER_ERROR_INJECTION is not set
# CONFIG_FUNCTION_ERROR_INJECTION is not set
# CONFIG_FAULT_INJECTION is not set
CONFIG_ARCH_HAS_KCOV=y
# CONFIG_KCOV is not set