From d4c110d809a0ec4ebdc04d8663693e3179e5ee49 Mon Sep 17 00:00:00 2001 From: Oliver Smith Date: Sun, 1 Jun 2025 14:12:13 +0200 Subject: [PATCH] cross/gcc-*: upgrade to 14.3.0-r1 Done with pmb MR 2521. I've verified that gcc-aarch64 builds and the following packages can be cross compiled from aarch64 to x86_64: * hello-world * iskey * pbsplash * gcc-x86_64 Related: https://gitlab.postmarketos.org/postmarketOS/continuous-testing/upstream-compat/-/blob/master/docs/how-to-fix-upstream-compat-errors.md#gcc- Part-of: https://gitlab.postmarketos.org/postmarketOS/pmaports/-/merge_requests/6587 [ci:skip-build]: already built successfully in CI --- .../0002-gcc-poison-system-directories.patch | 41 +- ...03-specs-turn-on-Wl-z-now-by-default.patch | 11 +- ...Y_SOURCE-2-by-default-for-C-C-ObjC-O.patch | 11 +- ...-pass-as-needed-by-default-to-the-li.patch | 45 +- ...rmat-and-Wformat-security-by-default.patch | 13 +- .../0007-Enable-Wtrampolines-by-default.patch | 7 +- ...ostdlib-nodefaultlibs-and-ffreestand.patch | 15 +- cross/gcc-aarch64/0012-libgcc_s.patch | 11 +- cross/gcc-aarch64/0013-nopie.patch | 21 +- ...build-fix-CXXFLAGS_FOR_BUILD-passing.patch | 7 +- ...age-provides-libssp_nonshared.a.-We-.patch | 7 +- ...e-pop-state-for-gold-as-well-when-li.patch | 13 +- .../0023-riscv-disable-multilib-support.patch | 13 +- .../0024-always-build-libgcc_eh.a.patch | 11 +- .../0026-ada-musl-support-fixes.patch | 22 +- ...able-autolink-libatomic-use-in-LINK_.patch | 73 +-- ...lly-link-libgphobos-against-libucont.patch | 7 +- ...against-libucontext-on-all-platforms.patch | 9 +- ...time_t-is-always-64-bit-on-musl-libc.patch | 7 +- ...-signedness-of-vld1q-intrinsic-parms.patch | 82 --- cross/gcc-aarch64/APKBUILD | 66 +-- cross/gcc-aarch64/fix-arm64.patch | 544 ------------------ cross/gcc-aarch64/gcc-go.post-install | 8 - cross/gcc-aarch64/ppc64le-quadmath.patch | 56 -- .../riscv64-improve-build-time.patch | 149 ----- .../0002-gcc-poison-system-directories.patch | 41 +- ...03-specs-turn-on-Wl-z-now-by-default.patch | 11 +- ...Y_SOURCE-2-by-default-for-C-C-ObjC-O.patch | 11 +- ...-pass-as-needed-by-default-to-the-li.patch | 45 +- ...rmat-and-Wformat-security-by-default.patch | 13 +- .../0007-Enable-Wtrampolines-by-default.patch | 7 +- ...ostdlib-nodefaultlibs-and-ffreestand.patch | 15 +- cross/gcc-armhf/0012-libgcc_s.patch | 11 +- cross/gcc-armhf/0013-nopie.patch | 21 +- ...build-fix-CXXFLAGS_FOR_BUILD-passing.patch | 7 +- ...age-provides-libssp_nonshared.a.-We-.patch | 7 +- ...e-pop-state-for-gold-as-well-when-li.patch | 13 +- .../0023-riscv-disable-multilib-support.patch | 13 +- .../0024-always-build-libgcc_eh.a.patch | 11 +- .../0026-ada-musl-support-fixes.patch | 22 +- ...able-autolink-libatomic-use-in-LINK_.patch | 73 +-- ...lly-link-libgphobos-against-libucont.patch | 7 +- ...against-libucontext-on-all-platforms.patch | 9 +- ...time_t-is-always-64-bit-on-musl-libc.patch | 7 +- ...-signedness-of-vld1q-intrinsic-parms.patch | 82 --- cross/gcc-armhf/APKBUILD | 66 +-- cross/gcc-armhf/fix-arm64.patch | 544 ------------------ cross/gcc-armhf/gcc-go.post-install | 8 - cross/gcc-armhf/ppc64le-quadmath.patch | 56 -- .../riscv64-improve-build-time.patch | 149 ----- .../0002-gcc-poison-system-directories.patch | 41 +- ...03-specs-turn-on-Wl-z-now-by-default.patch | 11 +- ...Y_SOURCE-2-by-default-for-C-C-ObjC-O.patch | 11 +- ...-pass-as-needed-by-default-to-the-li.patch | 45 +- ...rmat-and-Wformat-security-by-default.patch | 13 +- .../0007-Enable-Wtrampolines-by-default.patch | 7 +- ...ostdlib-nodefaultlibs-and-ffreestand.patch | 15 +- cross/gcc-armv7/0012-libgcc_s.patch | 11 +- cross/gcc-armv7/0013-nopie.patch | 21 +- ...build-fix-CXXFLAGS_FOR_BUILD-passing.patch | 7 +- ...age-provides-libssp_nonshared.a.-We-.patch | 7 +- ...e-pop-state-for-gold-as-well-when-li.patch | 13 +- .../0023-riscv-disable-multilib-support.patch | 13 +- .../0024-always-build-libgcc_eh.a.patch | 11 +- .../0026-ada-musl-support-fixes.patch | 22 +- ...able-autolink-libatomic-use-in-LINK_.patch | 73 +-- ...lly-link-libgphobos-against-libucont.patch | 7 +- ...against-libucontext-on-all-platforms.patch | 9 +- ...time_t-is-always-64-bit-on-musl-libc.patch | 7 +- ...-signedness-of-vld1q-intrinsic-parms.patch | 82 --- cross/gcc-armv7/APKBUILD | 66 +-- cross/gcc-armv7/fix-arm64.patch | 544 ------------------ cross/gcc-armv7/gcc-go.post-install | 8 - cross/gcc-armv7/ppc64le-quadmath.patch | 56 -- .../riscv64-improve-build-time.patch | 149 ----- .../0002-gcc-poison-system-directories.patch | 41 +- ...03-specs-turn-on-Wl-z-now-by-default.patch | 11 +- ...Y_SOURCE-2-by-default-for-C-C-ObjC-O.patch | 11 +- ...-pass-as-needed-by-default-to-the-li.patch | 45 +- ...rmat-and-Wformat-security-by-default.patch | 13 +- .../0007-Enable-Wtrampolines-by-default.patch | 7 +- ...ostdlib-nodefaultlibs-and-ffreestand.patch | 15 +- cross/gcc-riscv64/0012-libgcc_s.patch | 11 +- cross/gcc-riscv64/0013-nopie.patch | 21 +- ...build-fix-CXXFLAGS_FOR_BUILD-passing.patch | 7 +- ...age-provides-libssp_nonshared.a.-We-.patch | 7 +- ...e-pop-state-for-gold-as-well-when-li.patch | 13 +- .../0023-riscv-disable-multilib-support.patch | 13 +- .../0024-always-build-libgcc_eh.a.patch | 11 +- .../0026-ada-musl-support-fixes.patch | 22 +- ...able-autolink-libatomic-use-in-LINK_.patch | 73 +-- ...lly-link-libgphobos-against-libucont.patch | 7 +- ...against-libucontext-on-all-platforms.patch | 9 +- ...time_t-is-always-64-bit-on-musl-libc.patch | 7 +- ...-signedness-of-vld1q-intrinsic-parms.patch | 82 --- cross/gcc-riscv64/APKBUILD | 66 +-- cross/gcc-riscv64/fix-arm64.patch | 544 ------------------ cross/gcc-riscv64/gcc-go.post-install | 8 - cross/gcc-riscv64/ppc64le-quadmath.patch | 56 -- .../riscv64-improve-build-time.patch | 149 ----- .../0002-gcc-poison-system-directories.patch | 41 +- ...03-specs-turn-on-Wl-z-now-by-default.patch | 11 +- ...Y_SOURCE-2-by-default-for-C-C-ObjC-O.patch | 11 +- ...-pass-as-needed-by-default-to-the-li.patch | 45 +- ...rmat-and-Wformat-security-by-default.patch | 13 +- .../0007-Enable-Wtrampolines-by-default.patch | 7 +- ...ostdlib-nodefaultlibs-and-ffreestand.patch | 15 +- cross/gcc-x86/0012-libgcc_s.patch | 11 +- cross/gcc-x86/0013-nopie.patch | 21 +- ...build-fix-CXXFLAGS_FOR_BUILD-passing.patch | 7 +- ...age-provides-libssp_nonshared.a.-We-.patch | 7 +- ...e-pop-state-for-gold-as-well-when-li.patch | 13 +- .../0023-riscv-disable-multilib-support.patch | 13 +- .../0024-always-build-libgcc_eh.a.patch | 11 +- .../gcc-x86/0026-ada-musl-support-fixes.patch | 22 +- ...able-autolink-libatomic-use-in-LINK_.patch | 73 +-- ...lly-link-libgphobos-against-libucont.patch | 7 +- ...against-libucontext-on-all-platforms.patch | 9 +- ...time_t-is-always-64-bit-on-musl-libc.patch | 7 +- ...-signedness-of-vld1q-intrinsic-parms.patch | 82 --- cross/gcc-x86/APKBUILD | 66 +-- cross/gcc-x86/fix-arm64.patch | 544 ------------------ cross/gcc-x86/gcc-go.post-install | 8 - cross/gcc-x86/ppc64le-quadmath.patch | 56 -- .../gcc-x86/riscv64-improve-build-time.patch | 149 ----- .../0002-gcc-poison-system-directories.patch | 41 +- ...03-specs-turn-on-Wl-z-now-by-default.patch | 11 +- ...Y_SOURCE-2-by-default-for-C-C-ObjC-O.patch | 11 +- ...-pass-as-needed-by-default-to-the-li.patch | 45 +- ...rmat-and-Wformat-security-by-default.patch | 13 +- .../0007-Enable-Wtrampolines-by-default.patch | 7 +- ...ostdlib-nodefaultlibs-and-ffreestand.patch | 15 +- cross/gcc-x86_64/0012-libgcc_s.patch | 11 +- cross/gcc-x86_64/0013-nopie.patch | 21 +- ...build-fix-CXXFLAGS_FOR_BUILD-passing.patch | 7 +- ...age-provides-libssp_nonshared.a.-We-.patch | 7 +- ...e-pop-state-for-gold-as-well-when-li.patch | 13 +- .../0023-riscv-disable-multilib-support.patch | 13 +- .../0024-always-build-libgcc_eh.a.patch | 11 +- .../0026-ada-musl-support-fixes.patch | 22 +- ...able-autolink-libatomic-use-in-LINK_.patch | 73 +-- ...lly-link-libgphobos-against-libucont.patch | 7 +- ...against-libucontext-on-all-platforms.patch | 9 +- ...time_t-is-always-64-bit-on-musl-libc.patch | 7 +- ...-signedness-of-vld1q-intrinsic-parms.patch | 82 --- cross/gcc-x86_64/APKBUILD | 68 +-- cross/gcc-x86_64/fix-arm64.patch | 544 ------------------ cross/gcc-x86_64/gcc-go.post-install | 8 - cross/gcc-x86_64/ppc64le-quadmath.patch | 56 -- .../riscv64-improve-build-time.patch | 149 ----- 150 files changed, 715 insertions(+), 6781 deletions(-) delete mode 100644 cross/gcc-aarch64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch delete mode 100644 cross/gcc-aarch64/fix-arm64.patch delete mode 100644 cross/gcc-aarch64/gcc-go.post-install delete mode 100644 cross/gcc-aarch64/ppc64le-quadmath.patch delete mode 100644 cross/gcc-aarch64/riscv64-improve-build-time.patch delete mode 100644 cross/gcc-armhf/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch delete mode 100644 cross/gcc-armhf/fix-arm64.patch delete mode 100644 cross/gcc-armhf/gcc-go.post-install delete mode 100644 cross/gcc-armhf/ppc64le-quadmath.patch delete mode 100644 cross/gcc-armhf/riscv64-improve-build-time.patch delete mode 100644 cross/gcc-armv7/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch delete mode 100644 cross/gcc-armv7/fix-arm64.patch delete mode 100644 cross/gcc-armv7/gcc-go.post-install delete mode 100644 cross/gcc-armv7/ppc64le-quadmath.patch delete mode 100644 cross/gcc-armv7/riscv64-improve-build-time.patch delete mode 100644 cross/gcc-riscv64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch delete mode 100644 cross/gcc-riscv64/fix-arm64.patch delete mode 100644 cross/gcc-riscv64/gcc-go.post-install delete mode 100644 cross/gcc-riscv64/ppc64le-quadmath.patch delete mode 100644 cross/gcc-riscv64/riscv64-improve-build-time.patch delete mode 100644 cross/gcc-x86/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch delete mode 100644 cross/gcc-x86/fix-arm64.patch delete mode 100644 cross/gcc-x86/gcc-go.post-install delete mode 100644 cross/gcc-x86/ppc64le-quadmath.patch delete mode 100644 cross/gcc-x86/riscv64-improve-build-time.patch delete mode 100644 cross/gcc-x86_64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch delete mode 100644 cross/gcc-x86_64/fix-arm64.patch delete mode 100644 cross/gcc-x86_64/gcc-go.post-install delete mode 100644 cross/gcc-x86_64/ppc64le-quadmath.patch delete mode 100644 cross/gcc-x86_64/riscv64-improve-build-time.patch diff --git a/cross/gcc-aarch64/0002-gcc-poison-system-directories.patch b/cross/gcc-aarch64/0002-gcc-poison-system-directories.patch index 84c80c95b..9a1671267 100644 --- a/cross/gcc-aarch64/0002-gcc-poison-system-directories.patch +++ b/cross/gcc-aarch64/0002-gcc-poison-system-directories.patch @@ -25,11 +25,9 @@ Upstream-Status: Pending gcc/incpath.cc | 21 +++++++++++++++++++++ 7 files changed, 68 insertions(+) -diff --git a/gcc/common.opt b/gcc/common.opt -index 862c474d3c8..64c4277c991 100644 --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -711,6 +711,10 @@ Wreturn-local-addr +@@ -715,6 +715,10 @@ Wreturn-local-addr Common Var(warn_return_local_addr) Init(1) Warning Warn about returning a pointer/reference to a local or temporary variable. @@ -40,11 +38,9 @@ index 862c474d3c8..64c4277c991 100644 Wshadow Common Var(warn_shadow) Warning Warn when one variable shadows another. Same as -Wshadow=global. -diff --git a/gcc/config.in b/gcc/config.in -index 4cad077bfbe..0679fbbf4c6 100644 --- a/gcc/config.in +++ b/gcc/config.in -@@ -236,6 +236,12 @@ +@@ -249,6 +249,12 @@ #endif @@ -57,19 +53,17 @@ index 4cad077bfbe..0679fbbf4c6 100644 /* Define if you want all operations on RTL (the basic data structure of the optimizer and back end) to be checked for dynamic type safety at runtime. This is quite expensive. */ -diff --git a/gcc/configure b/gcc/configure -index c7b26d1927d..8c46369f73f 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -1026,6 +1026,7 @@ enable_maintainer_mode +@@ -1050,6 +1050,7 @@ enable_maintainer_mode enable_link_mutex enable_link_serialization enable_version_specific_runtime_libs +enable_poison_system_directories enable_plugin enable_host_shared - enable_libquadmath_support -@@ -1788,6 +1789,8 @@ Optional Features: + enable_host_pie +@@ -1823,6 +1824,8 @@ Optional Features: --enable-version-specific-runtime-libs specify that runtime libraries should be installed in a compiler-specific directory @@ -77,8 +71,8 @@ index c7b26d1927d..8c46369f73f 100755 + warn for use of native system header directories --enable-plugin enable plugin support --enable-host-shared build host code as shared libraries - --disable-libquadmath-support -@@ -31753,6 +31756,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : + --enable-host-pie build host code as PIE +@@ -34082,6 +34085,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : fi @@ -98,11 +92,9 @@ index c7b26d1927d..8c46369f73f 100755 # Substitute configuration variables -diff --git a/gcc/configure.ac b/gcc/configure.ac -index 09082e8ccae..5504bf6eb01 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -7292,6 +7292,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs, +@@ -7555,6 +7555,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs, [specify that runtime libraries should be installed in a compiler-specific directory])]) @@ -119,11 +111,9 @@ index 09082e8ccae..5504bf6eb01 100644 # Substitute configuration variables AC_SUBST(subdirs) AC_SUBST(srcdir) -diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index af0e5933fdb..b6731a4673c 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -384,6 +384,7 @@ Objective-C and Objective-C++ Dialects}. +@@ -391,6 +391,7 @@ Objective-C and Objective-C++ Dialects}. -Wpacked -Wno-packed-bitfield-compat -Wpacked-not-aligned -Wpadded -Wparentheses -Wno-pedantic-ms-format -Wpointer-arith -Wno-pointer-compare -Wno-pointer-to-int-cast @@ -131,7 +121,7 @@ index af0e5933fdb..b6731a4673c 100644 -Wno-pragmas -Wno-prio-ctor-dtor -Wredundant-decls -Wrestrict -Wno-return-local-addr -Wreturn-type -Wno-scalar-storage-order -Wsequence-point -@@ -8426,6 +8427,14 @@ made up of data only and thus requires no special treatment. But, for +@@ -8861,6 +8862,14 @@ made up of data only and thus requires no special treatment. But, for most targets, it is made up of code and thus requires the stack to be made executable in order for the program to work properly. @@ -146,12 +136,10 @@ index af0e5933fdb..b6731a4673c 100644 @opindex Wfloat-equal @opindex Wno-float-equal @item -Wfloat-equal -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 16bb07f2cdc..33b56e721d2 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -1177,6 +1187,8 @@ proper position among the other output files. */ - "-z now " \ +@@ -1163,6 +1163,8 @@ proper position among the other output files. */ + "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \ "%X %{o*} %{e*} %{N} %{n} %{r}\ %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \ + %{Wno-poison-system-directories:--no-poison-system-directories} \ @@ -159,8 +147,6 @@ index 16bb07f2cdc..33b56e721d2 100644 %{static|no-pie|static-pie:} %@{L*} %(link_libgcc) " \ VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \ %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\ -diff --git a/gcc/incpath.cc b/gcc/incpath.cc -index 4d44321183f..0f3f071b44c 100644 --- a/gcc/incpath.cc +++ b/gcc/incpath.cc @@ -26,6 +26,7 @@ @@ -198,6 +184,3 @@ index 4d44321183f..0f3f071b44c 100644 } /* Use given -I paths for #include "..." but not #include <...>, and --- -2.41.0 - diff --git a/cross/gcc-aarch64/0003-specs-turn-on-Wl-z-now-by-default.patch b/cross/gcc-aarch64/0003-specs-turn-on-Wl-z-now-by-default.patch index bfb0a6eba..33e8b56f1 100644 --- a/cross/gcc-aarch64/0003-specs-turn-on-Wl-z-now-by-default.patch +++ b/cross/gcc-aarch64/0003-specs-turn-on-Wl-z-now-by-default.patch @@ -13,11 +13,9 @@ now by default. gcc/gcc.cc | 1 + 2 files changed, 4 insertions(+) -diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index b6731a4673c..f393c7846c6 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -17961,6 +17961,9 @@ For example, @option{-Wl,-Map,output.map} passes @option{-Map output.map} to the +@@ -18935,6 +18935,9 @@ For example, @option{-Wl,-Map,output.map} passes @option{-Map output.map} to the linker. When using the GNU linker, you can also get the same effect with @option{-Wl,-Map=output.map}. @@ -27,11 +25,9 @@ index b6731a4673c..f393c7846c6 100644 @opindex u @item -u @var{symbol} Pretend the symbol @var{symbol} is undefined, to force linking of -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 33b56e721d2..f82fae23c22 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -1144,6 +1144,7 @@ proper position among the other output files. */ +@@ -1161,6 +1161,7 @@ proper position among the other output files. */ "%{flto|flto=*:%= 2, 0) @@ -20,7 +18,7 @@ index a75038930ae..b98726f33ed 100644 Warn about possible security problems with format functions. Wformat-signedness -@@ -725,7 +725,7 @@ C ObjC C++ ObjC++ Var(warn_format_zero_length) Warning LangEnabledBy(C ObjC C++ +@@ -799,7 +799,7 @@ C ObjC C++ ObjC++ Var(warn_format_zero_length) Warning LangEnabledBy(C ObjC C++ Warn about zero-length formats. Wformat= @@ -28,7 +26,4 @@ index a75038930ae..b98726f33ed 100644 +C ObjC C++ ObjC++ Joined RejectNegative UInteger Var(warn_format) Init(1) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall, 1, 0) IntegerRange(0, 2) Warn about printf/scanf/strftime/strfmon format string anomalies. - Wformat-overflow= --- -2.41.0 - + Wframe-address diff --git a/cross/gcc-aarch64/0007-Enable-Wtrampolines-by-default.patch b/cross/gcc-aarch64/0007-Enable-Wtrampolines-by-default.patch index eb7aae838..140685d7b 100644 --- a/cross/gcc-aarch64/0007-Enable-Wtrampolines-by-default.patch +++ b/cross/gcc-aarch64/0007-Enable-Wtrampolines-by-default.patch @@ -7,11 +7,9 @@ Subject: [PATCH 07/35] Enable -Wtrampolines by default. gcc/common.opt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/gcc/common.opt b/gcc/common.opt -index 64c4277c991..c24839d32bc 100644 --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -803,7 +803,7 @@ Common Var(warn_system_headers) Warning +@@ -811,7 +811,7 @@ Common Var(warn_system_headers) Warning Do not suppress warnings from system headers. Wtrampolines @@ -20,6 +18,3 @@ index 64c4277c991..c24839d32bc 100644 Warn whenever a trampoline is generated. Wtrivial-auto-var-init --- -2.41.0 - diff --git a/cross/gcc-aarch64/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch b/cross/gcc-aarch64/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch index 69c1bf725..e85284ff0 100644 --- a/cross/gcc-aarch64/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch +++ b/cross/gcc-aarch64/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch @@ -9,11 +9,9 @@ Subject: [PATCH 08/35] Disable ssp on -nostdlib, -nodefaultlibs and gcc/params.opt | 2 +- 2 files changed, 8 insertions(+), 2 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index da6417dd0d1..b5a6f200635 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -983,6 +983,12 @@ proper position among the other output files. */ +@@ -1000,6 +1000,12 @@ proper position among the other output files. */ #define LINK_GCC_C_SEQUENCE_SPEC "%G %{!nolibc:%L %G}" #endif @@ -26,20 +24,18 @@ index da6417dd0d1..b5a6f200635 100644 #ifndef LINK_SSP_SPEC #ifdef TARGET_LIBC_PROVIDES_SSP #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ -@@ -1282,7 +1288,7 @@ static const char *cc1_options = +@@ -1305,7 +1311,7 @@ static const char *cc1_options = %{-version:--version}\ %{-help=*:--help=%*}\ %{!fsyntax-only:%{S:%W{o*}%{!o*:-o %w%b.s}}}\ - %{fsyntax-only:-o %j} %{-param*}\ + %{fsyntax-only:-o %j} %{-param*} " NO_SSP_SPEC "\ %{coverage:-fprofile-arcs -ftest-coverage}\ - %{fprofile-arcs|fprofile-generate*|coverage:\ + %{fprofile-arcs|fcondition-coverage|fprofile-generate*|coverage:\ %{!fprofile-update=single:\ -diff --git a/gcc/params.opt b/gcc/params.opt -index 823cdb2ff85..5b096899b40 100644 --- a/gcc/params.opt +++ b/gcc/params.opt -@@ -1006,7 +1006,7 @@ Common Joined UInteger Var(param_ssa_name_def_chain_limit) Init(512) Param Optim +@@ -1013,7 +1013,7 @@ Common Joined UInteger Var(param_ssa_name_def_chain_limit) Init(512) Param Optim The maximum number of SSA_NAME assignments to follow in determining a value. -param=ssp-buffer-size= @@ -48,6 +44,3 @@ index 823cdb2ff85..5b096899b40 100644 The lower bound for a buffer to be considered for stack smashing protection. -param=stack-clash-protection-guard-size= --- -2.41.0 - diff --git a/cross/gcc-aarch64/0012-libgcc_s.patch b/cross/gcc-aarch64/0012-libgcc_s.patch index d8bbc602f..8189f8491 100644 --- a/cross/gcc-aarch64/0012-libgcc_s.patch +++ b/cross/gcc-aarch64/0012-libgcc_s.patch @@ -9,11 +9,9 @@ Subject: [PATCH 12/35] libgcc_s libgcc/config/i386/t-linux | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) -diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc -index 0d817fc3f3b..2e99db00db9 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc -@@ -12691,10 +12691,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, +@@ -13089,10 +13089,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, { case IX86_BUILTIN_CPU_INIT: { @@ -26,8 +24,6 @@ index 0d817fc3f3b..2e99db00db9 100644 call_expr = build_call_expr (fndecl, 0); return expand_expr (call_expr, target, mode, EXPAND_NORMAL); } -diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c -index 50b6d8248a2..724ced402a1 100644 --- a/libgcc/config/i386/cpuinfo.c +++ b/libgcc/config/i386/cpuinfo.c @@ -63,7 +63,7 @@ __cpu_indicator_init (void) @@ -41,8 +37,6 @@ index 50b6d8248a2..724ced402a1 100644 +int __cpu_indicator_init_local (void) + __attribute__ ((weak, alias ("__cpu_indicator_init"))); #endif -diff --git a/libgcc/config/i386/t-linux b/libgcc/config/i386/t-linux -index 8506a635790..564296f788e 100644 --- a/libgcc/config/i386/t-linux +++ b/libgcc/config/i386/t-linux @@ -3,5 +3,5 @@ @@ -52,6 +46,3 @@ index 8506a635790..564296f788e 100644 -HOST_LIBGCC2_CFLAGS += -mlong-double-80 -DUSE_ELF_SYMVER $(CET_FLAGS) +HOST_LIBGCC2_CFLAGS += -mlong-double-80 $(CET_FLAGS) CRTSTUFF_T_CFLAGS += $(CET_FLAGS) --- -2.41.0 - diff --git a/cross/gcc-aarch64/0013-nopie.patch b/cross/gcc-aarch64/0013-nopie.patch index 6578ee110..4a9ea0770 100644 --- a/cross/gcc-aarch64/0013-nopie.patch +++ b/cross/gcc-aarch64/0013-nopie.patch @@ -4,15 +4,13 @@ Date: Sat, 7 Nov 2015 02:08:05 +0000 Subject: [PATCH 13/35] nopie --- - gcc/configure | 27 +++++++++++++++++++++++++++ - gcc/configure.ac | 13 +++++++++++++ - 2 files changed, 40 insertions(+) + gcc/configure | 25 +++++++++++++++++++++++++ + gcc/configure.ac | 11 +++++++++++ + 2 files changed, 36 insertions(+) -diff --git a/gcc/configure b/gcc/configure -index 23da7d55d..f38732bb2 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -34534,6 +34534,29 @@ rm -f core conftest.err conftest.$ac_objext \ +@@ -34606,6 +34606,29 @@ rm -f core conftest.err conftest.$ac_objext \ fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_no_pie" >&5 $as_echo "$gcc_cv_no_pie" >&6; } @@ -42,7 +40,7 @@ index 23da7d55d..f38732bb2 100755 if test x$enable_host_shared = xyes; then PICFLAG=-fPIC -@@ -34551,6 +34574,8 @@ if test x$enable_host_pie = xyes; then +@@ -34623,6 +34646,8 @@ if test x$enable_host_pie = xyes; then LD_PICFLAG=-pie elif test x$gcc_cv_no_pie = xyes; then LD_PICFLAG=-no-pie @@ -51,11 +49,9 @@ index 23da7d55d..f38732bb2 100755 else LD_PICFLAG= fi -diff --git a/gcc/configure.ac b/gcc/configure.ac -index d7cf0b92c..db2e2c802 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -7781,6 +7781,15 @@ AC_CACHE_CHECK([for -no-pie option], +@@ -7821,6 +7821,15 @@ AC_CACHE_CHECK([for -no-pie option], [gcc_cv_no_pie=yes], [gcc_cv_no_pie=no]) LDFLAGS="$saved_LDFLAGS"]) @@ -71,7 +67,7 @@ index d7cf0b92c..db2e2c802 100644 if test x$enable_host_shared = xyes; then PICFLAG=-fPIC -@@ -7798,6 +7807,8 @@ if test x$enable_host_pie = xyes; then +@@ -7838,6 +7847,8 @@ if test x$enable_host_pie = xyes; then LD_PICFLAG=-pie elif test x$gcc_cv_no_pie = xyes; then LD_PICFLAG=-no-pie @@ -80,6 +76,3 @@ index d7cf0b92c..db2e2c802 100644 else LD_PICFLAG= fi --- -2.41.0 - diff --git a/cross/gcc-aarch64/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch b/cross/gcc-aarch64/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch index 937cad8a7..ddea4a05b 100644 --- a/cross/gcc-aarch64/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch +++ b/cross/gcc-aarch64/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch @@ -7,11 +7,9 @@ Subject: [PATCH 15/35] build: fix CXXFLAGS_FOR_BUILD passing Makefile.in | 1 + 1 file changed, 1 insertion(+) -diff --git a/Makefile.in b/Makefile.in -index 06a9398e172..6ff2b3f9925 100644 --- a/Makefile.in +++ b/Makefile.in -@@ -178,6 +178,7 @@ BUILD_EXPORTS = \ +@@ -179,6 +179,7 @@ BUILD_EXPORTS = \ # built for the build system to override those in BASE_FLAGS_TO_PASS. EXTRA_BUILD_FLAGS = \ CFLAGS="$(CFLAGS_FOR_BUILD)" \ @@ -19,6 +17,3 @@ index 06a9398e172..6ff2b3f9925 100644 LDFLAGS="$(LDFLAGS_FOR_BUILD)" # This is the list of directories to built for the host system. --- -2.41.0 - diff --git a/cross/gcc-aarch64/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch b/cross/gcc-aarch64/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch index 96972482c..4796a055d 100644 --- a/cross/gcc-aarch64/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch +++ b/cross/gcc-aarch64/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch @@ -12,11 +12,9 @@ Subject: [PATCH 17/35] Alpine musl package provides libssp_nonshared.a. We gcc/gcc.cc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index b5a6f200635..6cbb726599b 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -991,8 +991,7 @@ proper position among the other output files. */ +@@ -1008,8 +1008,7 @@ proper position among the other output files. */ #ifndef LINK_SSP_SPEC #ifdef TARGET_LIBC_PROVIDES_SSP @@ -26,6 +24,3 @@ index b5a6f200635..6cbb726599b 100644 #else #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ "|fstack-protector-strong|fstack-protector-explicit" \ --- -2.41.0 - diff --git a/cross/gcc-aarch64/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch b/cross/gcc-aarch64/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch index a9612913e..b829e5b34 100644 --- a/cross/gcc-aarch64/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch +++ b/cross/gcc-aarch64/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch @@ -8,11 +8,9 @@ Subject: [PATCH 18/35] DP: Use --push-state/--pop-state for gold as well when gcc/gcc.cc | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 6cbb726599b..59390fd39d6 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -755,10 +755,10 @@ proper position among the other output files. */ +@@ -772,10 +772,10 @@ proper position among the other output files. */ #define LIBASAN_SPEC STATIC_LIBASAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBASAN_SPEC "%{static-libasan:" LD_STATIC_OPTION "}" \ @@ -25,7 +23,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBASAN_LIBS #else #define LIBASAN_SPEC "-lasan" STATIC_LIBASAN_LIBS -@@ -794,10 +794,10 @@ proper position among the other output files. */ +@@ -811,10 +811,10 @@ proper position among the other output files. */ #define LIBTSAN_SPEC STATIC_LIBTSAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBTSAN_SPEC "%{static-libtsan:" LD_STATIC_OPTION "}" \ @@ -38,7 +36,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBTSAN_LIBS #else #define LIBTSAN_SPEC "-ltsan" STATIC_LIBTSAN_LIBS -@@ -815,10 +815,10 @@ proper position among the other output files. */ +@@ -832,10 +832,10 @@ proper position among the other output files. */ #define LIBLSAN_SPEC STATIC_LIBLSAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBLSAN_SPEC "%{static-liblsan:" LD_STATIC_OPTION "}" \ @@ -51,7 +49,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBLSAN_LIBS #else #define LIBLSAN_SPEC "-llsan" STATIC_LIBLSAN_LIBS -@@ -834,10 +834,10 @@ proper position among the other output files. */ +@@ -851,10 +851,10 @@ proper position among the other output files. */ " %{static-libubsan|static:%:include(libsanitizer.spec)%(link_libubsan)}" #ifdef HAVE_LD_STATIC_DYNAMIC #define LIBUBSAN_SPEC "%{static-libubsan:" LD_STATIC_OPTION "}" \ @@ -64,6 +62,3 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBUBSAN_LIBS #else #define LIBUBSAN_SPEC "-lubsan" STATIC_LIBUBSAN_LIBS --- -2.41.0 - diff --git a/cross/gcc-aarch64/0023-riscv-disable-multilib-support.patch b/cross/gcc-aarch64/0023-riscv-disable-multilib-support.patch index 49916376f..eb9ba90fc 100644 --- a/cross/gcc-aarch64/0023-riscv-disable-multilib-support.patch +++ b/cross/gcc-aarch64/0023-riscv-disable-multilib-support.patch @@ -42,11 +42,9 @@ library. gcc/config/riscv/t-linux | 7 +++++-- 2 files changed, 5 insertions(+), 10 deletions(-) -diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h -index f8c2c351e5a..8d9881eadeb 100644 --- a/gcc/config/riscv/linux.h +++ b/gcc/config/riscv/linux.h -@@ -60,11 +60,3 @@ along with GCC; see the file COPYING3. If not see +@@ -61,11 +61,3 @@ along with GCC; see the file COPYING3. If not see %{rdynamic:-export-dynamic} \ -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \ %{static:-static} %{static-pie:-static -pie --no-dynamic-linker -z text}}" @@ -58,11 +56,9 @@ index f8c2c351e5a..8d9881eadeb 100644 - "/usr/lib/ " - -#define RISCV_USE_CUSTOMISED_MULTI_LIB select_by_abi -diff --git a/gcc/config/riscv/t-linux b/gcc/config/riscv/t-linux -index 216d2776a18..1a8a863853e 100644 --- a/gcc/config/riscv/t-linux +++ b/gcc/config/riscv/t-linux -@@ -1,3 +1,6 @@ +@@ -1,5 +1,8 @@ -# Only XLEN and ABI affect Linux multilib dir names, e.g. /lib32/ilp32d/ -MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib64,$(MULTILIB_DIRNAMES))) +MULTILIB_OPTIONS := march=rv64gc @@ -71,6 +67,5 @@ index 216d2776a18..1a8a863853e 100644 +MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib,$(MULTILIB_DIRNAMES))) MULTILIB_OSDIRNAMES := $(patsubst lib%,../lib%,$(MULTILIB_DIRNAMES)) +MULTILIB_MATCHES := march?rv64gc=march?rv64imafdc --- -2.41.0 - + + MULTIARCH_DIRNAME := $(call if_multiarch,$(firstword $(subst -, ,$(target)))-linux-gnu) diff --git a/cross/gcc-aarch64/0024-always-build-libgcc_eh.a.patch b/cross/gcc-aarch64/0024-always-build-libgcc_eh.a.patch index 6b0514e98..5d508ea08 100644 --- a/cross/gcc-aarch64/0024-always-build-libgcc_eh.a.patch +++ b/cross/gcc-aarch64/0024-always-build-libgcc_eh.a.patch @@ -9,11 +9,9 @@ highly inspired by: libgcc/Makefile.in | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) -diff --git a/libgcc/Makefile.in b/libgcc/Makefile.in -index 6c4dc79ab71..023cede18a7 100644 --- a/libgcc/Makefile.in +++ b/libgcc/Makefile.in -@@ -960,8 +960,9 @@ ifneq ($(LIBUNWIND),) +@@ -967,8 +967,9 @@ ifneq ($(LIBUNWIND),) all: libunwind.a endif @@ -24,7 +22,7 @@ index 6c4dc79ab71..023cede18a7 100644 ifneq ($(LIBUNWIND),) all: libunwind$(SHLIB_EXT) libgcc_s$(SHLIB_EXT): libunwind$(SHLIB_EXT) -@@ -1163,10 +1164,6 @@ install-libunwind: +@@ -1173,10 +1174,6 @@ install-libunwind: install-shared: $(mkinstalldirs) $(DESTDIR)$(inst_libdir) @@ -35,7 +33,7 @@ index 6c4dc79ab71..023cede18a7 100644 $(subst @multilib_dir@,$(MULTIDIR),$(subst \ @shlib_base_name@,libgcc_s,$(subst \ @shlib_slibdir_qual@,$(MULTIOSSUBDIR),$(SHLIB_INSTALL)))) -@@ -1183,6 +1180,10 @@ ifeq ($(enable_gcov),yes) +@@ -1193,6 +1190,10 @@ ifeq ($(enable_gcov),yes) $(RANLIB) $(DESTDIR)$(inst_libdir)/libgcov.a endif @@ -46,6 +44,3 @@ index 6c4dc79ab71..023cede18a7 100644 parts="$(INSTALL_PARTS)"; \ for file in $$parts; do \ rm -f $(DESTDIR)$(inst_libdir)/$$file; \ --- -2.41.0 - diff --git a/cross/gcc-aarch64/0026-ada-musl-support-fixes.patch b/cross/gcc-aarch64/0026-ada-musl-support-fixes.patch index 91a8268ab..0be683fa6 100644 --- a/cross/gcc-aarch64/0026-ada-musl-support-fixes.patch +++ b/cross/gcc-aarch64/0026-ada-musl-support-fixes.patch @@ -10,8 +10,6 @@ Subject: [PATCH 26/35] ada: musl support fixes gcc/ada/terminals.c | 8 ++++---- 4 files changed, 35 insertions(+), 33 deletions(-) -diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl -index 32cbdb692..463028fbe 100644 --- a/gcc/ada/Makefile.rtl +++ b/gcc/ada/Makefile.rtl @@ -1558,7 +1558,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),) @@ -23,7 +21,7 @@ index 32cbdb692..463028fbe 100644 a-exetim.adb&5 $as_echo_n "checking for library containing swapcontext... " >&6; } -diff --git a/libphobos/m4/druntime/libraries.m4 b/libphobos/m4/druntime/libraries.m4 -index 45a56f6f76a..fef6e890b1e 100644 --- a/libphobos/m4/druntime/libraries.m4 +++ b/libphobos/m4/druntime/libraries.m4 @@ -220,14 +220,6 @@ AC_DEFUN([DRUNTIME_LIBRARIES_UCONTEXT], @@ -49,6 +45,3 @@ index 45a56f6f76a..fef6e890b1e 100644 if test "$druntime_fiber_asm_external" = no; then AC_SEARCH_LIBS([swapcontext], [c ucontext], [], AC_MSG_ERROR([swapcontext required but not found])) --- -2.41.0 - diff --git a/cross/gcc-aarch64/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch b/cross/gcc-aarch64/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch index e1679a8e5..b53e5847d 100644 --- a/cross/gcc-aarch64/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch +++ b/cross/gcc-aarch64/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch @@ -7,11 +7,9 @@ Subject: [PATCH 32/35] libgnat: time_t is always 64-bit on musl libc gcc/ada/libgnat/s-parame.ads | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/gcc/ada/libgnat/s-parame.ads b/gcc/ada/libgnat/s-parame.ads -index 3d6e345a1ba..cfe0b4d3ca6 100644 --- a/gcc/ada/libgnat/s-parame.ads +++ b/gcc/ada/libgnat/s-parame.ads -@@ -102,7 +102,7 @@ package System.Parameters is +@@ -100,7 +100,7 @@ package System.Parameters is -- Characteristics of time_t type -- ------------------------------------ @@ -20,6 +18,3 @@ index 3d6e345a1ba..cfe0b4d3ca6 100644 -- Number of bits in type time_t ---------------------------------------------- --- -2.41.0 - diff --git a/cross/gcc-aarch64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch b/cross/gcc-aarch64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch deleted file mode 100644 index bc3c4a6ac..000000000 --- a/cross/gcc-aarch64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 4d0a333ef13e2da140cd44c4941b20f48a80dc0f Mon Sep 17 00:00:00 2001 -From: Hannes Braun -Date: Thu, 20 Feb 2025 15:09:41 +0100 -Subject: [PATCH] arm: Fix signedness of vld1q intrinsic parms [PR118942] - -vld1q_s8_x3, vld1q_s16_x3, vld1q_s8_x4 and vld1q_s16_x4 were expecting -pointers to unsigned integers. These parameters should be pointers to -signed integers. - -gcc/ChangeLog: - PR target/118942 - * config/arm/arm_neon.h (vld1q_s8_x3): Use int8_t instead of - uint16_t. - (vld1q_s16_x3): Use int16_t instead of uint16_t. - (vld1q_s8_x4): Likewise. - (vld1q_s16_x4): Likewise. - -gcc/testsuite/ChangeLog: - PR target/118942 - * gcc.target/arm/simd/vld1q_base_xN_1.c: Add -Wpointer-sign. - -Signed-off-by: Hannes Braun ---- - gcc/config/arm/arm_neon.h | 8 ++++---- - gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c | 2 +- - 2 files changed, 5 insertions(+), 5 deletions(-) - -diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h -index 5b1c55c8d9f..578ada88fa6 100644 ---- a/gcc/config/arm/arm_neon.h -+++ b/gcc/config/arm/arm_neon.h -@@ -10854,7 +10854,7 @@ vld1q_s64_x2 (const int64_t * __a) - - __extension__ extern __inline int8x16x3_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s8_x3 (const uint8_t * __a) -+vld1q_s8_x3 (const int8_t * __a) - { - union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a); -@@ -10863,7 +10863,7 @@ vld1q_s8_x3 (const uint8_t * __a) - - __extension__ extern __inline int16x8x3_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s16_x3 (const uint16_t * __a) -+vld1q_s16_x3 (const int16_t * __a) - { - union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a); -@@ -10890,7 +10890,7 @@ vld1q_s64_x3 (const int64_t * __a) - - __extension__ extern __inline int8x16x4_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s8_x4 (const uint8_t * __a) -+vld1q_s8_x4 (const int8_t * __a) - { - union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x4v16qi ((const __builtin_neon_qi *) __a); -@@ -10899,7 +10899,7 @@ vld1q_s8_x4 (const uint8_t * __a) - - __extension__ extern __inline int16x8x4_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s16_x4 (const uint16_t * __a) -+vld1q_s16_x4 (const int16_t * __a) - { - union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x4v8hi ((const __builtin_neon_hi *) __a); -diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -index 01b29b60084..c73afe2b723 100644 ---- a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -+++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -@@ -1,6 +1,6 @@ - /* { dg-do assemble } */ - /* { dg-require-effective-target arm_neon_ok } */ --/* { dg-options "-save-temps -O2" } */ -+/* { dg-options "-save-temps -O2 -Wpointer-sign" } */ - /* { dg-add-options arm_neon } */ - - #include "arm_neon.h" --- -2.48.1 - diff --git a/cross/gcc-aarch64/APKBUILD b/cross/gcc-aarch64/APKBUILD index 1ece135e6..b6b07fd8c 100644 --- a/cross/gcc-aarch64/APKBUILD +++ b/cross/gcc-aarch64/APKBUILD @@ -24,7 +24,7 @@ CBUILDROOT="/" _cross_configure="--disable-bootstrap --with-sysroot=/usr/$CTARGET" pkgname=gcc-aarch64 -pkgver=14.2.0 +pkgver=14.3.0 # i.e. 13.2.1, must match gcc/BASE-VER _pkgbase="${pkgver%%_git*}" # date component from snapshots @@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}" [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target="" pkgname=gcc-aarch64 -pkgrel=6 +pkgrel=1 pkgdesc="Stage2 cross-compiler for aarch64" url="https://gcc.gnu.org" arch="x86_64" @@ -278,10 +278,6 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz 0034-libgo-fix-lfs64-use.patch 0035-loongarch-disable-multilib-support.patch 0036-libphobos-add-riscv64-and-loongarch64-support.patch - 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch - fix-arm64.patch - ppc64le-quadmath.patch - riscv64-improve-build-time.patch " # secfixes: @@ -291,8 +287,8 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz # we build out-of-tree #builddir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap builddir="$srcdir"/gcc-$_pkgbase -_gcclibdir="/usr/lib/gcc/$CTARGET/$_pkgbase" -_gcclibexec="/usr/libexec/gcc/$CTARGET/$_pkgbase" +_gcclibdir="usr/lib/gcc/$CTARGET/$_pkgbase" +_gcclibexec="usr/libexec/gcc/$CTARGET/$_pkgbase" prepare() { default_prepare @@ -319,7 +315,7 @@ build() { i586-*-*-*) _arch_configure="--with-arch=pentium-m --with-fpmath=sse --with-tune=generic --enable-cld";; s390x-*-*-*) _arch_configure="--with-arch=z196 --with-tune=zEC12 --with-zarch --with-long-double-128 --enable-decimal-float";; riscv64-*-*-*) _arch_configure="--with-arch=rv64gc --with-abi=lp64d --enable-autolink-libatomic";; - loongarch64-*-*-*) _arch_configure="--with-arch=la64v1.0 --with-abi=lp64d";; + loongarch64-*-*-*) _arch_configure="--with-arch=la64v1.0 --with-abi=lp64d";; esac case "$CTARGET_ARCH" in @@ -431,6 +427,11 @@ package() { [ "$CHOST" = "$CTARGET" ] && ln -s gcc "$pkgdir"/usr/bin/cc ln -s ${CTARGET}-gcc "$pkgdir"/usr/bin/${CTARGET}-cc + # symlink to vendor-less target triple for + # supporting clang --target's fallback match + # ref: https://gitlab.alpinelinux.org/alpine/aports/-/issues/16828 + ln -s "$CTARGET" "$pkgdir/usr/lib/gcc/${CTARGET%%-*}-${CTARGET#*-*-}" + if $LANG_JIT; then make -C "$_builddir"/libgccjit-build/gcc DESTDIR="$pkgdir" jit.install-common fi @@ -487,8 +488,6 @@ package() { # libcc1 does not depend on target, don't ship it rm -rf "$pkgdir"/usr/lib/libcc1.so* - # These are moved into packages with arch=$CTARGET_ARCH so remove - # cross prefix (doesn't exist when BOOTSTRAP=nolibc) # fixup gcc library symlinks to be linker scripts so # linker finds the libs from relocated sysroot @@ -663,7 +662,6 @@ libgo() { go() { pkgdesc="GCC Go frontend (intended for bootstrapping community/go)" depends="gcc=$_gccrel libgo=$_gccrel !go" - install="$pkgname-go.post-install" amove usr/lib/go amove usr/bin/*go @@ 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-00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f fix-arm64.patch -815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9 ppc64le-quadmath.patch -ea55e0fa6813fc95c4ca2e87f059182edc54dc61515ebb92bf6eb31dbbd176d0fe81edcc7ea28d32f84ca37e8d48a544623d3d9bc94aa41ffc0859326a616aa2 riscv64-improve-build-time.patch " diff --git a/cross/gcc-aarch64/fix-arm64.patch b/cross/gcc-aarch64/fix-arm64.patch deleted file mode 100644 index 8aaa9f742..000000000 --- a/cross/gcc-aarch64/fix-arm64.patch +++ /dev/null @@ -1,544 +0,0 @@ -From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Thu, 13 Jun 2024 12:48:21 +0100 -Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464] - -The testcase extracts one arm_neon.h vector from a pair (one subreg) -and then reinterprets the result as an SVE vector (another subreg). -Each subreg makes sense individually, but we can't fold them together -into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes, -but the interpretation of 32 bytes -> 16*N bytes depends on -whether N==1 or N>1. - -Since the second subreg makes sense individually, simplify_subreg -should bail out rather than ICE on it. simplify_gen_subreg will -then do the same (because it already checks validate_subreg). -This leaves simplify_gen_subreg returning null, requiring the -caller to take appropriate action. - -I think this is relatively likely to occur elsewhere, so the patch -adds a helper for forcing a subreg, allowing a temporary pseudo to -be created where necessary. - -I'll follow up by using force_subreg in more places. This patch -is intended to be a minimal backportable fix for the PR. - -gcc/ - PR target/115464 - * simplify-rtx.cc (simplify_context::simplify_subreg): Don't try - to fold two subregs together if their relationship isn't known - at compile time. - * explow.h (force_subreg): Declare. - * explow.cc (force_subreg): New function. - * config/aarch64/aarch64-sve-builtins-base.cc - (svset_neonq_impl::expand): Use it instead of simplify_gen_subreg. - -gcc/testsuite/ - PR target/115464 - * gcc.target/aarch64/sve/acle/general/pr115464.c: New test. - -(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0) ---- - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- - gcc/explow.cc | 15 +++++++++++++++ - gcc/explow.h | 2 ++ - gcc/simplify-rtx.cc | 5 +++++ - .../aarch64/sve/acle/general/pr115464.c | 13 +++++++++++++ - 5 files changed, 36 insertions(+), 1 deletion(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c - -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index 0d2edf3f19e..c9182594bc1 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1174,7 +1174,7 @@ public: - Advanced SIMD argument as an SVE vector. */ - if (!BYTES_BIG_ENDIAN - && is_undef (CALL_EXPR_ARG (e.call_expr, 0))) -- return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0); -+ return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0); - - rtx_vector_builder builder (VNx16BImode, 16, 2); - for (unsigned int i = 0; i < 16; i++) -diff --git a/gcc/explow.cc b/gcc/explow.cc -index 8e5f6b8e680..f6843398c4b 100644 ---- a/gcc/explow.cc -+++ b/gcc/explow.cc -@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x) - return temp; - } - -+/* Like simplify_gen_subreg, but force OP into a new register if the -+ subreg cannot be formed directly. */ -+ -+rtx -+force_subreg (machine_mode outermode, rtx op, -+ machine_mode innermode, poly_uint64 byte) -+{ -+ rtx x = simplify_gen_subreg (outermode, op, innermode, byte); -+ if (x) -+ return x; -+ -+ op = copy_to_mode_reg (innermode, op); -+ return simplify_gen_subreg (outermode, op, innermode, byte); -+} -+ - /* If X is a memory ref, copy its contents to a new temp reg and return - that reg. Otherwise, return X. */ - -diff --git a/gcc/explow.h b/gcc/explow.h -index 16aa02cfb68..cbd1fcb7eb3 100644 ---- a/gcc/explow.h -+++ b/gcc/explow.h -@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode); - Args are mode (in case value is a constant) and the value. */ - extern rtx force_reg (machine_mode, rtx); - -+extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64); -+ - /* Return given rtx, copied into a new temp reg if it was in memory. */ - extern rtx force_not_mem (rtx); - -diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc -index dceaa13333c..729d408aa55 100644 ---- a/gcc/simplify-rtx.cc -+++ b/gcc/simplify-rtx.cc -@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op, - poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode); - rtx newx; - -+ /* Make sure that the relationship between the two subregs is -+ known at compile time. */ -+ if (!ordered_p (outersize, innermostsize)) -+ return NULL_RTX; -+ - if (outermode == innermostmode - && known_eq (byte, 0U) - && known_eq (SUBREG_BYTE (op), 0)) -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c -new file mode 100644 -index 00000000000..d728d1325ed ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c -@@ -0,0 +1,13 @@ -+/* { dg-options "-O2" } */ -+ -+#include -+#include -+#include -+ -+svuint16_t -+convolve4_4_x (uint16x8x2_t permute_tbl) -+{ -+ return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]); -+} -+ -+/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */ --- -2.46.0 - - -From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:30 +0100 -Subject: [PATCH 2/4] aarch64: Use force_subreg in more places - -This patch makes the aarch64 code use force_subreg instead of -simplify_gen_subreg in more places. The criteria were: - -(1) The code is obviously specific to expand (where new pseudos - can be created). - -(2) The value is obviously an rvalue rather than an lvalue. - -(3) The offset wasn't a simple lowpart or highpart calculation; - a later patch will deal with those. - -gcc/ - * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin): - Use force_subreg instead of simplify_gen_subreg. - * config/aarch64/aarch64-simd.md (ctz2): Likewise. - * config/aarch64/aarch64-sve-builtins-base.cc - (svget_impl::expand): Likewise. - (svget_neonq_impl::expand): Likewise. - * config/aarch64/aarch64-sve-builtins-functions.h - (multireg_permute::expand): Likewise. - -(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4) ---- - gcc/config/aarch64/aarch64-builtins.cc | 4 ++-- - gcc/config/aarch64/aarch64-simd.md | 4 ++-- - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 8 +++----- - gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++--- - 4 files changed, 10 insertions(+), 12 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc -index 75d21de1401..b2e46a073a8 100644 ---- a/gcc/config/aarch64/aarch64-builtins.cc -+++ b/gcc/config/aarch64/aarch64-builtins.cc -@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - rtx temp2 = gen_reg_rtx (DImode); - temp1 = simplify_gen_subreg (d->mode, op2, quadmode, - subreg_lowpart_offset (d->mode, quadmode)); -- temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0); -+ temp1 = force_subreg (V2DImode, temp1, d->mode, 0); - if (BYTES_BIG_ENDIAN) - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx)); - else - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx)); -- op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0); -+ op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0); - - /* And recalculate the index. */ - lane -= nunits / 4; -diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md -index 33ab0741e87..5b9efe0b165 100644 ---- a/gcc/config/aarch64/aarch64-simd.md -+++ b/gcc/config/aarch64/aarch64-simd.md -@@ -412,8 +412,8 @@ - "TARGET_SIMD" - { - emit_insn (gen_bswap2 (operands[0], operands[1])); -- rtx op0_castsi2qi = simplify_gen_subreg(mode, operands[0], -- mode, 0); -+ rtx op0_castsi2qi = force_subreg (mode, operands[0], -+ mode, 0); - emit_insn (gen_aarch64_rbit (op0_castsi2qi, op0_castsi2qi)); - emit_insn (gen_clz2 (operands[0], operands[0])); - DONE; -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index c9182594bc1..2c95da79572 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1121,9 +1121,8 @@ public: - expand (function_expander &e) const override - { - /* Fold the access into a subreg rvalue. */ -- return simplify_gen_subreg (e.vector_mode (0), e.args[0], -- GET_MODE (e.args[0]), -- INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR); -+ return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]), -+ INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR); - } - }; - -@@ -1157,8 +1156,7 @@ public: - e.add_fixed_operand (indices); - return e.generate_insn (icode); - } -- return simplify_gen_subreg (e.result_mode (), e.args[0], -- GET_MODE (e.args[0]), 0); -+ return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0); - } - }; - -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h -index 3b8e575e98e..7d06a57ff83 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h -+++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h -@@ -639,9 +639,9 @@ public: - { - machine_mode elt_mode = e.vector_mode (0); - rtx arg = e.args[0]; -- e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0); -- e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), -- GET_MODE_SIZE (elt_mode))); -+ e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0); -+ e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg), -+ GET_MODE_SIZE (elt_mode))); - } - return e.use_exact_insn (icode); - } --- -2.46.0 - - -From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:31 +0100 -Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg - -This patch makes more use of force_lowpart_subreg, similarly -to the recent patch for force_subreg. The criteria were: - -(1) The code is obviously specific to expand (where new pseudos - can be created). - -(2) The value is obviously an rvalue rather than an lvalue. - -gcc/ - PR target/115464 - * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin) - (aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of - simplify_gen_subreg and lowpart_subreg. - * config/aarch64/aarch64-sve-builtins-base.cc - (svset_neonq_impl::expand): Likewise. - * config/aarch64/aarch64-sve-builtins-sme.cc - (add_load_store_slice_operand): Likewise. - * config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise. - (aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise. - -gcc/testsuite/ - PR target/115464 - * gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test. - -(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def) ---- - gcc/config/aarch64/aarch64-builtins.cc | 11 +++++------ - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- - gcc/config/aarch64/aarch64-sve-builtins-sme.cc | 2 +- - gcc/config/aarch64/aarch64.cc | 14 +++++--------- - .../aarch64/sve/acle/general/pr115464_2.c | 11 +++++++++++ - 5 files changed, 23 insertions(+), 17 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c - -diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc -index b2e46a073a8..264b9560709 100644 ---- a/gcc/config/aarch64/aarch64-builtins.cc -+++ b/gcc/config/aarch64/aarch64-builtins.cc -@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - int lane = INTVAL (lane_idx); - - if (lane < nunits / 4) -- op2 = simplify_gen_subreg (d->mode, op2, quadmode, -- subreg_lowpart_offset (d->mode, quadmode)); -+ op2 = force_lowpart_subreg (d->mode, op2, quadmode); - else - { - /* Select the upper 64 bits, either a V2SF or V4HF, this however -@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - gen_highpart_mode generates code that isn't optimal. */ - rtx temp1 = gen_reg_rtx (d->mode); - rtx temp2 = gen_reg_rtx (DImode); -- temp1 = simplify_gen_subreg (d->mode, op2, quadmode, -- subreg_lowpart_offset (d->mode, quadmode)); -+ temp1 = force_lowpart_subreg (d->mode, op2, quadmode); - temp1 = force_subreg (V2DImode, temp1, d->mode, 0); - if (BYTES_BIG_ENDIAN) - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx)); -@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode) - case AARCH64_WSR64: - case AARCH64_WSRF64: - case AARCH64_WSR128: -- subreg = lowpart_subreg (sysreg_mode, input_val, mode); -+ subreg = force_lowpart_subreg (sysreg_mode, input_val, mode); - break; - case AARCH64_WSRF: - subreg = gen_lowpart_SUBREG (SImode, input_val); -@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode) - case AARCH64_RSR64: - case AARCH64_RSRF64: - case AARCH64_RSR128: -- return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode); -+ return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), -+ target, sysreg_mode); - case AARCH64_RSRF: - subreg = gen_lowpart_SUBREG (SImode, target); - return gen_lowpart_SUBREG (SFmode, subreg); -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index 2c95da79572..3c970e9c5f8 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1183,7 +1183,7 @@ public: - if (BYTES_BIG_ENDIAN) - return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode)); - insn_code icode = code_for_vcond_mask (mode, mode); -- e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1])); -+ e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1])); - e.add_output_operand (icode); - e.add_input_operand (icode, e.args[1]); - e.add_input_operand (icode, e.args[0]); -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -index f4c91bcbb95..b66b35ae60b 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode, - rtx base = e.args[argno]; - if (e.mode_suffix_id == MODE_vnum) - { -- rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode); -+ rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode); - base = simplify_gen_binary (PLUS, SImode, base, vnum); - } - e.add_input_operand (icode, base); -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 1beec94629d..a064aeecbc0 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x) - /* can_change_mode_class must only return true if subregs and svreinterprets - have the same semantics. */ - if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS)) -- return lowpart_subreg (mode, x, GET_MODE (x)); -+ return force_lowpart_subreg (mode, x, GET_MODE (x)); - - rtx res = gen_reg_rtx (mode); - x = force_reg (GET_MODE (x), x); -@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest, - rtx *high_in2) - { - *low_dest = gen_reg_rtx (DImode); -- *low_in1 = gen_lowpart (DImode, op1); -- *low_in2 = simplify_gen_subreg (DImode, op2, TImode, -- subreg_lowpart_offset (DImode, TImode)); -+ *low_in1 = force_lowpart_subreg (DImode, op1, TImode); -+ *low_in2 = force_lowpart_subreg (DImode, op2, TImode); - *high_dest = gen_reg_rtx (DImode); - *high_in1 = gen_highpart (DImode, op1); - *high_in2 = simplify_gen_subreg (DImode, op2, TImode, -@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest, - rtx *high_in2) - { - *low_dest = gen_reg_rtx (DImode); -- *low_in1 = simplify_gen_subreg (DImode, op1, TImode, -- subreg_lowpart_offset (DImode, TImode)); -- -- *low_in2 = simplify_gen_subreg (DImode, op2, TImode, -- subreg_lowpart_offset (DImode, TImode)); -+ *low_in1 = force_lowpart_subreg (DImode, op1, TImode); -+ *low_in2 = force_lowpart_subreg (DImode, op2, TImode); - *high_dest = gen_reg_rtx (DImode); - - *high_in1 = simplify_gen_subreg (DImode, op1, TImode, -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c -new file mode 100644 -index 00000000000..f561c34f732 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c -@@ -0,0 +1,11 @@ -+/* { dg-options "-O2" } */ -+ -+#include -+#include -+#include -+ -+svuint16_t -+convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a) -+{ -+ return svset_neonq_u16 (a, permute_tbl.val[1]); -+} --- -2.46.0 - - -From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:31 +0100 -Subject: [PATCH 4/4] Add force_lowpart_subreg - -optabs had a local function called lowpart_subreg_maybe_copy -that is very similar to the lowpart version of force_subreg. -This patch adds a force_lowpart_subreg wrapper around -force_subreg and uses it in optabs.cc. - -The only difference between the old and new functions is that -the old one asserted success while the new one doesn't. -It's common not to assert elsewhere when taking subregs; -normally a null result is enough. - -Later patches will make more use of the new function. - -gcc/ - * explow.h (force_lowpart_subreg): Declare. - * explow.cc (force_lowpart_subreg): New function. - * optabs.cc (lowpart_subreg_maybe_copy): Delete. - (expand_absneg_bit): Use force_lowpart_subreg instead of - lowpart_subreg_maybe_copy. - (expand_copysign_bit): Likewise. - -(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c) ---- - gcc/explow.cc | 14 ++++++++++++++ - gcc/explow.h | 1 + - gcc/optabs.cc | 24 ++---------------------- - 3 files changed, 17 insertions(+), 22 deletions(-) - -diff --git a/gcc/explow.cc b/gcc/explow.cc -index f6843398c4b..5fdfa81f69b 100644 ---- a/gcc/explow.cc -+++ b/gcc/explow.cc -@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op, - return simplify_gen_subreg (outermode, op, innermode, byte); - } - -+/* Try to return an rvalue expression for the OUTERMODE lowpart of OP, -+ which has mode INNERMODE. Allow OP to be forced into a new register -+ if necessary. -+ -+ Return null on failure. */ -+ -+rtx -+force_lowpart_subreg (machine_mode outermode, rtx op, -+ machine_mode innermode) -+{ -+ auto byte = subreg_lowpart_offset (outermode, innermode); -+ return force_subreg (outermode, op, innermode, byte); -+} -+ - /* If X is a memory ref, copy its contents to a new temp reg and return - that reg. Otherwise, return X. */ - -diff --git a/gcc/explow.h b/gcc/explow.h -index cbd1fcb7eb3..dd654649b06 100644 ---- a/gcc/explow.h -+++ b/gcc/explow.h -@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode); - extern rtx force_reg (machine_mode, rtx); - - extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64); -+extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode); - - /* Return given rtx, copied into a new temp reg if it was in memory. */ - extern rtx force_not_mem (rtx); -diff --git a/gcc/optabs.cc b/gcc/optabs.cc -index ce91f94ed43..804c0dc73ba 100644 ---- a/gcc/optabs.cc -+++ b/gcc/optabs.cc -@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target) - return 0; - } - --/* Extract the OMODE lowpart from VAL, which has IMODE. Under certain -- conditions, VAL may already be a SUBREG against which we cannot generate -- a further SUBREG. In this case, we expect forcing the value into a -- register will work around the situation. */ -- --static rtx --lowpart_subreg_maybe_copy (machine_mode omode, rtx val, -- machine_mode imode) --{ -- rtx ret; -- ret = lowpart_subreg (omode, val, imode); -- if (ret == NULL) -- { -- val = force_reg (imode, val); -- ret = lowpart_subreg (omode, val, imode); -- gcc_assert (ret != NULL); -- } -- return ret; --} -- - /* Expand a floating point absolute value or negation operation via a - logical operation on the sign bit. */ - -@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode, - gen_lowpart (imode, op0), - immed_wide_int_const (mask, imode), - gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN); -- target = lowpart_subreg_maybe_copy (mode, temp, imode); -+ target = force_lowpart_subreg (mode, temp, imode); - - set_dst_reg_note (get_last_insn (), REG_EQUAL, - gen_rtx_fmt_e (code, mode, copy_rtx (op0)), -@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target, - - temp = expand_binop (imode, ior_optab, op0, op1, - gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN); -- target = lowpart_subreg_maybe_copy (mode, temp, imode); -+ target = force_lowpart_subreg (mode, temp, imode); - } - - return target; --- -2.46.0 - diff --git a/cross/gcc-aarch64/gcc-go.post-install b/cross/gcc-aarch64/gcc-go.post-install deleted file mode 100644 index 6805fa7cf..000000000 --- a/cross/gcc-aarch64/gcc-go.post-install +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/sh - -cat 1>&2 < -Date: Sat, 3 Aug 2024 20:37:54 +0200 -Subject: [PATCH] libquadmath: Fix up libquadmath/math/sqrtq.c compilation in - some powerpc* configurations [PR116007] - -My PR114623 change started using soft-fp.h and quad.h for the sqrtq implementation. -Unfortunately, that seems to fail building in some powerpc* configurations, where -TFmode isn't available. -quad.h has: - #ifndef TFtype - typedef float TFtype __attribute__ ((mode (TF))); - #endif -and uses TFtype. quad.h has: - /* Define the complex type corresponding to __float128 - ("_Complex __float128" is not allowed) */ - #if (!defined(_ARCH_PPC)) || defined(__LONG_DOUBLE_IEEE128__) - typedef _Complex float __attribute__((mode(TC))) __complex128; - #else - typedef _Complex float __attribute__((mode(KC))) __complex128; - #endif -with the conditional and KCmode use added during porting of libquadmath -to powerpc*, so I've just defined TFtype for powerpc when __LONG_DOUBLE_IEEE128__ -isn't defined; I could define it to float __attribute__ ((mode (KF))) but it -seemed easier to just define it to __float128 which should do the same thing. - -2024-08-03 Jakub Jelinek - - PR target/116007 - * math/sqrtq.c (TFtype): For PowerPC without __LONG_DOUBLE_IEEE128__ - define to __float128 before including soft-fp.h and quad.h. - -(cherry picked from commit 3ac02e67503ccffa3dfeeffc0a60fce6bdaca43b) ---- - libquadmath/math/sqrtq.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/libquadmath/math/sqrtq.c b/libquadmath/math/sqrtq.c -index 8ca2828d42ce..a58998a06670 100644 ---- a/libquadmath/math/sqrtq.c -+++ b/libquadmath/math/sqrtq.c -@@ -9,6 +9,9 @@ - && defined(FE_TOWARDZERO) \ - && defined(FE_INEXACT) - #define USE_SOFT_FP 1 -+#if defined(_ARCH_PPC) && !defined(__LONG_DOUBLE_IEEE128__) -+#define TFtype __float128 -+#endif - #include "../../libgcc/soft-fp/soft-fp.h" - #include "../../libgcc/soft-fp/quad.h" - #endif --- -2.43.5 - diff --git a/cross/gcc-aarch64/riscv64-improve-build-time.patch b/cross/gcc-aarch64/riscv64-improve-build-time.patch deleted file mode 100644 index 2c8c52a2c..000000000 --- a/cross/gcc-aarch64/riscv64-improve-build-time.patch +++ /dev/null @@ -1,149 +0,0 @@ -Patch-Source: https://gcc.gnu.org/git/?p=gcc.git;a=patch;h=2cf89ae83225f932b226cd57ef2d083a59bcf8a3 --- -From 2cf89ae83225f932b226cd57ef2d083a59bcf8a3 Mon Sep 17 00:00:00 2001 -From: Richard Biener -Date: Tue, 6 Aug 2024 14:56:26 +0200 -Subject: [PATCH] tree-optimization/116166 - forward jump-threading going wild - -Currently the forward threader isn't limited as to the search space -it explores and with it now using path-ranger for simplifying -conditions it runs into it became pretty slow for degenerate cases -like compiling insn-emit.cc for RISC-V esp. when compiling for -a host with LOGICAL_OP_NON_SHORT_CIRCUIT disabled. - -The following makes the forward threader honor the search space -limit I introduced for the backward threader. This reduces -compile-time from minutes to seconds for the testcase in PR116166. - -Note this wasn't necessary before we had ranger but with ranger -the work we do is quadatic in the length of the threading path -we build up (the same is true for the backwards threader). - - PR tree-optimization/116166 - * tree-ssa-threadedge.h (jump_threader::thread_around_empty_blocks): - Add limit parameter. - (jump_threader::thread_through_normal_block): Likewise. - * tree-ssa-threadedge.cc (jump_threader::thread_around_empty_blocks): - Honor and decrement limit parameter. - (jump_threader::thread_through_normal_block): Likewise. - (jump_threader::thread_across_edge): Initialize limit from - param_max_jump_thread_paths and pass it down to workers. ---- - gcc/tree-ssa-threadedge.cc | 30 ++++++++++++++++++++++-------- - gcc/tree-ssa-threadedge.h | 4 ++-- - 2 files changed, 24 insertions(+), 10 deletions(-) - -diff --git a/gcc/tree-ssa-threadedge.cc b/gcc/tree-ssa-threadedge.cc -index 7f82639b8ecc..0aa2aa851430 100644 ---- a/gcc/tree-ssa-threadedge.cc -+++ b/gcc/tree-ssa-threadedge.cc -@@ -786,13 +786,17 @@ propagate_threaded_block_debug_into (basic_block dest, basic_block src) - bool - jump_threader::thread_around_empty_blocks (vec *path, - edge taken_edge, -- bitmap visited) -+ bitmap visited, unsigned &limit) - { - basic_block bb = taken_edge->dest; - gimple_stmt_iterator gsi; - gimple *stmt; - tree cond; - -+ if (limit == 0) -+ return false; -+ --limit; -+ - /* The key property of these blocks is that they need not be duplicated - when threading. Thus they cannot have visible side effects such - as PHI nodes. */ -@@ -830,7 +834,8 @@ jump_threader::thread_around_empty_blocks (vec *path, - m_registry->push_edge (path, taken_edge, EDGE_NO_COPY_SRC_BLOCK); - m_state->append_path (taken_edge->dest); - bitmap_set_bit (visited, taken_edge->dest->index); -- return thread_around_empty_blocks (path, taken_edge, visited); -+ return thread_around_empty_blocks (path, taken_edge, visited, -+ limit); - } - } - -@@ -872,7 +877,7 @@ jump_threader::thread_around_empty_blocks (vec *path, - m_registry->push_edge (path, taken_edge, EDGE_NO_COPY_SRC_BLOCK); - m_state->append_path (taken_edge->dest); - -- thread_around_empty_blocks (path, taken_edge, visited); -+ thread_around_empty_blocks (path, taken_edge, visited, limit); - return true; - } - -@@ -899,8 +904,13 @@ jump_threader::thread_around_empty_blocks (vec *path, - - int - jump_threader::thread_through_normal_block (vec *path, -- edge e, bitmap visited) -+ edge e, bitmap visited, -+ unsigned &limit) - { -+ if (limit == 0) -+ return 0; -+ limit--; -+ - m_state->register_equivs_edge (e); - - /* PHIs create temporary equivalences. -@@ -989,7 +999,7 @@ jump_threader::thread_through_normal_block (vec *path, - visited. This may be overly conservative. */ - bitmap_set_bit (visited, dest->index); - bitmap_set_bit (visited, e->dest->index); -- thread_around_empty_blocks (path, taken_edge, visited); -+ thread_around_empty_blocks (path, taken_edge, visited, limit); - return 1; - } - } -@@ -1075,9 +1085,12 @@ jump_threader::thread_across_edge (edge e) - bitmap_set_bit (visited, e->src->index); - bitmap_set_bit (visited, e->dest->index); - -+ /* Limit search space. */ -+ unsigned limit = param_max_jump_thread_paths; -+ - int threaded = 0; - if ((e->flags & EDGE_DFS_BACK) == 0) -- threaded = thread_through_normal_block (path, e, visited); -+ threaded = thread_through_normal_block (path, e, visited, limit); - - if (threaded > 0) - { -@@ -1148,11 +1161,12 @@ jump_threader::thread_across_edge (edge e) - m_registry->push_edge (path, e, EDGE_START_JUMP_THREAD); - m_registry->push_edge (path, taken_edge, EDGE_COPY_SRC_JOINER_BLOCK); - -- found = thread_around_empty_blocks (path, taken_edge, visited); -+ found = thread_around_empty_blocks (path, taken_edge, visited, limit); - - if (!found) - found = thread_through_normal_block (path, -- path->last ()->e, visited) > 0; -+ path->last ()->e, visited, -+ limit) > 0; - - /* If we were able to thread through a successor of E->dest, then - record the jump threading opportunity. */ -diff --git a/gcc/tree-ssa-threadedge.h b/gcc/tree-ssa-threadedge.h -index 9f6cbfe93307..245b3506a550 100644 ---- a/gcc/tree-ssa-threadedge.h -+++ b/gcc/tree-ssa-threadedge.h -@@ -101,9 +101,9 @@ private: - unsigned limit); - - bool thread_around_empty_blocks (vec *path, -- edge, bitmap visited); -+ edge, bitmap visited, unsigned &limit); - int thread_through_normal_block (vec *path, -- edge, bitmap visited); -+ edge, bitmap visited, unsigned &limit); - void thread_across_edge (edge); - bool record_temporary_equivalences_from_phis (edge); - gimple *record_temporary_equivalences_from_stmts_at_dest (edge); --- -2.43.5 - diff --git a/cross/gcc-armhf/0002-gcc-poison-system-directories.patch b/cross/gcc-armhf/0002-gcc-poison-system-directories.patch index 84c80c95b..9a1671267 100644 --- a/cross/gcc-armhf/0002-gcc-poison-system-directories.patch +++ b/cross/gcc-armhf/0002-gcc-poison-system-directories.patch @@ -25,11 +25,9 @@ Upstream-Status: Pending gcc/incpath.cc | 21 +++++++++++++++++++++ 7 files changed, 68 insertions(+) -diff --git a/gcc/common.opt b/gcc/common.opt -index 862c474d3c8..64c4277c991 100644 --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -711,6 +711,10 @@ Wreturn-local-addr +@@ -715,6 +715,10 @@ Wreturn-local-addr Common Var(warn_return_local_addr) Init(1) Warning Warn about returning a pointer/reference to a local or temporary variable. @@ -40,11 +38,9 @@ index 862c474d3c8..64c4277c991 100644 Wshadow Common Var(warn_shadow) Warning Warn when one variable shadows another. Same as -Wshadow=global. -diff --git a/gcc/config.in b/gcc/config.in -index 4cad077bfbe..0679fbbf4c6 100644 --- a/gcc/config.in +++ b/gcc/config.in -@@ -236,6 +236,12 @@ +@@ -249,6 +249,12 @@ #endif @@ -57,19 +53,17 @@ index 4cad077bfbe..0679fbbf4c6 100644 /* Define if you want all operations on RTL (the basic data structure of the optimizer and back end) to be checked for dynamic type safety at runtime. This is quite expensive. */ -diff --git a/gcc/configure b/gcc/configure -index c7b26d1927d..8c46369f73f 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -1026,6 +1026,7 @@ enable_maintainer_mode +@@ -1050,6 +1050,7 @@ enable_maintainer_mode enable_link_mutex enable_link_serialization enable_version_specific_runtime_libs +enable_poison_system_directories enable_plugin enable_host_shared - enable_libquadmath_support -@@ -1788,6 +1789,8 @@ Optional Features: + enable_host_pie +@@ -1823,6 +1824,8 @@ Optional Features: --enable-version-specific-runtime-libs specify that runtime libraries should be installed in a compiler-specific directory @@ -77,8 +71,8 @@ index c7b26d1927d..8c46369f73f 100755 + warn for use of native system header directories --enable-plugin enable plugin support --enable-host-shared build host code as shared libraries - --disable-libquadmath-support -@@ -31753,6 +31756,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : + --enable-host-pie build host code as PIE +@@ -34082,6 +34085,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : fi @@ -98,11 +92,9 @@ index c7b26d1927d..8c46369f73f 100755 # Substitute configuration variables -diff --git a/gcc/configure.ac b/gcc/configure.ac -index 09082e8ccae..5504bf6eb01 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -7292,6 +7292,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs, +@@ -7555,6 +7555,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs, [specify that runtime libraries should be installed in a compiler-specific directory])]) @@ -119,11 +111,9 @@ index 09082e8ccae..5504bf6eb01 100644 # Substitute configuration variables AC_SUBST(subdirs) AC_SUBST(srcdir) -diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index af0e5933fdb..b6731a4673c 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -384,6 +384,7 @@ Objective-C and Objective-C++ Dialects}. +@@ -391,6 +391,7 @@ Objective-C and Objective-C++ Dialects}. -Wpacked -Wno-packed-bitfield-compat -Wpacked-not-aligned -Wpadded -Wparentheses -Wno-pedantic-ms-format -Wpointer-arith -Wno-pointer-compare -Wno-pointer-to-int-cast @@ -131,7 +121,7 @@ index af0e5933fdb..b6731a4673c 100644 -Wno-pragmas -Wno-prio-ctor-dtor -Wredundant-decls -Wrestrict -Wno-return-local-addr -Wreturn-type -Wno-scalar-storage-order -Wsequence-point -@@ -8426,6 +8427,14 @@ made up of data only and thus requires no special treatment. But, for +@@ -8861,6 +8862,14 @@ made up of data only and thus requires no special treatment. But, for most targets, it is made up of code and thus requires the stack to be made executable in order for the program to work properly. @@ -146,12 +136,10 @@ index af0e5933fdb..b6731a4673c 100644 @opindex Wfloat-equal @opindex Wno-float-equal @item -Wfloat-equal -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 16bb07f2cdc..33b56e721d2 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -1177,6 +1187,8 @@ proper position among the other output files. */ - "-z now " \ +@@ -1163,6 +1163,8 @@ proper position among the other output files. */ + "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \ "%X %{o*} %{e*} %{N} %{n} %{r}\ %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \ + %{Wno-poison-system-directories:--no-poison-system-directories} \ @@ -159,8 +147,6 @@ index 16bb07f2cdc..33b56e721d2 100644 %{static|no-pie|static-pie:} %@{L*} %(link_libgcc) " \ VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \ %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\ -diff --git a/gcc/incpath.cc b/gcc/incpath.cc -index 4d44321183f..0f3f071b44c 100644 --- a/gcc/incpath.cc +++ b/gcc/incpath.cc @@ -26,6 +26,7 @@ @@ -198,6 +184,3 @@ index 4d44321183f..0f3f071b44c 100644 } /* Use given -I paths for #include "..." but not #include <...>, and --- -2.41.0 - diff --git a/cross/gcc-armhf/0003-specs-turn-on-Wl-z-now-by-default.patch b/cross/gcc-armhf/0003-specs-turn-on-Wl-z-now-by-default.patch index bfb0a6eba..33e8b56f1 100644 --- a/cross/gcc-armhf/0003-specs-turn-on-Wl-z-now-by-default.patch +++ b/cross/gcc-armhf/0003-specs-turn-on-Wl-z-now-by-default.patch @@ -13,11 +13,9 @@ now by default. gcc/gcc.cc | 1 + 2 files changed, 4 insertions(+) -diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index b6731a4673c..f393c7846c6 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -17961,6 +17961,9 @@ For example, @option{-Wl,-Map,output.map} passes @option{-Map output.map} to the +@@ -18935,6 +18935,9 @@ For example, @option{-Wl,-Map,output.map} passes @option{-Map output.map} to the linker. When using the GNU linker, you can also get the same effect with @option{-Wl,-Map=output.map}. @@ -27,11 +25,9 @@ index b6731a4673c..f393c7846c6 100644 @opindex u @item -u @var{symbol} Pretend the symbol @var{symbol} is undefined, to force linking of -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 33b56e721d2..f82fae23c22 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -1144,6 +1144,7 @@ proper position among the other output files. */ +@@ -1161,6 +1161,7 @@ proper position among the other output files. */ "%{flto|flto=*:%= 2, 0) @@ -20,7 +18,7 @@ index a75038930ae..b98726f33ed 100644 Warn about possible security problems with format functions. Wformat-signedness -@@ -725,7 +725,7 @@ C ObjC C++ ObjC++ Var(warn_format_zero_length) Warning LangEnabledBy(C ObjC C++ +@@ -799,7 +799,7 @@ C ObjC C++ ObjC++ Var(warn_format_zero_length) Warning LangEnabledBy(C ObjC C++ Warn about zero-length formats. Wformat= @@ -28,7 +26,4 @@ index a75038930ae..b98726f33ed 100644 +C ObjC C++ ObjC++ Joined RejectNegative UInteger Var(warn_format) Init(1) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall, 1, 0) IntegerRange(0, 2) Warn about printf/scanf/strftime/strfmon format string anomalies. - Wformat-overflow= --- -2.41.0 - + Wframe-address diff --git a/cross/gcc-armhf/0007-Enable-Wtrampolines-by-default.patch b/cross/gcc-armhf/0007-Enable-Wtrampolines-by-default.patch index eb7aae838..140685d7b 100644 --- a/cross/gcc-armhf/0007-Enable-Wtrampolines-by-default.patch +++ b/cross/gcc-armhf/0007-Enable-Wtrampolines-by-default.patch @@ -7,11 +7,9 @@ Subject: [PATCH 07/35] Enable -Wtrampolines by default. gcc/common.opt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/gcc/common.opt b/gcc/common.opt -index 64c4277c991..c24839d32bc 100644 --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -803,7 +803,7 @@ Common Var(warn_system_headers) Warning +@@ -811,7 +811,7 @@ Common Var(warn_system_headers) Warning Do not suppress warnings from system headers. Wtrampolines @@ -20,6 +18,3 @@ index 64c4277c991..c24839d32bc 100644 Warn whenever a trampoline is generated. Wtrivial-auto-var-init --- -2.41.0 - diff --git a/cross/gcc-armhf/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch b/cross/gcc-armhf/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch index 69c1bf725..e85284ff0 100644 --- a/cross/gcc-armhf/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch +++ b/cross/gcc-armhf/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch @@ -9,11 +9,9 @@ Subject: [PATCH 08/35] Disable ssp on -nostdlib, -nodefaultlibs and gcc/params.opt | 2 +- 2 files changed, 8 insertions(+), 2 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index da6417dd0d1..b5a6f200635 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -983,6 +983,12 @@ proper position among the other output files. */ +@@ -1000,6 +1000,12 @@ proper position among the other output files. */ #define LINK_GCC_C_SEQUENCE_SPEC "%G %{!nolibc:%L %G}" #endif @@ -26,20 +24,18 @@ index da6417dd0d1..b5a6f200635 100644 #ifndef LINK_SSP_SPEC #ifdef TARGET_LIBC_PROVIDES_SSP #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ -@@ -1282,7 +1288,7 @@ static const char *cc1_options = +@@ -1305,7 +1311,7 @@ static const char *cc1_options = %{-version:--version}\ %{-help=*:--help=%*}\ %{!fsyntax-only:%{S:%W{o*}%{!o*:-o %w%b.s}}}\ - %{fsyntax-only:-o %j} %{-param*}\ + %{fsyntax-only:-o %j} %{-param*} " NO_SSP_SPEC "\ %{coverage:-fprofile-arcs -ftest-coverage}\ - %{fprofile-arcs|fprofile-generate*|coverage:\ + %{fprofile-arcs|fcondition-coverage|fprofile-generate*|coverage:\ %{!fprofile-update=single:\ -diff --git a/gcc/params.opt b/gcc/params.opt -index 823cdb2ff85..5b096899b40 100644 --- a/gcc/params.opt +++ b/gcc/params.opt -@@ -1006,7 +1006,7 @@ Common Joined UInteger Var(param_ssa_name_def_chain_limit) Init(512) Param Optim +@@ -1013,7 +1013,7 @@ Common Joined UInteger Var(param_ssa_name_def_chain_limit) Init(512) Param Optim The maximum number of SSA_NAME assignments to follow in determining a value. -param=ssp-buffer-size= @@ -48,6 +44,3 @@ index 823cdb2ff85..5b096899b40 100644 The lower bound for a buffer to be considered for stack smashing protection. -param=stack-clash-protection-guard-size= --- -2.41.0 - diff --git a/cross/gcc-armhf/0012-libgcc_s.patch b/cross/gcc-armhf/0012-libgcc_s.patch index d8bbc602f..8189f8491 100644 --- a/cross/gcc-armhf/0012-libgcc_s.patch +++ b/cross/gcc-armhf/0012-libgcc_s.patch @@ -9,11 +9,9 @@ Subject: [PATCH 12/35] libgcc_s libgcc/config/i386/t-linux | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) -diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc -index 0d817fc3f3b..2e99db00db9 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc -@@ -12691,10 +12691,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, +@@ -13089,10 +13089,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, { case IX86_BUILTIN_CPU_INIT: { @@ -26,8 +24,6 @@ index 0d817fc3f3b..2e99db00db9 100644 call_expr = build_call_expr (fndecl, 0); return expand_expr (call_expr, target, mode, EXPAND_NORMAL); } -diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c -index 50b6d8248a2..724ced402a1 100644 --- a/libgcc/config/i386/cpuinfo.c +++ b/libgcc/config/i386/cpuinfo.c @@ -63,7 +63,7 @@ __cpu_indicator_init (void) @@ -41,8 +37,6 @@ index 50b6d8248a2..724ced402a1 100644 +int __cpu_indicator_init_local (void) + __attribute__ ((weak, alias ("__cpu_indicator_init"))); #endif -diff --git a/libgcc/config/i386/t-linux b/libgcc/config/i386/t-linux -index 8506a635790..564296f788e 100644 --- a/libgcc/config/i386/t-linux +++ b/libgcc/config/i386/t-linux @@ -3,5 +3,5 @@ @@ -52,6 +46,3 @@ index 8506a635790..564296f788e 100644 -HOST_LIBGCC2_CFLAGS += -mlong-double-80 -DUSE_ELF_SYMVER $(CET_FLAGS) +HOST_LIBGCC2_CFLAGS += -mlong-double-80 $(CET_FLAGS) CRTSTUFF_T_CFLAGS += $(CET_FLAGS) --- -2.41.0 - diff --git a/cross/gcc-armhf/0013-nopie.patch b/cross/gcc-armhf/0013-nopie.patch index 6578ee110..4a9ea0770 100644 --- a/cross/gcc-armhf/0013-nopie.patch +++ b/cross/gcc-armhf/0013-nopie.patch @@ -4,15 +4,13 @@ Date: Sat, 7 Nov 2015 02:08:05 +0000 Subject: [PATCH 13/35] nopie --- - gcc/configure | 27 +++++++++++++++++++++++++++ - gcc/configure.ac | 13 +++++++++++++ - 2 files changed, 40 insertions(+) + gcc/configure | 25 +++++++++++++++++++++++++ + gcc/configure.ac | 11 +++++++++++ + 2 files changed, 36 insertions(+) -diff --git a/gcc/configure b/gcc/configure -index 23da7d55d..f38732bb2 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -34534,6 +34534,29 @@ rm -f core conftest.err conftest.$ac_objext \ +@@ -34606,6 +34606,29 @@ rm -f core conftest.err conftest.$ac_objext \ fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_no_pie" >&5 $as_echo "$gcc_cv_no_pie" >&6; } @@ -42,7 +40,7 @@ index 23da7d55d..f38732bb2 100755 if test x$enable_host_shared = xyes; then PICFLAG=-fPIC -@@ -34551,6 +34574,8 @@ if test x$enable_host_pie = xyes; then +@@ -34623,6 +34646,8 @@ if test x$enable_host_pie = xyes; then LD_PICFLAG=-pie elif test x$gcc_cv_no_pie = xyes; then LD_PICFLAG=-no-pie @@ -51,11 +49,9 @@ index 23da7d55d..f38732bb2 100755 else LD_PICFLAG= fi -diff --git a/gcc/configure.ac b/gcc/configure.ac -index d7cf0b92c..db2e2c802 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -7781,6 +7781,15 @@ AC_CACHE_CHECK([for -no-pie option], +@@ -7821,6 +7821,15 @@ AC_CACHE_CHECK([for -no-pie option], [gcc_cv_no_pie=yes], [gcc_cv_no_pie=no]) LDFLAGS="$saved_LDFLAGS"]) @@ -71,7 +67,7 @@ index d7cf0b92c..db2e2c802 100644 if test x$enable_host_shared = xyes; then PICFLAG=-fPIC -@@ -7798,6 +7807,8 @@ if test x$enable_host_pie = xyes; then +@@ -7838,6 +7847,8 @@ if test x$enable_host_pie = xyes; then LD_PICFLAG=-pie elif test x$gcc_cv_no_pie = xyes; then LD_PICFLAG=-no-pie @@ -80,6 +76,3 @@ index d7cf0b92c..db2e2c802 100644 else LD_PICFLAG= fi --- -2.41.0 - diff --git a/cross/gcc-armhf/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch b/cross/gcc-armhf/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch index 937cad8a7..ddea4a05b 100644 --- a/cross/gcc-armhf/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch +++ b/cross/gcc-armhf/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch @@ -7,11 +7,9 @@ Subject: [PATCH 15/35] build: fix CXXFLAGS_FOR_BUILD passing Makefile.in | 1 + 1 file changed, 1 insertion(+) -diff --git a/Makefile.in b/Makefile.in -index 06a9398e172..6ff2b3f9925 100644 --- a/Makefile.in +++ b/Makefile.in -@@ -178,6 +178,7 @@ BUILD_EXPORTS = \ +@@ -179,6 +179,7 @@ BUILD_EXPORTS = \ # built for the build system to override those in BASE_FLAGS_TO_PASS. EXTRA_BUILD_FLAGS = \ CFLAGS="$(CFLAGS_FOR_BUILD)" \ @@ -19,6 +17,3 @@ index 06a9398e172..6ff2b3f9925 100644 LDFLAGS="$(LDFLAGS_FOR_BUILD)" # This is the list of directories to built for the host system. --- -2.41.0 - diff --git a/cross/gcc-armhf/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch b/cross/gcc-armhf/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch index 96972482c..4796a055d 100644 --- a/cross/gcc-armhf/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch +++ b/cross/gcc-armhf/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch @@ -12,11 +12,9 @@ Subject: [PATCH 17/35] Alpine musl package provides libssp_nonshared.a. We gcc/gcc.cc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index b5a6f200635..6cbb726599b 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -991,8 +991,7 @@ proper position among the other output files. */ +@@ -1008,8 +1008,7 @@ proper position among the other output files. */ #ifndef LINK_SSP_SPEC #ifdef TARGET_LIBC_PROVIDES_SSP @@ -26,6 +24,3 @@ index b5a6f200635..6cbb726599b 100644 #else #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ "|fstack-protector-strong|fstack-protector-explicit" \ --- -2.41.0 - diff --git a/cross/gcc-armhf/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch b/cross/gcc-armhf/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch index a9612913e..b829e5b34 100644 --- a/cross/gcc-armhf/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch +++ b/cross/gcc-armhf/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch @@ -8,11 +8,9 @@ Subject: [PATCH 18/35] DP: Use --push-state/--pop-state for gold as well when gcc/gcc.cc | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 6cbb726599b..59390fd39d6 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -755,10 +755,10 @@ proper position among the other output files. */ +@@ -772,10 +772,10 @@ proper position among the other output files. */ #define LIBASAN_SPEC STATIC_LIBASAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBASAN_SPEC "%{static-libasan:" LD_STATIC_OPTION "}" \ @@ -25,7 +23,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBASAN_LIBS #else #define LIBASAN_SPEC "-lasan" STATIC_LIBASAN_LIBS -@@ -794,10 +794,10 @@ proper position among the other output files. */ +@@ -811,10 +811,10 @@ proper position among the other output files. */ #define LIBTSAN_SPEC STATIC_LIBTSAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBTSAN_SPEC "%{static-libtsan:" LD_STATIC_OPTION "}" \ @@ -38,7 +36,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBTSAN_LIBS #else #define LIBTSAN_SPEC "-ltsan" STATIC_LIBTSAN_LIBS -@@ -815,10 +815,10 @@ proper position among the other output files. */ +@@ -832,10 +832,10 @@ proper position among the other output files. */ #define LIBLSAN_SPEC STATIC_LIBLSAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBLSAN_SPEC "%{static-liblsan:" LD_STATIC_OPTION "}" \ @@ -51,7 +49,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBLSAN_LIBS #else #define LIBLSAN_SPEC "-llsan" STATIC_LIBLSAN_LIBS -@@ -834,10 +834,10 @@ proper position among the other output files. */ +@@ -851,10 +851,10 @@ proper position among the other output files. */ " %{static-libubsan|static:%:include(libsanitizer.spec)%(link_libubsan)}" #ifdef HAVE_LD_STATIC_DYNAMIC #define LIBUBSAN_SPEC "%{static-libubsan:" LD_STATIC_OPTION "}" \ @@ -64,6 +62,3 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBUBSAN_LIBS #else #define LIBUBSAN_SPEC "-lubsan" STATIC_LIBUBSAN_LIBS --- -2.41.0 - diff --git a/cross/gcc-armhf/0023-riscv-disable-multilib-support.patch b/cross/gcc-armhf/0023-riscv-disable-multilib-support.patch index 49916376f..eb9ba90fc 100644 --- a/cross/gcc-armhf/0023-riscv-disable-multilib-support.patch +++ b/cross/gcc-armhf/0023-riscv-disable-multilib-support.patch @@ -42,11 +42,9 @@ library. gcc/config/riscv/t-linux | 7 +++++-- 2 files changed, 5 insertions(+), 10 deletions(-) -diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h -index f8c2c351e5a..8d9881eadeb 100644 --- a/gcc/config/riscv/linux.h +++ b/gcc/config/riscv/linux.h -@@ -60,11 +60,3 @@ along with GCC; see the file COPYING3. If not see +@@ -61,11 +61,3 @@ along with GCC; see the file COPYING3. If not see %{rdynamic:-export-dynamic} \ -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \ %{static:-static} %{static-pie:-static -pie --no-dynamic-linker -z text}}" @@ -58,11 +56,9 @@ index f8c2c351e5a..8d9881eadeb 100644 - "/usr/lib/ " - -#define RISCV_USE_CUSTOMISED_MULTI_LIB select_by_abi -diff --git a/gcc/config/riscv/t-linux b/gcc/config/riscv/t-linux -index 216d2776a18..1a8a863853e 100644 --- a/gcc/config/riscv/t-linux +++ b/gcc/config/riscv/t-linux -@@ -1,3 +1,6 @@ +@@ -1,5 +1,8 @@ -# Only XLEN and ABI affect Linux multilib dir names, e.g. /lib32/ilp32d/ -MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib64,$(MULTILIB_DIRNAMES))) +MULTILIB_OPTIONS := march=rv64gc @@ -71,6 +67,5 @@ index 216d2776a18..1a8a863853e 100644 +MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib,$(MULTILIB_DIRNAMES))) MULTILIB_OSDIRNAMES := $(patsubst lib%,../lib%,$(MULTILIB_DIRNAMES)) +MULTILIB_MATCHES := march?rv64gc=march?rv64imafdc --- -2.41.0 - + + MULTIARCH_DIRNAME := $(call if_multiarch,$(firstword $(subst -, ,$(target)))-linux-gnu) diff --git a/cross/gcc-armhf/0024-always-build-libgcc_eh.a.patch b/cross/gcc-armhf/0024-always-build-libgcc_eh.a.patch index 6b0514e98..5d508ea08 100644 --- a/cross/gcc-armhf/0024-always-build-libgcc_eh.a.patch +++ b/cross/gcc-armhf/0024-always-build-libgcc_eh.a.patch @@ -9,11 +9,9 @@ highly inspired by: libgcc/Makefile.in | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) -diff --git a/libgcc/Makefile.in b/libgcc/Makefile.in -index 6c4dc79ab71..023cede18a7 100644 --- a/libgcc/Makefile.in +++ b/libgcc/Makefile.in -@@ -960,8 +960,9 @@ ifneq ($(LIBUNWIND),) +@@ -967,8 +967,9 @@ ifneq ($(LIBUNWIND),) all: libunwind.a endif @@ -24,7 +22,7 @@ index 6c4dc79ab71..023cede18a7 100644 ifneq ($(LIBUNWIND),) all: libunwind$(SHLIB_EXT) libgcc_s$(SHLIB_EXT): libunwind$(SHLIB_EXT) -@@ -1163,10 +1164,6 @@ install-libunwind: +@@ -1173,10 +1174,6 @@ install-libunwind: install-shared: $(mkinstalldirs) $(DESTDIR)$(inst_libdir) @@ -35,7 +33,7 @@ index 6c4dc79ab71..023cede18a7 100644 $(subst @multilib_dir@,$(MULTIDIR),$(subst \ @shlib_base_name@,libgcc_s,$(subst \ @shlib_slibdir_qual@,$(MULTIOSSUBDIR),$(SHLIB_INSTALL)))) -@@ -1183,6 +1180,10 @@ ifeq ($(enable_gcov),yes) +@@ -1193,6 +1190,10 @@ ifeq ($(enable_gcov),yes) $(RANLIB) $(DESTDIR)$(inst_libdir)/libgcov.a endif @@ -46,6 +44,3 @@ index 6c4dc79ab71..023cede18a7 100644 parts="$(INSTALL_PARTS)"; \ for file in $$parts; do \ rm -f $(DESTDIR)$(inst_libdir)/$$file; \ --- -2.41.0 - diff --git a/cross/gcc-armhf/0026-ada-musl-support-fixes.patch b/cross/gcc-armhf/0026-ada-musl-support-fixes.patch index 91a8268ab..0be683fa6 100644 --- a/cross/gcc-armhf/0026-ada-musl-support-fixes.patch +++ b/cross/gcc-armhf/0026-ada-musl-support-fixes.patch @@ -10,8 +10,6 @@ Subject: [PATCH 26/35] ada: musl support fixes gcc/ada/terminals.c | 8 ++++---- 4 files changed, 35 insertions(+), 33 deletions(-) -diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl -index 32cbdb692..463028fbe 100644 --- a/gcc/ada/Makefile.rtl +++ b/gcc/ada/Makefile.rtl @@ -1558,7 +1558,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),) @@ -23,7 +21,7 @@ index 32cbdb692..463028fbe 100644 a-exetim.adb&5 $as_echo_n "checking for library containing swapcontext... " >&6; } -diff --git a/libphobos/m4/druntime/libraries.m4 b/libphobos/m4/druntime/libraries.m4 -index 45a56f6f76a..fef6e890b1e 100644 --- a/libphobos/m4/druntime/libraries.m4 +++ b/libphobos/m4/druntime/libraries.m4 @@ -220,14 +220,6 @@ AC_DEFUN([DRUNTIME_LIBRARIES_UCONTEXT], @@ -49,6 +45,3 @@ index 45a56f6f76a..fef6e890b1e 100644 if test "$druntime_fiber_asm_external" = no; then AC_SEARCH_LIBS([swapcontext], [c ucontext], [], AC_MSG_ERROR([swapcontext required but not found])) --- -2.41.0 - diff --git a/cross/gcc-armhf/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch b/cross/gcc-armhf/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch index e1679a8e5..b53e5847d 100644 --- a/cross/gcc-armhf/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch +++ b/cross/gcc-armhf/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch @@ -7,11 +7,9 @@ Subject: [PATCH 32/35] libgnat: time_t is always 64-bit on musl libc gcc/ada/libgnat/s-parame.ads | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/gcc/ada/libgnat/s-parame.ads b/gcc/ada/libgnat/s-parame.ads -index 3d6e345a1ba..cfe0b4d3ca6 100644 --- a/gcc/ada/libgnat/s-parame.ads +++ b/gcc/ada/libgnat/s-parame.ads -@@ -102,7 +102,7 @@ package System.Parameters is +@@ -100,7 +100,7 @@ package System.Parameters is -- Characteristics of time_t type -- ------------------------------------ @@ -20,6 +18,3 @@ index 3d6e345a1ba..cfe0b4d3ca6 100644 -- Number of bits in type time_t ---------------------------------------------- --- -2.41.0 - diff --git a/cross/gcc-armhf/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch b/cross/gcc-armhf/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch deleted file mode 100644 index bc3c4a6ac..000000000 --- a/cross/gcc-armhf/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 4d0a333ef13e2da140cd44c4941b20f48a80dc0f Mon Sep 17 00:00:00 2001 -From: Hannes Braun -Date: Thu, 20 Feb 2025 15:09:41 +0100 -Subject: [PATCH] arm: Fix signedness of vld1q intrinsic parms [PR118942] - -vld1q_s8_x3, vld1q_s16_x3, vld1q_s8_x4 and vld1q_s16_x4 were expecting -pointers to unsigned integers. These parameters should be pointers to -signed integers. - -gcc/ChangeLog: - PR target/118942 - * config/arm/arm_neon.h (vld1q_s8_x3): Use int8_t instead of - uint16_t. - (vld1q_s16_x3): Use int16_t instead of uint16_t. - (vld1q_s8_x4): Likewise. - (vld1q_s16_x4): Likewise. - -gcc/testsuite/ChangeLog: - PR target/118942 - * gcc.target/arm/simd/vld1q_base_xN_1.c: Add -Wpointer-sign. - -Signed-off-by: Hannes Braun ---- - gcc/config/arm/arm_neon.h | 8 ++++---- - gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c | 2 +- - 2 files changed, 5 insertions(+), 5 deletions(-) - -diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h -index 5b1c55c8d9f..578ada88fa6 100644 ---- a/gcc/config/arm/arm_neon.h -+++ b/gcc/config/arm/arm_neon.h -@@ -10854,7 +10854,7 @@ vld1q_s64_x2 (const int64_t * __a) - - __extension__ extern __inline int8x16x3_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s8_x3 (const uint8_t * __a) -+vld1q_s8_x3 (const int8_t * __a) - { - union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a); -@@ -10863,7 +10863,7 @@ vld1q_s8_x3 (const uint8_t * __a) - - __extension__ extern __inline int16x8x3_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s16_x3 (const uint16_t * __a) -+vld1q_s16_x3 (const int16_t * __a) - { - union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a); -@@ -10890,7 +10890,7 @@ vld1q_s64_x3 (const int64_t * __a) - - __extension__ extern __inline int8x16x4_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s8_x4 (const uint8_t * __a) -+vld1q_s8_x4 (const int8_t * __a) - { - union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x4v16qi ((const __builtin_neon_qi *) __a); -@@ -10899,7 +10899,7 @@ vld1q_s8_x4 (const uint8_t * __a) - - __extension__ extern __inline int16x8x4_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s16_x4 (const uint16_t * __a) -+vld1q_s16_x4 (const int16_t * __a) - { - union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x4v8hi ((const __builtin_neon_hi *) __a); -diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -index 01b29b60084..c73afe2b723 100644 ---- a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -+++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -@@ -1,6 +1,6 @@ - /* { dg-do assemble } */ - /* { dg-require-effective-target arm_neon_ok } */ --/* { dg-options "-save-temps -O2" } */ -+/* { dg-options "-save-temps -O2 -Wpointer-sign" } */ - /* { dg-add-options arm_neon } */ - - #include "arm_neon.h" --- -2.48.1 - diff --git a/cross/gcc-armhf/APKBUILD b/cross/gcc-armhf/APKBUILD index cbbe3adb5..8677c5866 100644 --- a/cross/gcc-armhf/APKBUILD +++ b/cross/gcc-armhf/APKBUILD @@ -24,7 +24,7 @@ CBUILDROOT="/" _cross_configure="--disable-bootstrap --with-sysroot=/usr/$CTARGET" pkgname=gcc-armhf -pkgver=14.2.0 +pkgver=14.3.0 # i.e. 13.2.1, must match gcc/BASE-VER _pkgbase="${pkgver%%_git*}" # date component from snapshots @@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}" [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target="" pkgname=gcc-armhf -pkgrel=6 +pkgrel=1 pkgdesc="Stage2 cross-compiler for armhf" url="https://gcc.gnu.org" arch="x86_64" @@ -278,10 +278,6 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz 0034-libgo-fix-lfs64-use.patch 0035-loongarch-disable-multilib-support.patch 0036-libphobos-add-riscv64-and-loongarch64-support.patch - 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch - fix-arm64.patch - ppc64le-quadmath.patch - riscv64-improve-build-time.patch " # secfixes: @@ -291,8 +287,8 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz # we build out-of-tree #builddir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap builddir="$srcdir"/gcc-$_pkgbase -_gcclibdir="/usr/lib/gcc/$CTARGET/$_pkgbase" -_gcclibexec="/usr/libexec/gcc/$CTARGET/$_pkgbase" +_gcclibdir="usr/lib/gcc/$CTARGET/$_pkgbase" +_gcclibexec="usr/libexec/gcc/$CTARGET/$_pkgbase" prepare() { default_prepare @@ -319,7 +315,7 @@ build() { i586-*-*-*) _arch_configure="--with-arch=pentium-m --with-fpmath=sse --with-tune=generic --enable-cld";; s390x-*-*-*) _arch_configure="--with-arch=z196 --with-tune=zEC12 --with-zarch --with-long-double-128 --enable-decimal-float";; riscv64-*-*-*) _arch_configure="--with-arch=rv64gc --with-abi=lp64d --enable-autolink-libatomic";; - loongarch64-*-*-*) _arch_configure="--with-arch=la64v1.0 --with-abi=lp64d";; + loongarch64-*-*-*) _arch_configure="--with-arch=la64v1.0 --with-abi=lp64d";; esac case "$CTARGET_ARCH" in @@ -431,6 +427,11 @@ package() { [ "$CHOST" = "$CTARGET" ] && ln -s gcc "$pkgdir"/usr/bin/cc ln -s ${CTARGET}-gcc "$pkgdir"/usr/bin/${CTARGET}-cc + # symlink to vendor-less target triple for + # supporting clang --target's fallback match + # ref: https://gitlab.alpinelinux.org/alpine/aports/-/issues/16828 + ln -s "$CTARGET" "$pkgdir/usr/lib/gcc/${CTARGET%%-*}-${CTARGET#*-*-}" + if $LANG_JIT; then make -C "$_builddir"/libgccjit-build/gcc DESTDIR="$pkgdir" jit.install-common fi @@ -487,8 +488,6 @@ package() { # libcc1 does not depend on target, don't ship it rm -rf "$pkgdir"/usr/lib/libcc1.so* - # These are moved into packages with arch=$CTARGET_ARCH so remove - # cross prefix (doesn't exist when BOOTSTRAP=nolibc) # fixup gcc library symlinks to be linker scripts so # linker finds the libs from relocated sysroot @@ -663,7 +662,6 @@ libgo() { go() { pkgdesc="GCC Go frontend (intended for bootstrapping community/go)" depends="gcc=$_gccrel libgo=$_gccrel !go" - install="$pkgname-go.post-install" amove usr/lib/go amove usr/bin/*go @@ -747,45 +745,41 @@ gdb() { } sha512sums=" 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-00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f fix-arm64.patch -815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9 ppc64le-quadmath.patch -ea55e0fa6813fc95c4ca2e87f059182edc54dc61515ebb92bf6eb31dbbd176d0fe81edcc7ea28d32f84ca37e8d48a544623d3d9bc94aa41ffc0859326a616aa2 riscv64-improve-build-time.patch " diff --git a/cross/gcc-armhf/fix-arm64.patch b/cross/gcc-armhf/fix-arm64.patch deleted file mode 100644 index 8aaa9f742..000000000 --- a/cross/gcc-armhf/fix-arm64.patch +++ /dev/null @@ -1,544 +0,0 @@ -From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Thu, 13 Jun 2024 12:48:21 +0100 -Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464] - -The testcase extracts one arm_neon.h vector from a pair (one subreg) -and then reinterprets the result as an SVE vector (another subreg). -Each subreg makes sense individually, but we can't fold them together -into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes, -but the interpretation of 32 bytes -> 16*N bytes depends on -whether N==1 or N>1. - -Since the second subreg makes sense individually, simplify_subreg -should bail out rather than ICE on it. simplify_gen_subreg will -then do the same (because it already checks validate_subreg). -This leaves simplify_gen_subreg returning null, requiring the -caller to take appropriate action. - -I think this is relatively likely to occur elsewhere, so the patch -adds a helper for forcing a subreg, allowing a temporary pseudo to -be created where necessary. - -I'll follow up by using force_subreg in more places. This patch -is intended to be a minimal backportable fix for the PR. - -gcc/ - PR target/115464 - * simplify-rtx.cc (simplify_context::simplify_subreg): Don't try - to fold two subregs together if their relationship isn't known - at compile time. - * explow.h (force_subreg): Declare. - * explow.cc (force_subreg): New function. - * config/aarch64/aarch64-sve-builtins-base.cc - (svset_neonq_impl::expand): Use it instead of simplify_gen_subreg. - -gcc/testsuite/ - PR target/115464 - * gcc.target/aarch64/sve/acle/general/pr115464.c: New test. - -(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0) ---- - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- - gcc/explow.cc | 15 +++++++++++++++ - gcc/explow.h | 2 ++ - gcc/simplify-rtx.cc | 5 +++++ - .../aarch64/sve/acle/general/pr115464.c | 13 +++++++++++++ - 5 files changed, 36 insertions(+), 1 deletion(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c - -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index 0d2edf3f19e..c9182594bc1 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1174,7 +1174,7 @@ public: - Advanced SIMD argument as an SVE vector. */ - if (!BYTES_BIG_ENDIAN - && is_undef (CALL_EXPR_ARG (e.call_expr, 0))) -- return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0); -+ return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0); - - rtx_vector_builder builder (VNx16BImode, 16, 2); - for (unsigned int i = 0; i < 16; i++) -diff --git a/gcc/explow.cc b/gcc/explow.cc -index 8e5f6b8e680..f6843398c4b 100644 ---- a/gcc/explow.cc -+++ b/gcc/explow.cc -@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x) - return temp; - } - -+/* Like simplify_gen_subreg, but force OP into a new register if the -+ subreg cannot be formed directly. */ -+ -+rtx -+force_subreg (machine_mode outermode, rtx op, -+ machine_mode innermode, poly_uint64 byte) -+{ -+ rtx x = simplify_gen_subreg (outermode, op, innermode, byte); -+ if (x) -+ return x; -+ -+ op = copy_to_mode_reg (innermode, op); -+ return simplify_gen_subreg (outermode, op, innermode, byte); -+} -+ - /* If X is a memory ref, copy its contents to a new temp reg and return - that reg. Otherwise, return X. */ - -diff --git a/gcc/explow.h b/gcc/explow.h -index 16aa02cfb68..cbd1fcb7eb3 100644 ---- a/gcc/explow.h -+++ b/gcc/explow.h -@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode); - Args are mode (in case value is a constant) and the value. */ - extern rtx force_reg (machine_mode, rtx); - -+extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64); -+ - /* Return given rtx, copied into a new temp reg if it was in memory. */ - extern rtx force_not_mem (rtx); - -diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc -index dceaa13333c..729d408aa55 100644 ---- a/gcc/simplify-rtx.cc -+++ b/gcc/simplify-rtx.cc -@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op, - poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode); - rtx newx; - -+ /* Make sure that the relationship between the two subregs is -+ known at compile time. */ -+ if (!ordered_p (outersize, innermostsize)) -+ return NULL_RTX; -+ - if (outermode == innermostmode - && known_eq (byte, 0U) - && known_eq (SUBREG_BYTE (op), 0)) -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c -new file mode 100644 -index 00000000000..d728d1325ed ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c -@@ -0,0 +1,13 @@ -+/* { dg-options "-O2" } */ -+ -+#include -+#include -+#include -+ -+svuint16_t -+convolve4_4_x (uint16x8x2_t permute_tbl) -+{ -+ return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]); -+} -+ -+/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */ --- -2.46.0 - - -From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:30 +0100 -Subject: [PATCH 2/4] aarch64: Use force_subreg in more places - -This patch makes the aarch64 code use force_subreg instead of -simplify_gen_subreg in more places. The criteria were: - -(1) The code is obviously specific to expand (where new pseudos - can be created). - -(2) The value is obviously an rvalue rather than an lvalue. - -(3) The offset wasn't a simple lowpart or highpart calculation; - a later patch will deal with those. - -gcc/ - * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin): - Use force_subreg instead of simplify_gen_subreg. - * config/aarch64/aarch64-simd.md (ctz2): Likewise. - * config/aarch64/aarch64-sve-builtins-base.cc - (svget_impl::expand): Likewise. - (svget_neonq_impl::expand): Likewise. - * config/aarch64/aarch64-sve-builtins-functions.h - (multireg_permute::expand): Likewise. - -(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4) ---- - gcc/config/aarch64/aarch64-builtins.cc | 4 ++-- - gcc/config/aarch64/aarch64-simd.md | 4 ++-- - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 8 +++----- - gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++--- - 4 files changed, 10 insertions(+), 12 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc -index 75d21de1401..b2e46a073a8 100644 ---- a/gcc/config/aarch64/aarch64-builtins.cc -+++ b/gcc/config/aarch64/aarch64-builtins.cc -@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - rtx temp2 = gen_reg_rtx (DImode); - temp1 = simplify_gen_subreg (d->mode, op2, quadmode, - subreg_lowpart_offset (d->mode, quadmode)); -- temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0); -+ temp1 = force_subreg (V2DImode, temp1, d->mode, 0); - if (BYTES_BIG_ENDIAN) - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx)); - else - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx)); -- op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0); -+ op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0); - - /* And recalculate the index. */ - lane -= nunits / 4; -diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md -index 33ab0741e87..5b9efe0b165 100644 ---- a/gcc/config/aarch64/aarch64-simd.md -+++ b/gcc/config/aarch64/aarch64-simd.md -@@ -412,8 +412,8 @@ - "TARGET_SIMD" - { - emit_insn (gen_bswap2 (operands[0], operands[1])); -- rtx op0_castsi2qi = simplify_gen_subreg(mode, operands[0], -- mode, 0); -+ rtx op0_castsi2qi = force_subreg (mode, operands[0], -+ mode, 0); - emit_insn (gen_aarch64_rbit (op0_castsi2qi, op0_castsi2qi)); - emit_insn (gen_clz2 (operands[0], operands[0])); - DONE; -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index c9182594bc1..2c95da79572 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1121,9 +1121,8 @@ public: - expand (function_expander &e) const override - { - /* Fold the access into a subreg rvalue. */ -- return simplify_gen_subreg (e.vector_mode (0), e.args[0], -- GET_MODE (e.args[0]), -- INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR); -+ return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]), -+ INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR); - } - }; - -@@ -1157,8 +1156,7 @@ public: - e.add_fixed_operand (indices); - return e.generate_insn (icode); - } -- return simplify_gen_subreg (e.result_mode (), e.args[0], -- GET_MODE (e.args[0]), 0); -+ return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0); - } - }; - -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h -index 3b8e575e98e..7d06a57ff83 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h -+++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h -@@ -639,9 +639,9 @@ public: - { - machine_mode elt_mode = e.vector_mode (0); - rtx arg = e.args[0]; -- e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0); -- e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), -- GET_MODE_SIZE (elt_mode))); -+ e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0); -+ e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg), -+ GET_MODE_SIZE (elt_mode))); - } - return e.use_exact_insn (icode); - } --- -2.46.0 - - -From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:31 +0100 -Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg - -This patch makes more use of force_lowpart_subreg, similarly -to the recent patch for force_subreg. The criteria were: - -(1) The code is obviously specific to expand (where new pseudos - can be created). - -(2) The value is obviously an rvalue rather than an lvalue. - -gcc/ - PR target/115464 - * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin) - (aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of - simplify_gen_subreg and lowpart_subreg. - * config/aarch64/aarch64-sve-builtins-base.cc - (svset_neonq_impl::expand): Likewise. - * config/aarch64/aarch64-sve-builtins-sme.cc - (add_load_store_slice_operand): Likewise. - * config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise. - (aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise. - -gcc/testsuite/ - PR target/115464 - * gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test. - -(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def) ---- - gcc/config/aarch64/aarch64-builtins.cc | 11 +++++------ - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- - gcc/config/aarch64/aarch64-sve-builtins-sme.cc | 2 +- - gcc/config/aarch64/aarch64.cc | 14 +++++--------- - .../aarch64/sve/acle/general/pr115464_2.c | 11 +++++++++++ - 5 files changed, 23 insertions(+), 17 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c - -diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc -index b2e46a073a8..264b9560709 100644 ---- a/gcc/config/aarch64/aarch64-builtins.cc -+++ b/gcc/config/aarch64/aarch64-builtins.cc -@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - int lane = INTVAL (lane_idx); - - if (lane < nunits / 4) -- op2 = simplify_gen_subreg (d->mode, op2, quadmode, -- subreg_lowpart_offset (d->mode, quadmode)); -+ op2 = force_lowpart_subreg (d->mode, op2, quadmode); - else - { - /* Select the upper 64 bits, either a V2SF or V4HF, this however -@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - gen_highpart_mode generates code that isn't optimal. */ - rtx temp1 = gen_reg_rtx (d->mode); - rtx temp2 = gen_reg_rtx (DImode); -- temp1 = simplify_gen_subreg (d->mode, op2, quadmode, -- subreg_lowpart_offset (d->mode, quadmode)); -+ temp1 = force_lowpart_subreg (d->mode, op2, quadmode); - temp1 = force_subreg (V2DImode, temp1, d->mode, 0); - if (BYTES_BIG_ENDIAN) - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx)); -@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode) - case AARCH64_WSR64: - case AARCH64_WSRF64: - case AARCH64_WSR128: -- subreg = lowpart_subreg (sysreg_mode, input_val, mode); -+ subreg = force_lowpart_subreg (sysreg_mode, input_val, mode); - break; - case AARCH64_WSRF: - subreg = gen_lowpart_SUBREG (SImode, input_val); -@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode) - case AARCH64_RSR64: - case AARCH64_RSRF64: - case AARCH64_RSR128: -- return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode); -+ return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), -+ target, sysreg_mode); - case AARCH64_RSRF: - subreg = gen_lowpart_SUBREG (SImode, target); - return gen_lowpart_SUBREG (SFmode, subreg); -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index 2c95da79572..3c970e9c5f8 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1183,7 +1183,7 @@ public: - if (BYTES_BIG_ENDIAN) - return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode)); - insn_code icode = code_for_vcond_mask (mode, mode); -- e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1])); -+ e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1])); - e.add_output_operand (icode); - e.add_input_operand (icode, e.args[1]); - e.add_input_operand (icode, e.args[0]); -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -index f4c91bcbb95..b66b35ae60b 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode, - rtx base = e.args[argno]; - if (e.mode_suffix_id == MODE_vnum) - { -- rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode); -+ rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode); - base = simplify_gen_binary (PLUS, SImode, base, vnum); - } - e.add_input_operand (icode, base); -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 1beec94629d..a064aeecbc0 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x) - /* can_change_mode_class must only return true if subregs and svreinterprets - have the same semantics. */ - if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS)) -- return lowpart_subreg (mode, x, GET_MODE (x)); -+ return force_lowpart_subreg (mode, x, GET_MODE (x)); - - rtx res = gen_reg_rtx (mode); - x = force_reg (GET_MODE (x), x); -@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest, - rtx *high_in2) - { - *low_dest = gen_reg_rtx (DImode); -- *low_in1 = gen_lowpart (DImode, op1); -- *low_in2 = simplify_gen_subreg (DImode, op2, TImode, -- subreg_lowpart_offset (DImode, TImode)); -+ *low_in1 = force_lowpart_subreg (DImode, op1, TImode); -+ *low_in2 = force_lowpart_subreg (DImode, op2, TImode); - *high_dest = gen_reg_rtx (DImode); - *high_in1 = gen_highpart (DImode, op1); - *high_in2 = simplify_gen_subreg (DImode, op2, TImode, -@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest, - rtx *high_in2) - { - *low_dest = gen_reg_rtx (DImode); -- *low_in1 = simplify_gen_subreg (DImode, op1, TImode, -- subreg_lowpart_offset (DImode, TImode)); -- -- *low_in2 = simplify_gen_subreg (DImode, op2, TImode, -- subreg_lowpart_offset (DImode, TImode)); -+ *low_in1 = force_lowpart_subreg (DImode, op1, TImode); -+ *low_in2 = force_lowpart_subreg (DImode, op2, TImode); - *high_dest = gen_reg_rtx (DImode); - - *high_in1 = simplify_gen_subreg (DImode, op1, TImode, -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c -new file mode 100644 -index 00000000000..f561c34f732 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c -@@ -0,0 +1,11 @@ -+/* { dg-options "-O2" } */ -+ -+#include -+#include -+#include -+ -+svuint16_t -+convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a) -+{ -+ return svset_neonq_u16 (a, permute_tbl.val[1]); -+} --- -2.46.0 - - -From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:31 +0100 -Subject: [PATCH 4/4] Add force_lowpart_subreg - -optabs had a local function called lowpart_subreg_maybe_copy -that is very similar to the lowpart version of force_subreg. -This patch adds a force_lowpart_subreg wrapper around -force_subreg and uses it in optabs.cc. - -The only difference between the old and new functions is that -the old one asserted success while the new one doesn't. -It's common not to assert elsewhere when taking subregs; -normally a null result is enough. - -Later patches will make more use of the new function. - -gcc/ - * explow.h (force_lowpart_subreg): Declare. - * explow.cc (force_lowpart_subreg): New function. - * optabs.cc (lowpart_subreg_maybe_copy): Delete. - (expand_absneg_bit): Use force_lowpart_subreg instead of - lowpart_subreg_maybe_copy. - (expand_copysign_bit): Likewise. - -(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c) ---- - gcc/explow.cc | 14 ++++++++++++++ - gcc/explow.h | 1 + - gcc/optabs.cc | 24 ++---------------------- - 3 files changed, 17 insertions(+), 22 deletions(-) - -diff --git a/gcc/explow.cc b/gcc/explow.cc -index f6843398c4b..5fdfa81f69b 100644 ---- a/gcc/explow.cc -+++ b/gcc/explow.cc -@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op, - return simplify_gen_subreg (outermode, op, innermode, byte); - } - -+/* Try to return an rvalue expression for the OUTERMODE lowpart of OP, -+ which has mode INNERMODE. Allow OP to be forced into a new register -+ if necessary. -+ -+ Return null on failure. */ -+ -+rtx -+force_lowpart_subreg (machine_mode outermode, rtx op, -+ machine_mode innermode) -+{ -+ auto byte = subreg_lowpart_offset (outermode, innermode); -+ return force_subreg (outermode, op, innermode, byte); -+} -+ - /* If X is a memory ref, copy its contents to a new temp reg and return - that reg. Otherwise, return X. */ - -diff --git a/gcc/explow.h b/gcc/explow.h -index cbd1fcb7eb3..dd654649b06 100644 ---- a/gcc/explow.h -+++ b/gcc/explow.h -@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode); - extern rtx force_reg (machine_mode, rtx); - - extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64); -+extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode); - - /* Return given rtx, copied into a new temp reg if it was in memory. */ - extern rtx force_not_mem (rtx); -diff --git a/gcc/optabs.cc b/gcc/optabs.cc -index ce91f94ed43..804c0dc73ba 100644 ---- a/gcc/optabs.cc -+++ b/gcc/optabs.cc -@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target) - return 0; - } - --/* Extract the OMODE lowpart from VAL, which has IMODE. Under certain -- conditions, VAL may already be a SUBREG against which we cannot generate -- a further SUBREG. In this case, we expect forcing the value into a -- register will work around the situation. */ -- --static rtx --lowpart_subreg_maybe_copy (machine_mode omode, rtx val, -- machine_mode imode) --{ -- rtx ret; -- ret = lowpart_subreg (omode, val, imode); -- if (ret == NULL) -- { -- val = force_reg (imode, val); -- ret = lowpart_subreg (omode, val, imode); -- gcc_assert (ret != NULL); -- } -- return ret; --} -- - /* Expand a floating point absolute value or negation operation via a - logical operation on the sign bit. */ - -@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode, - gen_lowpart (imode, op0), - immed_wide_int_const (mask, imode), - gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN); -- target = lowpart_subreg_maybe_copy (mode, temp, imode); -+ target = force_lowpart_subreg (mode, temp, imode); - - set_dst_reg_note (get_last_insn (), REG_EQUAL, - gen_rtx_fmt_e (code, mode, copy_rtx (op0)), -@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target, - - temp = expand_binop (imode, ior_optab, op0, op1, - gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN); -- target = lowpart_subreg_maybe_copy (mode, temp, imode); -+ target = force_lowpart_subreg (mode, temp, imode); - } - - return target; --- -2.46.0 - diff --git a/cross/gcc-armhf/gcc-go.post-install b/cross/gcc-armhf/gcc-go.post-install deleted file mode 100644 index 6805fa7cf..000000000 --- a/cross/gcc-armhf/gcc-go.post-install +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/sh - -cat 1>&2 < -Date: Sat, 3 Aug 2024 20:37:54 +0200 -Subject: [PATCH] libquadmath: Fix up libquadmath/math/sqrtq.c compilation in - some powerpc* configurations [PR116007] - -My PR114623 change started using soft-fp.h and quad.h for the sqrtq implementation. -Unfortunately, that seems to fail building in some powerpc* configurations, where -TFmode isn't available. -quad.h has: - #ifndef TFtype - typedef float TFtype __attribute__ ((mode (TF))); - #endif -and uses TFtype. quad.h has: - /* Define the complex type corresponding to __float128 - ("_Complex __float128" is not allowed) */ - #if (!defined(_ARCH_PPC)) || defined(__LONG_DOUBLE_IEEE128__) - typedef _Complex float __attribute__((mode(TC))) __complex128; - #else - typedef _Complex float __attribute__((mode(KC))) __complex128; - #endif -with the conditional and KCmode use added during porting of libquadmath -to powerpc*, so I've just defined TFtype for powerpc when __LONG_DOUBLE_IEEE128__ -isn't defined; I could define it to float __attribute__ ((mode (KF))) but it -seemed easier to just define it to __float128 which should do the same thing. - -2024-08-03 Jakub Jelinek - - PR target/116007 - * math/sqrtq.c (TFtype): For PowerPC without __LONG_DOUBLE_IEEE128__ - define to __float128 before including soft-fp.h and quad.h. - -(cherry picked from commit 3ac02e67503ccffa3dfeeffc0a60fce6bdaca43b) ---- - libquadmath/math/sqrtq.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/libquadmath/math/sqrtq.c b/libquadmath/math/sqrtq.c -index 8ca2828d42ce..a58998a06670 100644 ---- a/libquadmath/math/sqrtq.c -+++ b/libquadmath/math/sqrtq.c -@@ -9,6 +9,9 @@ - && defined(FE_TOWARDZERO) \ - && defined(FE_INEXACT) - #define USE_SOFT_FP 1 -+#if defined(_ARCH_PPC) && !defined(__LONG_DOUBLE_IEEE128__) -+#define TFtype __float128 -+#endif - #include "../../libgcc/soft-fp/soft-fp.h" - #include "../../libgcc/soft-fp/quad.h" - #endif --- -2.43.5 - diff --git a/cross/gcc-armhf/riscv64-improve-build-time.patch b/cross/gcc-armhf/riscv64-improve-build-time.patch deleted file mode 100644 index 2c8c52a2c..000000000 --- a/cross/gcc-armhf/riscv64-improve-build-time.patch +++ /dev/null @@ -1,149 +0,0 @@ -Patch-Source: https://gcc.gnu.org/git/?p=gcc.git;a=patch;h=2cf89ae83225f932b226cd57ef2d083a59bcf8a3 --- -From 2cf89ae83225f932b226cd57ef2d083a59bcf8a3 Mon Sep 17 00:00:00 2001 -From: Richard Biener -Date: Tue, 6 Aug 2024 14:56:26 +0200 -Subject: [PATCH] tree-optimization/116166 - forward jump-threading going wild - -Currently the forward threader isn't limited as to the search space -it explores and with it now using path-ranger for simplifying -conditions it runs into it became pretty slow for degenerate cases -like compiling insn-emit.cc for RISC-V esp. when compiling for -a host with LOGICAL_OP_NON_SHORT_CIRCUIT disabled. - -The following makes the forward threader honor the search space -limit I introduced for the backward threader. This reduces -compile-time from minutes to seconds for the testcase in PR116166. - -Note this wasn't necessary before we had ranger but with ranger -the work we do is quadatic in the length of the threading path -we build up (the same is true for the backwards threader). - - PR tree-optimization/116166 - * tree-ssa-threadedge.h (jump_threader::thread_around_empty_blocks): - Add limit parameter. - (jump_threader::thread_through_normal_block): Likewise. - * tree-ssa-threadedge.cc (jump_threader::thread_around_empty_blocks): - Honor and decrement limit parameter. - (jump_threader::thread_through_normal_block): Likewise. - (jump_threader::thread_across_edge): Initialize limit from - param_max_jump_thread_paths and pass it down to workers. ---- - gcc/tree-ssa-threadedge.cc | 30 ++++++++++++++++++++++-------- - gcc/tree-ssa-threadedge.h | 4 ++-- - 2 files changed, 24 insertions(+), 10 deletions(-) - -diff --git a/gcc/tree-ssa-threadedge.cc b/gcc/tree-ssa-threadedge.cc -index 7f82639b8ecc..0aa2aa851430 100644 ---- a/gcc/tree-ssa-threadedge.cc -+++ b/gcc/tree-ssa-threadedge.cc -@@ -786,13 +786,17 @@ propagate_threaded_block_debug_into (basic_block dest, basic_block src) - bool - jump_threader::thread_around_empty_blocks (vec *path, - edge taken_edge, -- bitmap visited) -+ bitmap visited, unsigned &limit) - { - basic_block bb = taken_edge->dest; - gimple_stmt_iterator gsi; - gimple *stmt; - tree cond; - -+ if (limit == 0) -+ return false; -+ --limit; -+ - /* The key property of these blocks is that they need not be duplicated - when threading. Thus they cannot have visible side effects such - as PHI nodes. */ -@@ -830,7 +834,8 @@ jump_threader::thread_around_empty_blocks (vec *path, - m_registry->push_edge (path, taken_edge, EDGE_NO_COPY_SRC_BLOCK); - m_state->append_path (taken_edge->dest); - bitmap_set_bit (visited, taken_edge->dest->index); -- return thread_around_empty_blocks (path, taken_edge, visited); -+ return thread_around_empty_blocks (path, taken_edge, visited, -+ limit); - } - } - -@@ -872,7 +877,7 @@ jump_threader::thread_around_empty_blocks (vec *path, - m_registry->push_edge (path, taken_edge, EDGE_NO_COPY_SRC_BLOCK); - m_state->append_path (taken_edge->dest); - -- thread_around_empty_blocks (path, taken_edge, visited); -+ thread_around_empty_blocks (path, taken_edge, visited, limit); - return true; - } - -@@ -899,8 +904,13 @@ jump_threader::thread_around_empty_blocks (vec *path, - - int - jump_threader::thread_through_normal_block (vec *path, -- edge e, bitmap visited) -+ edge e, bitmap visited, -+ unsigned &limit) - { -+ if (limit == 0) -+ return 0; -+ limit--; -+ - m_state->register_equivs_edge (e); - - /* PHIs create temporary equivalences. -@@ -989,7 +999,7 @@ jump_threader::thread_through_normal_block (vec *path, - visited. This may be overly conservative. */ - bitmap_set_bit (visited, dest->index); - bitmap_set_bit (visited, e->dest->index); -- thread_around_empty_blocks (path, taken_edge, visited); -+ thread_around_empty_blocks (path, taken_edge, visited, limit); - return 1; - } - } -@@ -1075,9 +1085,12 @@ jump_threader::thread_across_edge (edge e) - bitmap_set_bit (visited, e->src->index); - bitmap_set_bit (visited, e->dest->index); - -+ /* Limit search space. */ -+ unsigned limit = param_max_jump_thread_paths; -+ - int threaded = 0; - if ((e->flags & EDGE_DFS_BACK) == 0) -- threaded = thread_through_normal_block (path, e, visited); -+ threaded = thread_through_normal_block (path, e, visited, limit); - - if (threaded > 0) - { -@@ -1148,11 +1161,12 @@ jump_threader::thread_across_edge (edge e) - m_registry->push_edge (path, e, EDGE_START_JUMP_THREAD); - m_registry->push_edge (path, taken_edge, EDGE_COPY_SRC_JOINER_BLOCK); - -- found = thread_around_empty_blocks (path, taken_edge, visited); -+ found = thread_around_empty_blocks (path, taken_edge, visited, limit); - - if (!found) - found = thread_through_normal_block (path, -- path->last ()->e, visited) > 0; -+ path->last ()->e, visited, -+ limit) > 0; - - /* If we were able to thread through a successor of E->dest, then - record the jump threading opportunity. */ -diff --git a/gcc/tree-ssa-threadedge.h b/gcc/tree-ssa-threadedge.h -index 9f6cbfe93307..245b3506a550 100644 ---- a/gcc/tree-ssa-threadedge.h -+++ b/gcc/tree-ssa-threadedge.h -@@ -101,9 +101,9 @@ private: - unsigned limit); - - bool thread_around_empty_blocks (vec *path, -- edge, bitmap visited); -+ edge, bitmap visited, unsigned &limit); - int thread_through_normal_block (vec *path, -- edge, bitmap visited); -+ edge, bitmap visited, unsigned &limit); - void thread_across_edge (edge); - bool record_temporary_equivalences_from_phis (edge); - gimple *record_temporary_equivalences_from_stmts_at_dest (edge); --- -2.43.5 - diff --git a/cross/gcc-armv7/0002-gcc-poison-system-directories.patch b/cross/gcc-armv7/0002-gcc-poison-system-directories.patch index 84c80c95b..9a1671267 100644 --- a/cross/gcc-armv7/0002-gcc-poison-system-directories.patch +++ b/cross/gcc-armv7/0002-gcc-poison-system-directories.patch @@ -25,11 +25,9 @@ Upstream-Status: Pending gcc/incpath.cc | 21 +++++++++++++++++++++ 7 files changed, 68 insertions(+) -diff --git a/gcc/common.opt b/gcc/common.opt -index 862c474d3c8..64c4277c991 100644 --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -711,6 +711,10 @@ Wreturn-local-addr +@@ -715,6 +715,10 @@ Wreturn-local-addr Common Var(warn_return_local_addr) Init(1) Warning Warn about returning a pointer/reference to a local or temporary variable. @@ -40,11 +38,9 @@ index 862c474d3c8..64c4277c991 100644 Wshadow Common Var(warn_shadow) Warning Warn when one variable shadows another. Same as -Wshadow=global. -diff --git a/gcc/config.in b/gcc/config.in -index 4cad077bfbe..0679fbbf4c6 100644 --- a/gcc/config.in +++ b/gcc/config.in -@@ -236,6 +236,12 @@ +@@ -249,6 +249,12 @@ #endif @@ -57,19 +53,17 @@ index 4cad077bfbe..0679fbbf4c6 100644 /* Define if you want all operations on RTL (the basic data structure of the optimizer and back end) to be checked for dynamic type safety at runtime. This is quite expensive. */ -diff --git a/gcc/configure b/gcc/configure -index c7b26d1927d..8c46369f73f 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -1026,6 +1026,7 @@ enable_maintainer_mode +@@ -1050,6 +1050,7 @@ enable_maintainer_mode enable_link_mutex enable_link_serialization enable_version_specific_runtime_libs +enable_poison_system_directories enable_plugin enable_host_shared - enable_libquadmath_support -@@ -1788,6 +1789,8 @@ Optional Features: + enable_host_pie +@@ -1823,6 +1824,8 @@ Optional Features: --enable-version-specific-runtime-libs specify that runtime libraries should be installed in a compiler-specific directory @@ -77,8 +71,8 @@ index c7b26d1927d..8c46369f73f 100755 + warn for use of native system header directories --enable-plugin enable plugin support --enable-host-shared build host code as shared libraries - --disable-libquadmath-support -@@ -31753,6 +31756,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : + --enable-host-pie build host code as PIE +@@ -34082,6 +34085,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : fi @@ -98,11 +92,9 @@ index c7b26d1927d..8c46369f73f 100755 # Substitute configuration variables -diff --git a/gcc/configure.ac b/gcc/configure.ac -index 09082e8ccae..5504bf6eb01 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -7292,6 +7292,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs, +@@ -7555,6 +7555,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs, [specify that runtime libraries should be installed in a compiler-specific directory])]) @@ -119,11 +111,9 @@ index 09082e8ccae..5504bf6eb01 100644 # Substitute configuration variables AC_SUBST(subdirs) AC_SUBST(srcdir) -diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index af0e5933fdb..b6731a4673c 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -384,6 +384,7 @@ Objective-C and Objective-C++ Dialects}. +@@ -391,6 +391,7 @@ Objective-C and Objective-C++ Dialects}. -Wpacked -Wno-packed-bitfield-compat -Wpacked-not-aligned -Wpadded -Wparentheses -Wno-pedantic-ms-format -Wpointer-arith -Wno-pointer-compare -Wno-pointer-to-int-cast @@ -131,7 +121,7 @@ index af0e5933fdb..b6731a4673c 100644 -Wno-pragmas -Wno-prio-ctor-dtor -Wredundant-decls -Wrestrict -Wno-return-local-addr -Wreturn-type -Wno-scalar-storage-order -Wsequence-point -@@ -8426,6 +8427,14 @@ made up of data only and thus requires no special treatment. But, for +@@ -8861,6 +8862,14 @@ made up of data only and thus requires no special treatment. But, for most targets, it is made up of code and thus requires the stack to be made executable in order for the program to work properly. @@ -146,12 +136,10 @@ index af0e5933fdb..b6731a4673c 100644 @opindex Wfloat-equal @opindex Wno-float-equal @item -Wfloat-equal -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 16bb07f2cdc..33b56e721d2 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -1177,6 +1187,8 @@ proper position among the other output files. */ - "-z now " \ +@@ -1163,6 +1163,8 @@ proper position among the other output files. */ + "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \ "%X %{o*} %{e*} %{N} %{n} %{r}\ %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \ + %{Wno-poison-system-directories:--no-poison-system-directories} \ @@ -159,8 +147,6 @@ index 16bb07f2cdc..33b56e721d2 100644 %{static|no-pie|static-pie:} %@{L*} %(link_libgcc) " \ VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \ %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\ -diff --git a/gcc/incpath.cc b/gcc/incpath.cc -index 4d44321183f..0f3f071b44c 100644 --- a/gcc/incpath.cc +++ b/gcc/incpath.cc @@ -26,6 +26,7 @@ @@ -198,6 +184,3 @@ index 4d44321183f..0f3f071b44c 100644 } /* Use given -I paths for #include "..." but not #include <...>, and --- -2.41.0 - diff --git a/cross/gcc-armv7/0003-specs-turn-on-Wl-z-now-by-default.patch b/cross/gcc-armv7/0003-specs-turn-on-Wl-z-now-by-default.patch index bfb0a6eba..33e8b56f1 100644 --- a/cross/gcc-armv7/0003-specs-turn-on-Wl-z-now-by-default.patch +++ b/cross/gcc-armv7/0003-specs-turn-on-Wl-z-now-by-default.patch @@ -13,11 +13,9 @@ now by default. gcc/gcc.cc | 1 + 2 files changed, 4 insertions(+) -diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index b6731a4673c..f393c7846c6 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -17961,6 +17961,9 @@ For example, @option{-Wl,-Map,output.map} passes @option{-Map output.map} to the +@@ -18935,6 +18935,9 @@ For example, @option{-Wl,-Map,output.map} passes @option{-Map output.map} to the linker. When using the GNU linker, you can also get the same effect with @option{-Wl,-Map=output.map}. @@ -27,11 +25,9 @@ index b6731a4673c..f393c7846c6 100644 @opindex u @item -u @var{symbol} Pretend the symbol @var{symbol} is undefined, to force linking of -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 33b56e721d2..f82fae23c22 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -1144,6 +1144,7 @@ proper position among the other output files. */ +@@ -1161,6 +1161,7 @@ proper position among the other output files. */ "%{flto|flto=*:%= 2, 0) @@ -20,7 +18,7 @@ index a75038930ae..b98726f33ed 100644 Warn about possible security problems with format functions. Wformat-signedness -@@ -725,7 +725,7 @@ C ObjC C++ ObjC++ Var(warn_format_zero_length) Warning LangEnabledBy(C ObjC C++ +@@ -799,7 +799,7 @@ C ObjC C++ ObjC++ Var(warn_format_zero_length) Warning LangEnabledBy(C ObjC C++ Warn about zero-length formats. Wformat= @@ -28,7 +26,4 @@ index a75038930ae..b98726f33ed 100644 +C ObjC C++ ObjC++ Joined RejectNegative UInteger Var(warn_format) Init(1) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall, 1, 0) IntegerRange(0, 2) Warn about printf/scanf/strftime/strfmon format string anomalies. - Wformat-overflow= --- -2.41.0 - + Wframe-address diff --git a/cross/gcc-armv7/0007-Enable-Wtrampolines-by-default.patch b/cross/gcc-armv7/0007-Enable-Wtrampolines-by-default.patch index eb7aae838..140685d7b 100644 --- a/cross/gcc-armv7/0007-Enable-Wtrampolines-by-default.patch +++ b/cross/gcc-armv7/0007-Enable-Wtrampolines-by-default.patch @@ -7,11 +7,9 @@ Subject: [PATCH 07/35] Enable -Wtrampolines by default. gcc/common.opt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/gcc/common.opt b/gcc/common.opt -index 64c4277c991..c24839d32bc 100644 --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -803,7 +803,7 @@ Common Var(warn_system_headers) Warning +@@ -811,7 +811,7 @@ Common Var(warn_system_headers) Warning Do not suppress warnings from system headers. Wtrampolines @@ -20,6 +18,3 @@ index 64c4277c991..c24839d32bc 100644 Warn whenever a trampoline is generated. Wtrivial-auto-var-init --- -2.41.0 - diff --git a/cross/gcc-armv7/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch b/cross/gcc-armv7/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch index 69c1bf725..e85284ff0 100644 --- a/cross/gcc-armv7/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch +++ b/cross/gcc-armv7/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch @@ -9,11 +9,9 @@ Subject: [PATCH 08/35] Disable ssp on -nostdlib, -nodefaultlibs and gcc/params.opt | 2 +- 2 files changed, 8 insertions(+), 2 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index da6417dd0d1..b5a6f200635 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -983,6 +983,12 @@ proper position among the other output files. */ +@@ -1000,6 +1000,12 @@ proper position among the other output files. */ #define LINK_GCC_C_SEQUENCE_SPEC "%G %{!nolibc:%L %G}" #endif @@ -26,20 +24,18 @@ index da6417dd0d1..b5a6f200635 100644 #ifndef LINK_SSP_SPEC #ifdef TARGET_LIBC_PROVIDES_SSP #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ -@@ -1282,7 +1288,7 @@ static const char *cc1_options = +@@ -1305,7 +1311,7 @@ static const char *cc1_options = %{-version:--version}\ %{-help=*:--help=%*}\ %{!fsyntax-only:%{S:%W{o*}%{!o*:-o %w%b.s}}}\ - %{fsyntax-only:-o %j} %{-param*}\ + %{fsyntax-only:-o %j} %{-param*} " NO_SSP_SPEC "\ %{coverage:-fprofile-arcs -ftest-coverage}\ - %{fprofile-arcs|fprofile-generate*|coverage:\ + %{fprofile-arcs|fcondition-coverage|fprofile-generate*|coverage:\ %{!fprofile-update=single:\ -diff --git a/gcc/params.opt b/gcc/params.opt -index 823cdb2ff85..5b096899b40 100644 --- a/gcc/params.opt +++ b/gcc/params.opt -@@ -1006,7 +1006,7 @@ Common Joined UInteger Var(param_ssa_name_def_chain_limit) Init(512) Param Optim +@@ -1013,7 +1013,7 @@ Common Joined UInteger Var(param_ssa_name_def_chain_limit) Init(512) Param Optim The maximum number of SSA_NAME assignments to follow in determining a value. -param=ssp-buffer-size= @@ -48,6 +44,3 @@ index 823cdb2ff85..5b096899b40 100644 The lower bound for a buffer to be considered for stack smashing protection. -param=stack-clash-protection-guard-size= --- -2.41.0 - diff --git a/cross/gcc-armv7/0012-libgcc_s.patch b/cross/gcc-armv7/0012-libgcc_s.patch index d8bbc602f..8189f8491 100644 --- a/cross/gcc-armv7/0012-libgcc_s.patch +++ b/cross/gcc-armv7/0012-libgcc_s.patch @@ -9,11 +9,9 @@ Subject: [PATCH 12/35] libgcc_s libgcc/config/i386/t-linux | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) -diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc -index 0d817fc3f3b..2e99db00db9 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc -@@ -12691,10 +12691,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, +@@ -13089,10 +13089,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, { case IX86_BUILTIN_CPU_INIT: { @@ -26,8 +24,6 @@ index 0d817fc3f3b..2e99db00db9 100644 call_expr = build_call_expr (fndecl, 0); return expand_expr (call_expr, target, mode, EXPAND_NORMAL); } -diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c -index 50b6d8248a2..724ced402a1 100644 --- a/libgcc/config/i386/cpuinfo.c +++ b/libgcc/config/i386/cpuinfo.c @@ -63,7 +63,7 @@ __cpu_indicator_init (void) @@ -41,8 +37,6 @@ index 50b6d8248a2..724ced402a1 100644 +int __cpu_indicator_init_local (void) + __attribute__ ((weak, alias ("__cpu_indicator_init"))); #endif -diff --git a/libgcc/config/i386/t-linux b/libgcc/config/i386/t-linux -index 8506a635790..564296f788e 100644 --- a/libgcc/config/i386/t-linux +++ b/libgcc/config/i386/t-linux @@ -3,5 +3,5 @@ @@ -52,6 +46,3 @@ index 8506a635790..564296f788e 100644 -HOST_LIBGCC2_CFLAGS += -mlong-double-80 -DUSE_ELF_SYMVER $(CET_FLAGS) +HOST_LIBGCC2_CFLAGS += -mlong-double-80 $(CET_FLAGS) CRTSTUFF_T_CFLAGS += $(CET_FLAGS) --- -2.41.0 - diff --git a/cross/gcc-armv7/0013-nopie.patch b/cross/gcc-armv7/0013-nopie.patch index 6578ee110..4a9ea0770 100644 --- a/cross/gcc-armv7/0013-nopie.patch +++ b/cross/gcc-armv7/0013-nopie.patch @@ -4,15 +4,13 @@ Date: Sat, 7 Nov 2015 02:08:05 +0000 Subject: [PATCH 13/35] nopie --- - gcc/configure | 27 +++++++++++++++++++++++++++ - gcc/configure.ac | 13 +++++++++++++ - 2 files changed, 40 insertions(+) + gcc/configure | 25 +++++++++++++++++++++++++ + gcc/configure.ac | 11 +++++++++++ + 2 files changed, 36 insertions(+) -diff --git a/gcc/configure b/gcc/configure -index 23da7d55d..f38732bb2 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -34534,6 +34534,29 @@ rm -f core conftest.err conftest.$ac_objext \ +@@ -34606,6 +34606,29 @@ rm -f core conftest.err conftest.$ac_objext \ fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_no_pie" >&5 $as_echo "$gcc_cv_no_pie" >&6; } @@ -42,7 +40,7 @@ index 23da7d55d..f38732bb2 100755 if test x$enable_host_shared = xyes; then PICFLAG=-fPIC -@@ -34551,6 +34574,8 @@ if test x$enable_host_pie = xyes; then +@@ -34623,6 +34646,8 @@ if test x$enable_host_pie = xyes; then LD_PICFLAG=-pie elif test x$gcc_cv_no_pie = xyes; then LD_PICFLAG=-no-pie @@ -51,11 +49,9 @@ index 23da7d55d..f38732bb2 100755 else LD_PICFLAG= fi -diff --git a/gcc/configure.ac b/gcc/configure.ac -index d7cf0b92c..db2e2c802 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -7781,6 +7781,15 @@ AC_CACHE_CHECK([for -no-pie option], +@@ -7821,6 +7821,15 @@ AC_CACHE_CHECK([for -no-pie option], [gcc_cv_no_pie=yes], [gcc_cv_no_pie=no]) LDFLAGS="$saved_LDFLAGS"]) @@ -71,7 +67,7 @@ index d7cf0b92c..db2e2c802 100644 if test x$enable_host_shared = xyes; then PICFLAG=-fPIC -@@ -7798,6 +7807,8 @@ if test x$enable_host_pie = xyes; then +@@ -7838,6 +7847,8 @@ if test x$enable_host_pie = xyes; then LD_PICFLAG=-pie elif test x$gcc_cv_no_pie = xyes; then LD_PICFLAG=-no-pie @@ -80,6 +76,3 @@ index d7cf0b92c..db2e2c802 100644 else LD_PICFLAG= fi --- -2.41.0 - diff --git a/cross/gcc-armv7/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch b/cross/gcc-armv7/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch index 937cad8a7..ddea4a05b 100644 --- a/cross/gcc-armv7/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch +++ b/cross/gcc-armv7/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch @@ -7,11 +7,9 @@ Subject: [PATCH 15/35] build: fix CXXFLAGS_FOR_BUILD passing Makefile.in | 1 + 1 file changed, 1 insertion(+) -diff --git a/Makefile.in b/Makefile.in -index 06a9398e172..6ff2b3f9925 100644 --- a/Makefile.in +++ b/Makefile.in -@@ -178,6 +178,7 @@ BUILD_EXPORTS = \ +@@ -179,6 +179,7 @@ BUILD_EXPORTS = \ # built for the build system to override those in BASE_FLAGS_TO_PASS. EXTRA_BUILD_FLAGS = \ CFLAGS="$(CFLAGS_FOR_BUILD)" \ @@ -19,6 +17,3 @@ index 06a9398e172..6ff2b3f9925 100644 LDFLAGS="$(LDFLAGS_FOR_BUILD)" # This is the list of directories to built for the host system. --- -2.41.0 - diff --git a/cross/gcc-armv7/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch b/cross/gcc-armv7/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch index 96972482c..4796a055d 100644 --- a/cross/gcc-armv7/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch +++ b/cross/gcc-armv7/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch @@ -12,11 +12,9 @@ Subject: [PATCH 17/35] Alpine musl package provides libssp_nonshared.a. We gcc/gcc.cc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index b5a6f200635..6cbb726599b 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -991,8 +991,7 @@ proper position among the other output files. */ +@@ -1008,8 +1008,7 @@ proper position among the other output files. */ #ifndef LINK_SSP_SPEC #ifdef TARGET_LIBC_PROVIDES_SSP @@ -26,6 +24,3 @@ index b5a6f200635..6cbb726599b 100644 #else #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ "|fstack-protector-strong|fstack-protector-explicit" \ --- -2.41.0 - diff --git a/cross/gcc-armv7/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch b/cross/gcc-armv7/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch index a9612913e..b829e5b34 100644 --- a/cross/gcc-armv7/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch +++ b/cross/gcc-armv7/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch @@ -8,11 +8,9 @@ Subject: [PATCH 18/35] DP: Use --push-state/--pop-state for gold as well when gcc/gcc.cc | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 6cbb726599b..59390fd39d6 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -755,10 +755,10 @@ proper position among the other output files. */ +@@ -772,10 +772,10 @@ proper position among the other output files. */ #define LIBASAN_SPEC STATIC_LIBASAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBASAN_SPEC "%{static-libasan:" LD_STATIC_OPTION "}" \ @@ -25,7 +23,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBASAN_LIBS #else #define LIBASAN_SPEC "-lasan" STATIC_LIBASAN_LIBS -@@ -794,10 +794,10 @@ proper position among the other output files. */ +@@ -811,10 +811,10 @@ proper position among the other output files. */ #define LIBTSAN_SPEC STATIC_LIBTSAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBTSAN_SPEC "%{static-libtsan:" LD_STATIC_OPTION "}" \ @@ -38,7 +36,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBTSAN_LIBS #else #define LIBTSAN_SPEC "-ltsan" STATIC_LIBTSAN_LIBS -@@ -815,10 +815,10 @@ proper position among the other output files. */ +@@ -832,10 +832,10 @@ proper position among the other output files. */ #define LIBLSAN_SPEC STATIC_LIBLSAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBLSAN_SPEC "%{static-liblsan:" LD_STATIC_OPTION "}" \ @@ -51,7 +49,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBLSAN_LIBS #else #define LIBLSAN_SPEC "-llsan" STATIC_LIBLSAN_LIBS -@@ -834,10 +834,10 @@ proper position among the other output files. */ +@@ -851,10 +851,10 @@ proper position among the other output files. */ " %{static-libubsan|static:%:include(libsanitizer.spec)%(link_libubsan)}" #ifdef HAVE_LD_STATIC_DYNAMIC #define LIBUBSAN_SPEC "%{static-libubsan:" LD_STATIC_OPTION "}" \ @@ -64,6 +62,3 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBUBSAN_LIBS #else #define LIBUBSAN_SPEC "-lubsan" STATIC_LIBUBSAN_LIBS --- -2.41.0 - diff --git a/cross/gcc-armv7/0023-riscv-disable-multilib-support.patch b/cross/gcc-armv7/0023-riscv-disable-multilib-support.patch index 49916376f..eb9ba90fc 100644 --- a/cross/gcc-armv7/0023-riscv-disable-multilib-support.patch +++ b/cross/gcc-armv7/0023-riscv-disable-multilib-support.patch @@ -42,11 +42,9 @@ library. gcc/config/riscv/t-linux | 7 +++++-- 2 files changed, 5 insertions(+), 10 deletions(-) -diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h -index f8c2c351e5a..8d9881eadeb 100644 --- a/gcc/config/riscv/linux.h +++ b/gcc/config/riscv/linux.h -@@ -60,11 +60,3 @@ along with GCC; see the file COPYING3. If not see +@@ -61,11 +61,3 @@ along with GCC; see the file COPYING3. If not see %{rdynamic:-export-dynamic} \ -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \ %{static:-static} %{static-pie:-static -pie --no-dynamic-linker -z text}}" @@ -58,11 +56,9 @@ index f8c2c351e5a..8d9881eadeb 100644 - "/usr/lib/ " - -#define RISCV_USE_CUSTOMISED_MULTI_LIB select_by_abi -diff --git a/gcc/config/riscv/t-linux b/gcc/config/riscv/t-linux -index 216d2776a18..1a8a863853e 100644 --- a/gcc/config/riscv/t-linux +++ b/gcc/config/riscv/t-linux -@@ -1,3 +1,6 @@ +@@ -1,5 +1,8 @@ -# Only XLEN and ABI affect Linux multilib dir names, e.g. /lib32/ilp32d/ -MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib64,$(MULTILIB_DIRNAMES))) +MULTILIB_OPTIONS := march=rv64gc @@ -71,6 +67,5 @@ index 216d2776a18..1a8a863853e 100644 +MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib,$(MULTILIB_DIRNAMES))) MULTILIB_OSDIRNAMES := $(patsubst lib%,../lib%,$(MULTILIB_DIRNAMES)) +MULTILIB_MATCHES := march?rv64gc=march?rv64imafdc --- -2.41.0 - + + MULTIARCH_DIRNAME := $(call if_multiarch,$(firstword $(subst -, ,$(target)))-linux-gnu) diff --git a/cross/gcc-armv7/0024-always-build-libgcc_eh.a.patch b/cross/gcc-armv7/0024-always-build-libgcc_eh.a.patch index 6b0514e98..5d508ea08 100644 --- a/cross/gcc-armv7/0024-always-build-libgcc_eh.a.patch +++ b/cross/gcc-armv7/0024-always-build-libgcc_eh.a.patch @@ -9,11 +9,9 @@ highly inspired by: libgcc/Makefile.in | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) -diff --git a/libgcc/Makefile.in b/libgcc/Makefile.in -index 6c4dc79ab71..023cede18a7 100644 --- a/libgcc/Makefile.in +++ b/libgcc/Makefile.in -@@ -960,8 +960,9 @@ ifneq ($(LIBUNWIND),) +@@ -967,8 +967,9 @@ ifneq ($(LIBUNWIND),) all: libunwind.a endif @@ -24,7 +22,7 @@ index 6c4dc79ab71..023cede18a7 100644 ifneq ($(LIBUNWIND),) all: libunwind$(SHLIB_EXT) libgcc_s$(SHLIB_EXT): libunwind$(SHLIB_EXT) -@@ -1163,10 +1164,6 @@ install-libunwind: +@@ -1173,10 +1174,6 @@ install-libunwind: install-shared: $(mkinstalldirs) $(DESTDIR)$(inst_libdir) @@ -35,7 +33,7 @@ index 6c4dc79ab71..023cede18a7 100644 $(subst @multilib_dir@,$(MULTIDIR),$(subst \ @shlib_base_name@,libgcc_s,$(subst \ @shlib_slibdir_qual@,$(MULTIOSSUBDIR),$(SHLIB_INSTALL)))) -@@ -1183,6 +1180,10 @@ ifeq ($(enable_gcov),yes) +@@ -1193,6 +1190,10 @@ ifeq ($(enable_gcov),yes) $(RANLIB) $(DESTDIR)$(inst_libdir)/libgcov.a endif @@ -46,6 +44,3 @@ index 6c4dc79ab71..023cede18a7 100644 parts="$(INSTALL_PARTS)"; \ for file in $$parts; do \ rm -f $(DESTDIR)$(inst_libdir)/$$file; \ --- -2.41.0 - diff --git a/cross/gcc-armv7/0026-ada-musl-support-fixes.patch b/cross/gcc-armv7/0026-ada-musl-support-fixes.patch index 91a8268ab..0be683fa6 100644 --- a/cross/gcc-armv7/0026-ada-musl-support-fixes.patch +++ b/cross/gcc-armv7/0026-ada-musl-support-fixes.patch @@ -10,8 +10,6 @@ Subject: [PATCH 26/35] ada: musl support fixes gcc/ada/terminals.c | 8 ++++---- 4 files changed, 35 insertions(+), 33 deletions(-) -diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl -index 32cbdb692..463028fbe 100644 --- a/gcc/ada/Makefile.rtl +++ b/gcc/ada/Makefile.rtl @@ -1558,7 +1558,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),) @@ -23,7 +21,7 @@ index 32cbdb692..463028fbe 100644 a-exetim.adb&5 $as_echo_n "checking for library containing swapcontext... " >&6; } -diff --git a/libphobos/m4/druntime/libraries.m4 b/libphobos/m4/druntime/libraries.m4 -index 45a56f6f76a..fef6e890b1e 100644 --- a/libphobos/m4/druntime/libraries.m4 +++ b/libphobos/m4/druntime/libraries.m4 @@ -220,14 +220,6 @@ AC_DEFUN([DRUNTIME_LIBRARIES_UCONTEXT], @@ -49,6 +45,3 @@ index 45a56f6f76a..fef6e890b1e 100644 if test "$druntime_fiber_asm_external" = no; then AC_SEARCH_LIBS([swapcontext], [c ucontext], [], AC_MSG_ERROR([swapcontext required but not found])) --- -2.41.0 - diff --git a/cross/gcc-armv7/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch b/cross/gcc-armv7/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch index e1679a8e5..b53e5847d 100644 --- a/cross/gcc-armv7/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch +++ b/cross/gcc-armv7/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch @@ -7,11 +7,9 @@ Subject: [PATCH 32/35] libgnat: time_t is always 64-bit on musl libc gcc/ada/libgnat/s-parame.ads | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/gcc/ada/libgnat/s-parame.ads b/gcc/ada/libgnat/s-parame.ads -index 3d6e345a1ba..cfe0b4d3ca6 100644 --- a/gcc/ada/libgnat/s-parame.ads +++ b/gcc/ada/libgnat/s-parame.ads -@@ -102,7 +102,7 @@ package System.Parameters is +@@ -100,7 +100,7 @@ package System.Parameters is -- Characteristics of time_t type -- ------------------------------------ @@ -20,6 +18,3 @@ index 3d6e345a1ba..cfe0b4d3ca6 100644 -- Number of bits in type time_t ---------------------------------------------- --- -2.41.0 - diff --git a/cross/gcc-armv7/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch b/cross/gcc-armv7/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch deleted file mode 100644 index bc3c4a6ac..000000000 --- a/cross/gcc-armv7/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 4d0a333ef13e2da140cd44c4941b20f48a80dc0f Mon Sep 17 00:00:00 2001 -From: Hannes Braun -Date: Thu, 20 Feb 2025 15:09:41 +0100 -Subject: [PATCH] arm: Fix signedness of vld1q intrinsic parms [PR118942] - -vld1q_s8_x3, vld1q_s16_x3, vld1q_s8_x4 and vld1q_s16_x4 were expecting -pointers to unsigned integers. These parameters should be pointers to -signed integers. - -gcc/ChangeLog: - PR target/118942 - * config/arm/arm_neon.h (vld1q_s8_x3): Use int8_t instead of - uint16_t. - (vld1q_s16_x3): Use int16_t instead of uint16_t. - (vld1q_s8_x4): Likewise. - (vld1q_s16_x4): Likewise. - -gcc/testsuite/ChangeLog: - PR target/118942 - * gcc.target/arm/simd/vld1q_base_xN_1.c: Add -Wpointer-sign. - -Signed-off-by: Hannes Braun ---- - gcc/config/arm/arm_neon.h | 8 ++++---- - gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c | 2 +- - 2 files changed, 5 insertions(+), 5 deletions(-) - -diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h -index 5b1c55c8d9f..578ada88fa6 100644 ---- a/gcc/config/arm/arm_neon.h -+++ b/gcc/config/arm/arm_neon.h -@@ -10854,7 +10854,7 @@ vld1q_s64_x2 (const int64_t * __a) - - __extension__ extern __inline int8x16x3_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s8_x3 (const uint8_t * __a) -+vld1q_s8_x3 (const int8_t * __a) - { - union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a); -@@ -10863,7 +10863,7 @@ vld1q_s8_x3 (const uint8_t * __a) - - __extension__ extern __inline int16x8x3_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s16_x3 (const uint16_t * __a) -+vld1q_s16_x3 (const int16_t * __a) - { - union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a); -@@ -10890,7 +10890,7 @@ vld1q_s64_x3 (const int64_t * __a) - - __extension__ extern __inline int8x16x4_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s8_x4 (const uint8_t * __a) -+vld1q_s8_x4 (const int8_t * __a) - { - union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x4v16qi ((const __builtin_neon_qi *) __a); -@@ -10899,7 +10899,7 @@ vld1q_s8_x4 (const uint8_t * __a) - - __extension__ extern __inline int16x8x4_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s16_x4 (const uint16_t * __a) -+vld1q_s16_x4 (const int16_t * __a) - { - union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x4v8hi ((const __builtin_neon_hi *) __a); -diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -index 01b29b60084..c73afe2b723 100644 ---- a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -+++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -@@ -1,6 +1,6 @@ - /* { dg-do assemble } */ - /* { dg-require-effective-target arm_neon_ok } */ --/* { dg-options "-save-temps -O2" } */ -+/* { dg-options "-save-temps -O2 -Wpointer-sign" } */ - /* { dg-add-options arm_neon } */ - - #include "arm_neon.h" --- -2.48.1 - diff --git a/cross/gcc-armv7/APKBUILD b/cross/gcc-armv7/APKBUILD index a2bdff95a..0de9ebf66 100644 --- a/cross/gcc-armv7/APKBUILD +++ b/cross/gcc-armv7/APKBUILD @@ -24,7 +24,7 @@ CBUILDROOT="/" _cross_configure="--disable-bootstrap --with-sysroot=/usr/$CTARGET" pkgname=gcc-armv7 -pkgver=14.2.0 +pkgver=14.3.0 # i.e. 13.2.1, must match gcc/BASE-VER _pkgbase="${pkgver%%_git*}" # date component from snapshots @@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}" [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target="" pkgname=gcc-armv7 -pkgrel=6 +pkgrel=1 pkgdesc="Stage2 cross-compiler for armv7" url="https://gcc.gnu.org" arch="x86_64" @@ -278,10 +278,6 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz 0034-libgo-fix-lfs64-use.patch 0035-loongarch-disable-multilib-support.patch 0036-libphobos-add-riscv64-and-loongarch64-support.patch - 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch - fix-arm64.patch - ppc64le-quadmath.patch - riscv64-improve-build-time.patch " # secfixes: @@ -291,8 +287,8 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz # we build out-of-tree #builddir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap builddir="$srcdir"/gcc-$_pkgbase -_gcclibdir="/usr/lib/gcc/$CTARGET/$_pkgbase" -_gcclibexec="/usr/libexec/gcc/$CTARGET/$_pkgbase" +_gcclibdir="usr/lib/gcc/$CTARGET/$_pkgbase" +_gcclibexec="usr/libexec/gcc/$CTARGET/$_pkgbase" prepare() { default_prepare @@ -319,7 +315,7 @@ build() { i586-*-*-*) _arch_configure="--with-arch=pentium-m --with-fpmath=sse --with-tune=generic --enable-cld";; s390x-*-*-*) _arch_configure="--with-arch=z196 --with-tune=zEC12 --with-zarch --with-long-double-128 --enable-decimal-float";; riscv64-*-*-*) _arch_configure="--with-arch=rv64gc --with-abi=lp64d --enable-autolink-libatomic";; - loongarch64-*-*-*) _arch_configure="--with-arch=la64v1.0 --with-abi=lp64d";; + loongarch64-*-*-*) _arch_configure="--with-arch=la64v1.0 --with-abi=lp64d";; esac case "$CTARGET_ARCH" in @@ -431,6 +427,11 @@ package() { [ "$CHOST" = "$CTARGET" ] && ln -s gcc "$pkgdir"/usr/bin/cc ln -s ${CTARGET}-gcc "$pkgdir"/usr/bin/${CTARGET}-cc + # symlink to vendor-less target triple for + # supporting clang --target's fallback match + # ref: https://gitlab.alpinelinux.org/alpine/aports/-/issues/16828 + ln -s "$CTARGET" "$pkgdir/usr/lib/gcc/${CTARGET%%-*}-${CTARGET#*-*-}" + if $LANG_JIT; then make -C "$_builddir"/libgccjit-build/gcc DESTDIR="$pkgdir" jit.install-common fi @@ -487,8 +488,6 @@ package() { # libcc1 does not depend on target, don't ship it rm -rf "$pkgdir"/usr/lib/libcc1.so* - # These are moved into packages with arch=$CTARGET_ARCH so remove - # cross prefix (doesn't exist when BOOTSTRAP=nolibc) # fixup gcc library symlinks to be linker scripts so # linker finds the libs from relocated sysroot @@ -663,7 +662,6 @@ libgo() { go() { pkgdesc="GCC Go frontend (intended for bootstrapping community/go)" depends="gcc=$_gccrel libgo=$_gccrel !go" - install="$pkgname-go.post-install" amove usr/lib/go amove usr/bin/*go @@ -747,45 +745,41 @@ gdb() { } sha512sums=" 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c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75 0033-libphobos-do-not-use-LFS64-symbols.patch c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c 0034-libgo-fix-lfs64-use.patch 65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3 0035-loongarch-disable-multilib-support.patch 06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453 0036-libphobos-add-riscv64-and-loongarch64-support.patch -a30148fb2cfa9a5800df4aed73f6b1b3b5d5817d768835a2574216f5818e6d6070199bacfe964f0d15b70eab7e2310c40b55e354f65360efce90e15d40287639 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch -00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f fix-arm64.patch -815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9 ppc64le-quadmath.patch -ea55e0fa6813fc95c4ca2e87f059182edc54dc61515ebb92bf6eb31dbbd176d0fe81edcc7ea28d32f84ca37e8d48a544623d3d9bc94aa41ffc0859326a616aa2 riscv64-improve-build-time.patch " diff --git a/cross/gcc-armv7/fix-arm64.patch b/cross/gcc-armv7/fix-arm64.patch deleted file mode 100644 index 8aaa9f742..000000000 --- a/cross/gcc-armv7/fix-arm64.patch +++ /dev/null @@ -1,544 +0,0 @@ -From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Thu, 13 Jun 2024 12:48:21 +0100 -Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464] - -The testcase extracts one arm_neon.h vector from a pair (one subreg) -and then reinterprets the result as an SVE vector (another subreg). -Each subreg makes sense individually, but we can't fold them together -into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes, -but the interpretation of 32 bytes -> 16*N bytes depends on -whether N==1 or N>1. - -Since the second subreg makes sense individually, simplify_subreg -should bail out rather than ICE on it. simplify_gen_subreg will -then do the same (because it already checks validate_subreg). -This leaves simplify_gen_subreg returning null, requiring the -caller to take appropriate action. - -I think this is relatively likely to occur elsewhere, so the patch -adds a helper for forcing a subreg, allowing a temporary pseudo to -be created where necessary. - -I'll follow up by using force_subreg in more places. This patch -is intended to be a minimal backportable fix for the PR. - -gcc/ - PR target/115464 - * simplify-rtx.cc (simplify_context::simplify_subreg): Don't try - to fold two subregs together if their relationship isn't known - at compile time. - * explow.h (force_subreg): Declare. - * explow.cc (force_subreg): New function. - * config/aarch64/aarch64-sve-builtins-base.cc - (svset_neonq_impl::expand): Use it instead of simplify_gen_subreg. - -gcc/testsuite/ - PR target/115464 - * gcc.target/aarch64/sve/acle/general/pr115464.c: New test. - -(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0) ---- - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- - gcc/explow.cc | 15 +++++++++++++++ - gcc/explow.h | 2 ++ - gcc/simplify-rtx.cc | 5 +++++ - .../aarch64/sve/acle/general/pr115464.c | 13 +++++++++++++ - 5 files changed, 36 insertions(+), 1 deletion(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c - -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index 0d2edf3f19e..c9182594bc1 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1174,7 +1174,7 @@ public: - Advanced SIMD argument as an SVE vector. */ - if (!BYTES_BIG_ENDIAN - && is_undef (CALL_EXPR_ARG (e.call_expr, 0))) -- return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0); -+ return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0); - - rtx_vector_builder builder (VNx16BImode, 16, 2); - for (unsigned int i = 0; i < 16; i++) -diff --git a/gcc/explow.cc b/gcc/explow.cc -index 8e5f6b8e680..f6843398c4b 100644 ---- a/gcc/explow.cc -+++ b/gcc/explow.cc -@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x) - return temp; - } - -+/* Like simplify_gen_subreg, but force OP into a new register if the -+ subreg cannot be formed directly. */ -+ -+rtx -+force_subreg (machine_mode outermode, rtx op, -+ machine_mode innermode, poly_uint64 byte) -+{ -+ rtx x = simplify_gen_subreg (outermode, op, innermode, byte); -+ if (x) -+ return x; -+ -+ op = copy_to_mode_reg (innermode, op); -+ return simplify_gen_subreg (outermode, op, innermode, byte); -+} -+ - /* If X is a memory ref, copy its contents to a new temp reg and return - that reg. Otherwise, return X. */ - -diff --git a/gcc/explow.h b/gcc/explow.h -index 16aa02cfb68..cbd1fcb7eb3 100644 ---- a/gcc/explow.h -+++ b/gcc/explow.h -@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode); - Args are mode (in case value is a constant) and the value. */ - extern rtx force_reg (machine_mode, rtx); - -+extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64); -+ - /* Return given rtx, copied into a new temp reg if it was in memory. */ - extern rtx force_not_mem (rtx); - -diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc -index dceaa13333c..729d408aa55 100644 ---- a/gcc/simplify-rtx.cc -+++ b/gcc/simplify-rtx.cc -@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op, - poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode); - rtx newx; - -+ /* Make sure that the relationship between the two subregs is -+ known at compile time. */ -+ if (!ordered_p (outersize, innermostsize)) -+ return NULL_RTX; -+ - if (outermode == innermostmode - && known_eq (byte, 0U) - && known_eq (SUBREG_BYTE (op), 0)) -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c -new file mode 100644 -index 00000000000..d728d1325ed ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c -@@ -0,0 +1,13 @@ -+/* { dg-options "-O2" } */ -+ -+#include -+#include -+#include -+ -+svuint16_t -+convolve4_4_x (uint16x8x2_t permute_tbl) -+{ -+ return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]); -+} -+ -+/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */ --- -2.46.0 - - -From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:30 +0100 -Subject: [PATCH 2/4] aarch64: Use force_subreg in more places - -This patch makes the aarch64 code use force_subreg instead of -simplify_gen_subreg in more places. The criteria were: - -(1) The code is obviously specific to expand (where new pseudos - can be created). - -(2) The value is obviously an rvalue rather than an lvalue. - -(3) The offset wasn't a simple lowpart or highpart calculation; - a later patch will deal with those. - -gcc/ - * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin): - Use force_subreg instead of simplify_gen_subreg. - * config/aarch64/aarch64-simd.md (ctz2): Likewise. - * config/aarch64/aarch64-sve-builtins-base.cc - (svget_impl::expand): Likewise. - (svget_neonq_impl::expand): Likewise. - * config/aarch64/aarch64-sve-builtins-functions.h - (multireg_permute::expand): Likewise. - -(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4) ---- - gcc/config/aarch64/aarch64-builtins.cc | 4 ++-- - gcc/config/aarch64/aarch64-simd.md | 4 ++-- - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 8 +++----- - gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++--- - 4 files changed, 10 insertions(+), 12 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc -index 75d21de1401..b2e46a073a8 100644 ---- a/gcc/config/aarch64/aarch64-builtins.cc -+++ b/gcc/config/aarch64/aarch64-builtins.cc -@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - rtx temp2 = gen_reg_rtx (DImode); - temp1 = simplify_gen_subreg (d->mode, op2, quadmode, - subreg_lowpart_offset (d->mode, quadmode)); -- temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0); -+ temp1 = force_subreg (V2DImode, temp1, d->mode, 0); - if (BYTES_BIG_ENDIAN) - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx)); - else - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx)); -- op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0); -+ op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0); - - /* And recalculate the index. */ - lane -= nunits / 4; -diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md -index 33ab0741e87..5b9efe0b165 100644 ---- a/gcc/config/aarch64/aarch64-simd.md -+++ b/gcc/config/aarch64/aarch64-simd.md -@@ -412,8 +412,8 @@ - "TARGET_SIMD" - { - emit_insn (gen_bswap2 (operands[0], operands[1])); -- rtx op0_castsi2qi = simplify_gen_subreg(mode, operands[0], -- mode, 0); -+ rtx op0_castsi2qi = force_subreg (mode, operands[0], -+ mode, 0); - emit_insn (gen_aarch64_rbit (op0_castsi2qi, op0_castsi2qi)); - emit_insn (gen_clz2 (operands[0], operands[0])); - DONE; -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index c9182594bc1..2c95da79572 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1121,9 +1121,8 @@ public: - expand (function_expander &e) const override - { - /* Fold the access into a subreg rvalue. */ -- return simplify_gen_subreg (e.vector_mode (0), e.args[0], -- GET_MODE (e.args[0]), -- INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR); -+ return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]), -+ INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR); - } - }; - -@@ -1157,8 +1156,7 @@ public: - e.add_fixed_operand (indices); - return e.generate_insn (icode); - } -- return simplify_gen_subreg (e.result_mode (), e.args[0], -- GET_MODE (e.args[0]), 0); -+ return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0); - } - }; - -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h -index 3b8e575e98e..7d06a57ff83 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h -+++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h -@@ -639,9 +639,9 @@ public: - { - machine_mode elt_mode = e.vector_mode (0); - rtx arg = e.args[0]; -- e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0); -- e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), -- GET_MODE_SIZE (elt_mode))); -+ e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0); -+ e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg), -+ GET_MODE_SIZE (elt_mode))); - } - return e.use_exact_insn (icode); - } --- -2.46.0 - - -From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:31 +0100 -Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg - -This patch makes more use of force_lowpart_subreg, similarly -to the recent patch for force_subreg. The criteria were: - -(1) The code is obviously specific to expand (where new pseudos - can be created). - -(2) The value is obviously an rvalue rather than an lvalue. - -gcc/ - PR target/115464 - * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin) - (aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of - simplify_gen_subreg and lowpart_subreg. - * config/aarch64/aarch64-sve-builtins-base.cc - (svset_neonq_impl::expand): Likewise. - * config/aarch64/aarch64-sve-builtins-sme.cc - (add_load_store_slice_operand): Likewise. - * config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise. - (aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise. - -gcc/testsuite/ - PR target/115464 - * gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test. - -(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def) ---- - gcc/config/aarch64/aarch64-builtins.cc | 11 +++++------ - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- - gcc/config/aarch64/aarch64-sve-builtins-sme.cc | 2 +- - gcc/config/aarch64/aarch64.cc | 14 +++++--------- - .../aarch64/sve/acle/general/pr115464_2.c | 11 +++++++++++ - 5 files changed, 23 insertions(+), 17 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c - -diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc -index b2e46a073a8..264b9560709 100644 ---- a/gcc/config/aarch64/aarch64-builtins.cc -+++ b/gcc/config/aarch64/aarch64-builtins.cc -@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - int lane = INTVAL (lane_idx); - - if (lane < nunits / 4) -- op2 = simplify_gen_subreg (d->mode, op2, quadmode, -- subreg_lowpart_offset (d->mode, quadmode)); -+ op2 = force_lowpart_subreg (d->mode, op2, quadmode); - else - { - /* Select the upper 64 bits, either a V2SF or V4HF, this however -@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - gen_highpart_mode generates code that isn't optimal. */ - rtx temp1 = gen_reg_rtx (d->mode); - rtx temp2 = gen_reg_rtx (DImode); -- temp1 = simplify_gen_subreg (d->mode, op2, quadmode, -- subreg_lowpart_offset (d->mode, quadmode)); -+ temp1 = force_lowpart_subreg (d->mode, op2, quadmode); - temp1 = force_subreg (V2DImode, temp1, d->mode, 0); - if (BYTES_BIG_ENDIAN) - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx)); -@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode) - case AARCH64_WSR64: - case AARCH64_WSRF64: - case AARCH64_WSR128: -- subreg = lowpart_subreg (sysreg_mode, input_val, mode); -+ subreg = force_lowpart_subreg (sysreg_mode, input_val, mode); - break; - case AARCH64_WSRF: - subreg = gen_lowpart_SUBREG (SImode, input_val); -@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode) - case AARCH64_RSR64: - case AARCH64_RSRF64: - case AARCH64_RSR128: -- return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode); -+ return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), -+ target, sysreg_mode); - case AARCH64_RSRF: - subreg = gen_lowpart_SUBREG (SImode, target); - return gen_lowpart_SUBREG (SFmode, subreg); -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index 2c95da79572..3c970e9c5f8 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1183,7 +1183,7 @@ public: - if (BYTES_BIG_ENDIAN) - return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode)); - insn_code icode = code_for_vcond_mask (mode, mode); -- e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1])); -+ e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1])); - e.add_output_operand (icode); - e.add_input_operand (icode, e.args[1]); - e.add_input_operand (icode, e.args[0]); -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -index f4c91bcbb95..b66b35ae60b 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode, - rtx base = e.args[argno]; - if (e.mode_suffix_id == MODE_vnum) - { -- rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode); -+ rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode); - base = simplify_gen_binary (PLUS, SImode, base, vnum); - } - e.add_input_operand (icode, base); -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 1beec94629d..a064aeecbc0 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x) - /* can_change_mode_class must only return true if subregs and svreinterprets - have the same semantics. */ - if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS)) -- return lowpart_subreg (mode, x, GET_MODE (x)); -+ return force_lowpart_subreg (mode, x, GET_MODE (x)); - - rtx res = gen_reg_rtx (mode); - x = force_reg (GET_MODE (x), x); -@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest, - rtx *high_in2) - { - *low_dest = gen_reg_rtx (DImode); -- *low_in1 = gen_lowpart (DImode, op1); -- *low_in2 = simplify_gen_subreg (DImode, op2, TImode, -- subreg_lowpart_offset (DImode, TImode)); -+ *low_in1 = force_lowpart_subreg (DImode, op1, TImode); -+ *low_in2 = force_lowpart_subreg (DImode, op2, TImode); - *high_dest = gen_reg_rtx (DImode); - *high_in1 = gen_highpart (DImode, op1); - *high_in2 = simplify_gen_subreg (DImode, op2, TImode, -@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest, - rtx *high_in2) - { - *low_dest = gen_reg_rtx (DImode); -- *low_in1 = simplify_gen_subreg (DImode, op1, TImode, -- subreg_lowpart_offset (DImode, TImode)); -- -- *low_in2 = simplify_gen_subreg (DImode, op2, TImode, -- subreg_lowpart_offset (DImode, TImode)); -+ *low_in1 = force_lowpart_subreg (DImode, op1, TImode); -+ *low_in2 = force_lowpart_subreg (DImode, op2, TImode); - *high_dest = gen_reg_rtx (DImode); - - *high_in1 = simplify_gen_subreg (DImode, op1, TImode, -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c -new file mode 100644 -index 00000000000..f561c34f732 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c -@@ -0,0 +1,11 @@ -+/* { dg-options "-O2" } */ -+ -+#include -+#include -+#include -+ -+svuint16_t -+convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a) -+{ -+ return svset_neonq_u16 (a, permute_tbl.val[1]); -+} --- -2.46.0 - - -From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:31 +0100 -Subject: [PATCH 4/4] Add force_lowpart_subreg - -optabs had a local function called lowpart_subreg_maybe_copy -that is very similar to the lowpart version of force_subreg. -This patch adds a force_lowpart_subreg wrapper around -force_subreg and uses it in optabs.cc. - -The only difference between the old and new functions is that -the old one asserted success while the new one doesn't. -It's common not to assert elsewhere when taking subregs; -normally a null result is enough. - -Later patches will make more use of the new function. - -gcc/ - * explow.h (force_lowpart_subreg): Declare. - * explow.cc (force_lowpart_subreg): New function. - * optabs.cc (lowpart_subreg_maybe_copy): Delete. - (expand_absneg_bit): Use force_lowpart_subreg instead of - lowpart_subreg_maybe_copy. - (expand_copysign_bit): Likewise. - -(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c) ---- - gcc/explow.cc | 14 ++++++++++++++ - gcc/explow.h | 1 + - gcc/optabs.cc | 24 ++---------------------- - 3 files changed, 17 insertions(+), 22 deletions(-) - -diff --git a/gcc/explow.cc b/gcc/explow.cc -index f6843398c4b..5fdfa81f69b 100644 ---- a/gcc/explow.cc -+++ b/gcc/explow.cc -@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op, - return simplify_gen_subreg (outermode, op, innermode, byte); - } - -+/* Try to return an rvalue expression for the OUTERMODE lowpart of OP, -+ which has mode INNERMODE. Allow OP to be forced into a new register -+ if necessary. -+ -+ Return null on failure. */ -+ -+rtx -+force_lowpart_subreg (machine_mode outermode, rtx op, -+ machine_mode innermode) -+{ -+ auto byte = subreg_lowpart_offset (outermode, innermode); -+ return force_subreg (outermode, op, innermode, byte); -+} -+ - /* If X is a memory ref, copy its contents to a new temp reg and return - that reg. Otherwise, return X. */ - -diff --git a/gcc/explow.h b/gcc/explow.h -index cbd1fcb7eb3..dd654649b06 100644 ---- a/gcc/explow.h -+++ b/gcc/explow.h -@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode); - extern rtx force_reg (machine_mode, rtx); - - extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64); -+extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode); - - /* Return given rtx, copied into a new temp reg if it was in memory. */ - extern rtx force_not_mem (rtx); -diff --git a/gcc/optabs.cc b/gcc/optabs.cc -index ce91f94ed43..804c0dc73ba 100644 ---- a/gcc/optabs.cc -+++ b/gcc/optabs.cc -@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target) - return 0; - } - --/* Extract the OMODE lowpart from VAL, which has IMODE. Under certain -- conditions, VAL may already be a SUBREG against which we cannot generate -- a further SUBREG. In this case, we expect forcing the value into a -- register will work around the situation. */ -- --static rtx --lowpart_subreg_maybe_copy (machine_mode omode, rtx val, -- machine_mode imode) --{ -- rtx ret; -- ret = lowpart_subreg (omode, val, imode); -- if (ret == NULL) -- { -- val = force_reg (imode, val); -- ret = lowpart_subreg (omode, val, imode); -- gcc_assert (ret != NULL); -- } -- return ret; --} -- - /* Expand a floating point absolute value or negation operation via a - logical operation on the sign bit. */ - -@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode, - gen_lowpart (imode, op0), - immed_wide_int_const (mask, imode), - gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN); -- target = lowpart_subreg_maybe_copy (mode, temp, imode); -+ target = force_lowpart_subreg (mode, temp, imode); - - set_dst_reg_note (get_last_insn (), REG_EQUAL, - gen_rtx_fmt_e (code, mode, copy_rtx (op0)), -@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target, - - temp = expand_binop (imode, ior_optab, op0, op1, - gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN); -- target = lowpart_subreg_maybe_copy (mode, temp, imode); -+ target = force_lowpart_subreg (mode, temp, imode); - } - - return target; --- -2.46.0 - diff --git a/cross/gcc-armv7/gcc-go.post-install b/cross/gcc-armv7/gcc-go.post-install deleted file mode 100644 index 6805fa7cf..000000000 --- a/cross/gcc-armv7/gcc-go.post-install +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/sh - -cat 1>&2 < -Date: Sat, 3 Aug 2024 20:37:54 +0200 -Subject: [PATCH] libquadmath: Fix up libquadmath/math/sqrtq.c compilation in - some powerpc* configurations [PR116007] - -My PR114623 change started using soft-fp.h and quad.h for the sqrtq implementation. -Unfortunately, that seems to fail building in some powerpc* configurations, where -TFmode isn't available. -quad.h has: - #ifndef TFtype - typedef float TFtype __attribute__ ((mode (TF))); - #endif -and uses TFtype. quad.h has: - /* Define the complex type corresponding to __float128 - ("_Complex __float128" is not allowed) */ - #if (!defined(_ARCH_PPC)) || defined(__LONG_DOUBLE_IEEE128__) - typedef _Complex float __attribute__((mode(TC))) __complex128; - #else - typedef _Complex float __attribute__((mode(KC))) __complex128; - #endif -with the conditional and KCmode use added during porting of libquadmath -to powerpc*, so I've just defined TFtype for powerpc when __LONG_DOUBLE_IEEE128__ -isn't defined; I could define it to float __attribute__ ((mode (KF))) but it -seemed easier to just define it to __float128 which should do the same thing. - -2024-08-03 Jakub Jelinek - - PR target/116007 - * math/sqrtq.c (TFtype): For PowerPC without __LONG_DOUBLE_IEEE128__ - define to __float128 before including soft-fp.h and quad.h. - -(cherry picked from commit 3ac02e67503ccffa3dfeeffc0a60fce6bdaca43b) ---- - libquadmath/math/sqrtq.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/libquadmath/math/sqrtq.c b/libquadmath/math/sqrtq.c -index 8ca2828d42ce..a58998a06670 100644 ---- a/libquadmath/math/sqrtq.c -+++ b/libquadmath/math/sqrtq.c -@@ -9,6 +9,9 @@ - && defined(FE_TOWARDZERO) \ - && defined(FE_INEXACT) - #define USE_SOFT_FP 1 -+#if defined(_ARCH_PPC) && !defined(__LONG_DOUBLE_IEEE128__) -+#define TFtype __float128 -+#endif - #include "../../libgcc/soft-fp/soft-fp.h" - #include "../../libgcc/soft-fp/quad.h" - #endif --- -2.43.5 - diff --git a/cross/gcc-armv7/riscv64-improve-build-time.patch b/cross/gcc-armv7/riscv64-improve-build-time.patch deleted file mode 100644 index 2c8c52a2c..000000000 --- a/cross/gcc-armv7/riscv64-improve-build-time.patch +++ /dev/null @@ -1,149 +0,0 @@ -Patch-Source: https://gcc.gnu.org/git/?p=gcc.git;a=patch;h=2cf89ae83225f932b226cd57ef2d083a59bcf8a3 --- -From 2cf89ae83225f932b226cd57ef2d083a59bcf8a3 Mon Sep 17 00:00:00 2001 -From: Richard Biener -Date: Tue, 6 Aug 2024 14:56:26 +0200 -Subject: [PATCH] tree-optimization/116166 - forward jump-threading going wild - -Currently the forward threader isn't limited as to the search space -it explores and with it now using path-ranger for simplifying -conditions it runs into it became pretty slow for degenerate cases -like compiling insn-emit.cc for RISC-V esp. when compiling for -a host with LOGICAL_OP_NON_SHORT_CIRCUIT disabled. - -The following makes the forward threader honor the search space -limit I introduced for the backward threader. This reduces -compile-time from minutes to seconds for the testcase in PR116166. - -Note this wasn't necessary before we had ranger but with ranger -the work we do is quadatic in the length of the threading path -we build up (the same is true for the backwards threader). - - PR tree-optimization/116166 - * tree-ssa-threadedge.h (jump_threader::thread_around_empty_blocks): - Add limit parameter. - (jump_threader::thread_through_normal_block): Likewise. - * tree-ssa-threadedge.cc (jump_threader::thread_around_empty_blocks): - Honor and decrement limit parameter. - (jump_threader::thread_through_normal_block): Likewise. - (jump_threader::thread_across_edge): Initialize limit from - param_max_jump_thread_paths and pass it down to workers. ---- - gcc/tree-ssa-threadedge.cc | 30 ++++++++++++++++++++++-------- - gcc/tree-ssa-threadedge.h | 4 ++-- - 2 files changed, 24 insertions(+), 10 deletions(-) - -diff --git a/gcc/tree-ssa-threadedge.cc b/gcc/tree-ssa-threadedge.cc -index 7f82639b8ecc..0aa2aa851430 100644 ---- a/gcc/tree-ssa-threadedge.cc -+++ b/gcc/tree-ssa-threadedge.cc -@@ -786,13 +786,17 @@ propagate_threaded_block_debug_into (basic_block dest, basic_block src) - bool - jump_threader::thread_around_empty_blocks (vec *path, - edge taken_edge, -- bitmap visited) -+ bitmap visited, unsigned &limit) - { - basic_block bb = taken_edge->dest; - gimple_stmt_iterator gsi; - gimple *stmt; - tree cond; - -+ if (limit == 0) -+ return false; -+ --limit; -+ - /* The key property of these blocks is that they need not be duplicated - when threading. Thus they cannot have visible side effects such - as PHI nodes. */ -@@ -830,7 +834,8 @@ jump_threader::thread_around_empty_blocks (vec *path, - m_registry->push_edge (path, taken_edge, EDGE_NO_COPY_SRC_BLOCK); - m_state->append_path (taken_edge->dest); - bitmap_set_bit (visited, taken_edge->dest->index); -- return thread_around_empty_blocks (path, taken_edge, visited); -+ return thread_around_empty_blocks (path, taken_edge, visited, -+ limit); - } - } - -@@ -872,7 +877,7 @@ jump_threader::thread_around_empty_blocks (vec *path, - m_registry->push_edge (path, taken_edge, EDGE_NO_COPY_SRC_BLOCK); - m_state->append_path (taken_edge->dest); - -- thread_around_empty_blocks (path, taken_edge, visited); -+ thread_around_empty_blocks (path, taken_edge, visited, limit); - return true; - } - -@@ -899,8 +904,13 @@ jump_threader::thread_around_empty_blocks (vec *path, - - int - jump_threader::thread_through_normal_block (vec *path, -- edge e, bitmap visited) -+ edge e, bitmap visited, -+ unsigned &limit) - { -+ if (limit == 0) -+ return 0; -+ limit--; -+ - m_state->register_equivs_edge (e); - - /* PHIs create temporary equivalences. -@@ -989,7 +999,7 @@ jump_threader::thread_through_normal_block (vec *path, - visited. This may be overly conservative. */ - bitmap_set_bit (visited, dest->index); - bitmap_set_bit (visited, e->dest->index); -- thread_around_empty_blocks (path, taken_edge, visited); -+ thread_around_empty_blocks (path, taken_edge, visited, limit); - return 1; - } - } -@@ -1075,9 +1085,12 @@ jump_threader::thread_across_edge (edge e) - bitmap_set_bit (visited, e->src->index); - bitmap_set_bit (visited, e->dest->index); - -+ /* Limit search space. */ -+ unsigned limit = param_max_jump_thread_paths; -+ - int threaded = 0; - if ((e->flags & EDGE_DFS_BACK) == 0) -- threaded = thread_through_normal_block (path, e, visited); -+ threaded = thread_through_normal_block (path, e, visited, limit); - - if (threaded > 0) - { -@@ -1148,11 +1161,12 @@ jump_threader::thread_across_edge (edge e) - m_registry->push_edge (path, e, EDGE_START_JUMP_THREAD); - m_registry->push_edge (path, taken_edge, EDGE_COPY_SRC_JOINER_BLOCK); - -- found = thread_around_empty_blocks (path, taken_edge, visited); -+ found = thread_around_empty_blocks (path, taken_edge, visited, limit); - - if (!found) - found = thread_through_normal_block (path, -- path->last ()->e, visited) > 0; -+ path->last ()->e, visited, -+ limit) > 0; - - /* If we were able to thread through a successor of E->dest, then - record the jump threading opportunity. */ -diff --git a/gcc/tree-ssa-threadedge.h b/gcc/tree-ssa-threadedge.h -index 9f6cbfe93307..245b3506a550 100644 ---- a/gcc/tree-ssa-threadedge.h -+++ b/gcc/tree-ssa-threadedge.h -@@ -101,9 +101,9 @@ private: - unsigned limit); - - bool thread_around_empty_blocks (vec *path, -- edge, bitmap visited); -+ edge, bitmap visited, unsigned &limit); - int thread_through_normal_block (vec *path, -- edge, bitmap visited); -+ edge, bitmap visited, unsigned &limit); - void thread_across_edge (edge); - bool record_temporary_equivalences_from_phis (edge); - gimple *record_temporary_equivalences_from_stmts_at_dest (edge); --- -2.43.5 - diff --git a/cross/gcc-riscv64/0002-gcc-poison-system-directories.patch b/cross/gcc-riscv64/0002-gcc-poison-system-directories.patch index 84c80c95b..9a1671267 100644 --- a/cross/gcc-riscv64/0002-gcc-poison-system-directories.patch +++ b/cross/gcc-riscv64/0002-gcc-poison-system-directories.patch @@ -25,11 +25,9 @@ Upstream-Status: Pending gcc/incpath.cc | 21 +++++++++++++++++++++ 7 files changed, 68 insertions(+) -diff --git a/gcc/common.opt b/gcc/common.opt -index 862c474d3c8..64c4277c991 100644 --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -711,6 +711,10 @@ Wreturn-local-addr +@@ -715,6 +715,10 @@ Wreturn-local-addr Common Var(warn_return_local_addr) Init(1) Warning Warn about returning a pointer/reference to a local or temporary variable. @@ -40,11 +38,9 @@ index 862c474d3c8..64c4277c991 100644 Wshadow Common Var(warn_shadow) Warning Warn when one variable shadows another. Same as -Wshadow=global. -diff --git a/gcc/config.in b/gcc/config.in -index 4cad077bfbe..0679fbbf4c6 100644 --- a/gcc/config.in +++ b/gcc/config.in -@@ -236,6 +236,12 @@ +@@ -249,6 +249,12 @@ #endif @@ -57,19 +53,17 @@ index 4cad077bfbe..0679fbbf4c6 100644 /* Define if you want all operations on RTL (the basic data structure of the optimizer and back end) to be checked for dynamic type safety at runtime. This is quite expensive. */ -diff --git a/gcc/configure b/gcc/configure -index c7b26d1927d..8c46369f73f 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -1026,6 +1026,7 @@ enable_maintainer_mode +@@ -1050,6 +1050,7 @@ enable_maintainer_mode enable_link_mutex enable_link_serialization enable_version_specific_runtime_libs +enable_poison_system_directories enable_plugin enable_host_shared - enable_libquadmath_support -@@ -1788,6 +1789,8 @@ Optional Features: + enable_host_pie +@@ -1823,6 +1824,8 @@ Optional Features: --enable-version-specific-runtime-libs specify that runtime libraries should be installed in a compiler-specific directory @@ -77,8 +71,8 @@ index c7b26d1927d..8c46369f73f 100755 + warn for use of native system header directories --enable-plugin enable plugin support --enable-host-shared build host code as shared libraries - --disable-libquadmath-support -@@ -31753,6 +31756,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : + --enable-host-pie build host code as PIE +@@ -34082,6 +34085,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : fi @@ -98,11 +92,9 @@ index c7b26d1927d..8c46369f73f 100755 # Substitute configuration variables -diff --git a/gcc/configure.ac b/gcc/configure.ac -index 09082e8ccae..5504bf6eb01 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -7292,6 +7292,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs, +@@ -7555,6 +7555,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs, [specify that runtime libraries should be installed in a compiler-specific directory])]) @@ -119,11 +111,9 @@ index 09082e8ccae..5504bf6eb01 100644 # Substitute configuration variables AC_SUBST(subdirs) AC_SUBST(srcdir) -diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index af0e5933fdb..b6731a4673c 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -384,6 +384,7 @@ Objective-C and Objective-C++ Dialects}. +@@ -391,6 +391,7 @@ Objective-C and Objective-C++ Dialects}. -Wpacked -Wno-packed-bitfield-compat -Wpacked-not-aligned -Wpadded -Wparentheses -Wno-pedantic-ms-format -Wpointer-arith -Wno-pointer-compare -Wno-pointer-to-int-cast @@ -131,7 +121,7 @@ index af0e5933fdb..b6731a4673c 100644 -Wno-pragmas -Wno-prio-ctor-dtor -Wredundant-decls -Wrestrict -Wno-return-local-addr -Wreturn-type -Wno-scalar-storage-order -Wsequence-point -@@ -8426,6 +8427,14 @@ made up of data only and thus requires no special treatment. But, for +@@ -8861,6 +8862,14 @@ made up of data only and thus requires no special treatment. But, for most targets, it is made up of code and thus requires the stack to be made executable in order for the program to work properly. @@ -146,12 +136,10 @@ index af0e5933fdb..b6731a4673c 100644 @opindex Wfloat-equal @opindex Wno-float-equal @item -Wfloat-equal -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 16bb07f2cdc..33b56e721d2 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -1177,6 +1187,8 @@ proper position among the other output files. */ - "-z now " \ +@@ -1163,6 +1163,8 @@ proper position among the other output files. */ + "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \ "%X %{o*} %{e*} %{N} %{n} %{r}\ %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \ + %{Wno-poison-system-directories:--no-poison-system-directories} \ @@ -159,8 +147,6 @@ index 16bb07f2cdc..33b56e721d2 100644 %{static|no-pie|static-pie:} %@{L*} %(link_libgcc) " \ VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \ %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\ -diff --git a/gcc/incpath.cc b/gcc/incpath.cc -index 4d44321183f..0f3f071b44c 100644 --- a/gcc/incpath.cc +++ b/gcc/incpath.cc @@ -26,6 +26,7 @@ @@ -198,6 +184,3 @@ index 4d44321183f..0f3f071b44c 100644 } /* Use given -I paths for #include "..." but not #include <...>, and --- -2.41.0 - diff --git a/cross/gcc-riscv64/0003-specs-turn-on-Wl-z-now-by-default.patch b/cross/gcc-riscv64/0003-specs-turn-on-Wl-z-now-by-default.patch index bfb0a6eba..33e8b56f1 100644 --- a/cross/gcc-riscv64/0003-specs-turn-on-Wl-z-now-by-default.patch +++ b/cross/gcc-riscv64/0003-specs-turn-on-Wl-z-now-by-default.patch @@ -13,11 +13,9 @@ now by default. gcc/gcc.cc | 1 + 2 files changed, 4 insertions(+) -diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index b6731a4673c..f393c7846c6 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -17961,6 +17961,9 @@ For example, @option{-Wl,-Map,output.map} passes @option{-Map output.map} to the +@@ -18935,6 +18935,9 @@ For example, @option{-Wl,-Map,output.map} passes @option{-Map output.map} to the linker. When using the GNU linker, you can also get the same effect with @option{-Wl,-Map=output.map}. @@ -27,11 +25,9 @@ index b6731a4673c..f393c7846c6 100644 @opindex u @item -u @var{symbol} Pretend the symbol @var{symbol} is undefined, to force linking of -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 33b56e721d2..f82fae23c22 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -1144,6 +1144,7 @@ proper position among the other output files. */ +@@ -1161,6 +1161,7 @@ proper position among the other output files. */ "%{flto|flto=*:%= 2, 0) @@ -20,7 +18,7 @@ index a75038930ae..b98726f33ed 100644 Warn about possible security problems with format functions. Wformat-signedness -@@ -725,7 +725,7 @@ C ObjC C++ ObjC++ Var(warn_format_zero_length) Warning LangEnabledBy(C ObjC C++ +@@ -799,7 +799,7 @@ C ObjC C++ ObjC++ Var(warn_format_zero_length) Warning LangEnabledBy(C ObjC C++ Warn about zero-length formats. Wformat= @@ -28,7 +26,4 @@ index a75038930ae..b98726f33ed 100644 +C ObjC C++ ObjC++ Joined RejectNegative UInteger Var(warn_format) Init(1) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall, 1, 0) IntegerRange(0, 2) Warn about printf/scanf/strftime/strfmon format string anomalies. - Wformat-overflow= --- -2.41.0 - + Wframe-address diff --git a/cross/gcc-riscv64/0007-Enable-Wtrampolines-by-default.patch b/cross/gcc-riscv64/0007-Enable-Wtrampolines-by-default.patch index eb7aae838..140685d7b 100644 --- a/cross/gcc-riscv64/0007-Enable-Wtrampolines-by-default.patch +++ b/cross/gcc-riscv64/0007-Enable-Wtrampolines-by-default.patch @@ -7,11 +7,9 @@ Subject: [PATCH 07/35] Enable -Wtrampolines by default. gcc/common.opt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/gcc/common.opt b/gcc/common.opt -index 64c4277c991..c24839d32bc 100644 --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -803,7 +803,7 @@ Common Var(warn_system_headers) Warning +@@ -811,7 +811,7 @@ Common Var(warn_system_headers) Warning Do not suppress warnings from system headers. Wtrampolines @@ -20,6 +18,3 @@ index 64c4277c991..c24839d32bc 100644 Warn whenever a trampoline is generated. Wtrivial-auto-var-init --- -2.41.0 - diff --git a/cross/gcc-riscv64/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch b/cross/gcc-riscv64/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch index 69c1bf725..e85284ff0 100644 --- a/cross/gcc-riscv64/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch +++ b/cross/gcc-riscv64/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch @@ -9,11 +9,9 @@ Subject: [PATCH 08/35] Disable ssp on -nostdlib, -nodefaultlibs and gcc/params.opt | 2 +- 2 files changed, 8 insertions(+), 2 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index da6417dd0d1..b5a6f200635 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -983,6 +983,12 @@ proper position among the other output files. */ +@@ -1000,6 +1000,12 @@ proper position among the other output files. */ #define LINK_GCC_C_SEQUENCE_SPEC "%G %{!nolibc:%L %G}" #endif @@ -26,20 +24,18 @@ index da6417dd0d1..b5a6f200635 100644 #ifndef LINK_SSP_SPEC #ifdef TARGET_LIBC_PROVIDES_SSP #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ -@@ -1282,7 +1288,7 @@ static const char *cc1_options = +@@ -1305,7 +1311,7 @@ static const char *cc1_options = %{-version:--version}\ %{-help=*:--help=%*}\ %{!fsyntax-only:%{S:%W{o*}%{!o*:-o %w%b.s}}}\ - %{fsyntax-only:-o %j} %{-param*}\ + %{fsyntax-only:-o %j} %{-param*} " NO_SSP_SPEC "\ %{coverage:-fprofile-arcs -ftest-coverage}\ - %{fprofile-arcs|fprofile-generate*|coverage:\ + %{fprofile-arcs|fcondition-coverage|fprofile-generate*|coverage:\ %{!fprofile-update=single:\ -diff --git a/gcc/params.opt b/gcc/params.opt -index 823cdb2ff85..5b096899b40 100644 --- a/gcc/params.opt +++ b/gcc/params.opt -@@ -1006,7 +1006,7 @@ Common Joined UInteger Var(param_ssa_name_def_chain_limit) Init(512) Param Optim +@@ -1013,7 +1013,7 @@ Common Joined UInteger Var(param_ssa_name_def_chain_limit) Init(512) Param Optim The maximum number of SSA_NAME assignments to follow in determining a value. -param=ssp-buffer-size= @@ -48,6 +44,3 @@ index 823cdb2ff85..5b096899b40 100644 The lower bound for a buffer to be considered for stack smashing protection. -param=stack-clash-protection-guard-size= --- -2.41.0 - diff --git a/cross/gcc-riscv64/0012-libgcc_s.patch b/cross/gcc-riscv64/0012-libgcc_s.patch index d8bbc602f..8189f8491 100644 --- a/cross/gcc-riscv64/0012-libgcc_s.patch +++ b/cross/gcc-riscv64/0012-libgcc_s.patch @@ -9,11 +9,9 @@ Subject: [PATCH 12/35] libgcc_s libgcc/config/i386/t-linux | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) -diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc -index 0d817fc3f3b..2e99db00db9 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc -@@ -12691,10 +12691,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, +@@ -13089,10 +13089,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, { case IX86_BUILTIN_CPU_INIT: { @@ -26,8 +24,6 @@ index 0d817fc3f3b..2e99db00db9 100644 call_expr = build_call_expr (fndecl, 0); return expand_expr (call_expr, target, mode, EXPAND_NORMAL); } -diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c -index 50b6d8248a2..724ced402a1 100644 --- a/libgcc/config/i386/cpuinfo.c +++ b/libgcc/config/i386/cpuinfo.c @@ -63,7 +63,7 @@ __cpu_indicator_init (void) @@ -41,8 +37,6 @@ index 50b6d8248a2..724ced402a1 100644 +int __cpu_indicator_init_local (void) + __attribute__ ((weak, alias ("__cpu_indicator_init"))); #endif -diff --git a/libgcc/config/i386/t-linux b/libgcc/config/i386/t-linux -index 8506a635790..564296f788e 100644 --- a/libgcc/config/i386/t-linux +++ b/libgcc/config/i386/t-linux @@ -3,5 +3,5 @@ @@ -52,6 +46,3 @@ index 8506a635790..564296f788e 100644 -HOST_LIBGCC2_CFLAGS += -mlong-double-80 -DUSE_ELF_SYMVER $(CET_FLAGS) +HOST_LIBGCC2_CFLAGS += -mlong-double-80 $(CET_FLAGS) CRTSTUFF_T_CFLAGS += $(CET_FLAGS) --- -2.41.0 - diff --git a/cross/gcc-riscv64/0013-nopie.patch b/cross/gcc-riscv64/0013-nopie.patch index 6578ee110..4a9ea0770 100644 --- a/cross/gcc-riscv64/0013-nopie.patch +++ b/cross/gcc-riscv64/0013-nopie.patch @@ -4,15 +4,13 @@ Date: Sat, 7 Nov 2015 02:08:05 +0000 Subject: [PATCH 13/35] nopie --- - gcc/configure | 27 +++++++++++++++++++++++++++ - gcc/configure.ac | 13 +++++++++++++ - 2 files changed, 40 insertions(+) + gcc/configure | 25 +++++++++++++++++++++++++ + gcc/configure.ac | 11 +++++++++++ + 2 files changed, 36 insertions(+) -diff --git a/gcc/configure b/gcc/configure -index 23da7d55d..f38732bb2 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -34534,6 +34534,29 @@ rm -f core conftest.err conftest.$ac_objext \ +@@ -34606,6 +34606,29 @@ rm -f core conftest.err conftest.$ac_objext \ fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_no_pie" >&5 $as_echo "$gcc_cv_no_pie" >&6; } @@ -42,7 +40,7 @@ index 23da7d55d..f38732bb2 100755 if test x$enable_host_shared = xyes; then PICFLAG=-fPIC -@@ -34551,6 +34574,8 @@ if test x$enable_host_pie = xyes; then +@@ -34623,6 +34646,8 @@ if test x$enable_host_pie = xyes; then LD_PICFLAG=-pie elif test x$gcc_cv_no_pie = xyes; then LD_PICFLAG=-no-pie @@ -51,11 +49,9 @@ index 23da7d55d..f38732bb2 100755 else LD_PICFLAG= fi -diff --git a/gcc/configure.ac b/gcc/configure.ac -index d7cf0b92c..db2e2c802 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -7781,6 +7781,15 @@ AC_CACHE_CHECK([for -no-pie option], +@@ -7821,6 +7821,15 @@ AC_CACHE_CHECK([for -no-pie option], [gcc_cv_no_pie=yes], [gcc_cv_no_pie=no]) LDFLAGS="$saved_LDFLAGS"]) @@ -71,7 +67,7 @@ index d7cf0b92c..db2e2c802 100644 if test x$enable_host_shared = xyes; then PICFLAG=-fPIC -@@ -7798,6 +7807,8 @@ if test x$enable_host_pie = xyes; then +@@ -7838,6 +7847,8 @@ if test x$enable_host_pie = xyes; then LD_PICFLAG=-pie elif test x$gcc_cv_no_pie = xyes; then LD_PICFLAG=-no-pie @@ -80,6 +76,3 @@ index d7cf0b92c..db2e2c802 100644 else LD_PICFLAG= fi --- -2.41.0 - diff --git a/cross/gcc-riscv64/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch b/cross/gcc-riscv64/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch index 937cad8a7..ddea4a05b 100644 --- a/cross/gcc-riscv64/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch +++ b/cross/gcc-riscv64/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch @@ -7,11 +7,9 @@ Subject: [PATCH 15/35] build: fix CXXFLAGS_FOR_BUILD passing Makefile.in | 1 + 1 file changed, 1 insertion(+) -diff --git a/Makefile.in b/Makefile.in -index 06a9398e172..6ff2b3f9925 100644 --- a/Makefile.in +++ b/Makefile.in -@@ -178,6 +178,7 @@ BUILD_EXPORTS = \ +@@ -179,6 +179,7 @@ BUILD_EXPORTS = \ # built for the build system to override those in BASE_FLAGS_TO_PASS. EXTRA_BUILD_FLAGS = \ CFLAGS="$(CFLAGS_FOR_BUILD)" \ @@ -19,6 +17,3 @@ index 06a9398e172..6ff2b3f9925 100644 LDFLAGS="$(LDFLAGS_FOR_BUILD)" # This is the list of directories to built for the host system. --- -2.41.0 - diff --git a/cross/gcc-riscv64/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch b/cross/gcc-riscv64/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch index 96972482c..4796a055d 100644 --- a/cross/gcc-riscv64/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch +++ b/cross/gcc-riscv64/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch @@ -12,11 +12,9 @@ Subject: [PATCH 17/35] Alpine musl package provides libssp_nonshared.a. We gcc/gcc.cc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index b5a6f200635..6cbb726599b 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -991,8 +991,7 @@ proper position among the other output files. */ +@@ -1008,8 +1008,7 @@ proper position among the other output files. */ #ifndef LINK_SSP_SPEC #ifdef TARGET_LIBC_PROVIDES_SSP @@ -26,6 +24,3 @@ index b5a6f200635..6cbb726599b 100644 #else #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ "|fstack-protector-strong|fstack-protector-explicit" \ --- -2.41.0 - diff --git a/cross/gcc-riscv64/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch b/cross/gcc-riscv64/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch index a9612913e..b829e5b34 100644 --- a/cross/gcc-riscv64/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch +++ b/cross/gcc-riscv64/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch @@ -8,11 +8,9 @@ Subject: [PATCH 18/35] DP: Use --push-state/--pop-state for gold as well when gcc/gcc.cc | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 6cbb726599b..59390fd39d6 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -755,10 +755,10 @@ proper position among the other output files. */ +@@ -772,10 +772,10 @@ proper position among the other output files. */ #define LIBASAN_SPEC STATIC_LIBASAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBASAN_SPEC "%{static-libasan:" LD_STATIC_OPTION "}" \ @@ -25,7 +23,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBASAN_LIBS #else #define LIBASAN_SPEC "-lasan" STATIC_LIBASAN_LIBS -@@ -794,10 +794,10 @@ proper position among the other output files. */ +@@ -811,10 +811,10 @@ proper position among the other output files. */ #define LIBTSAN_SPEC STATIC_LIBTSAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBTSAN_SPEC "%{static-libtsan:" LD_STATIC_OPTION "}" \ @@ -38,7 +36,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBTSAN_LIBS #else #define LIBTSAN_SPEC "-ltsan" STATIC_LIBTSAN_LIBS -@@ -815,10 +815,10 @@ proper position among the other output files. */ +@@ -832,10 +832,10 @@ proper position among the other output files. */ #define LIBLSAN_SPEC STATIC_LIBLSAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBLSAN_SPEC "%{static-liblsan:" LD_STATIC_OPTION "}" \ @@ -51,7 +49,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBLSAN_LIBS #else #define LIBLSAN_SPEC "-llsan" STATIC_LIBLSAN_LIBS -@@ -834,10 +834,10 @@ proper position among the other output files. */ +@@ -851,10 +851,10 @@ proper position among the other output files. */ " %{static-libubsan|static:%:include(libsanitizer.spec)%(link_libubsan)}" #ifdef HAVE_LD_STATIC_DYNAMIC #define LIBUBSAN_SPEC "%{static-libubsan:" LD_STATIC_OPTION "}" \ @@ -64,6 +62,3 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBUBSAN_LIBS #else #define LIBUBSAN_SPEC "-lubsan" STATIC_LIBUBSAN_LIBS --- -2.41.0 - diff --git a/cross/gcc-riscv64/0023-riscv-disable-multilib-support.patch b/cross/gcc-riscv64/0023-riscv-disable-multilib-support.patch index 49916376f..eb9ba90fc 100644 --- a/cross/gcc-riscv64/0023-riscv-disable-multilib-support.patch +++ b/cross/gcc-riscv64/0023-riscv-disable-multilib-support.patch @@ -42,11 +42,9 @@ library. gcc/config/riscv/t-linux | 7 +++++-- 2 files changed, 5 insertions(+), 10 deletions(-) -diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h -index f8c2c351e5a..8d9881eadeb 100644 --- a/gcc/config/riscv/linux.h +++ b/gcc/config/riscv/linux.h -@@ -60,11 +60,3 @@ along with GCC; see the file COPYING3. If not see +@@ -61,11 +61,3 @@ along with GCC; see the file COPYING3. If not see %{rdynamic:-export-dynamic} \ -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \ %{static:-static} %{static-pie:-static -pie --no-dynamic-linker -z text}}" @@ -58,11 +56,9 @@ index f8c2c351e5a..8d9881eadeb 100644 - "/usr/lib/ " - -#define RISCV_USE_CUSTOMISED_MULTI_LIB select_by_abi -diff --git a/gcc/config/riscv/t-linux b/gcc/config/riscv/t-linux -index 216d2776a18..1a8a863853e 100644 --- a/gcc/config/riscv/t-linux +++ b/gcc/config/riscv/t-linux -@@ -1,3 +1,6 @@ +@@ -1,5 +1,8 @@ -# Only XLEN and ABI affect Linux multilib dir names, e.g. /lib32/ilp32d/ -MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib64,$(MULTILIB_DIRNAMES))) +MULTILIB_OPTIONS := march=rv64gc @@ -71,6 +67,5 @@ index 216d2776a18..1a8a863853e 100644 +MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib,$(MULTILIB_DIRNAMES))) MULTILIB_OSDIRNAMES := $(patsubst lib%,../lib%,$(MULTILIB_DIRNAMES)) +MULTILIB_MATCHES := march?rv64gc=march?rv64imafdc --- -2.41.0 - + + MULTIARCH_DIRNAME := $(call if_multiarch,$(firstword $(subst -, ,$(target)))-linux-gnu) diff --git a/cross/gcc-riscv64/0024-always-build-libgcc_eh.a.patch b/cross/gcc-riscv64/0024-always-build-libgcc_eh.a.patch index 6b0514e98..5d508ea08 100644 --- a/cross/gcc-riscv64/0024-always-build-libgcc_eh.a.patch +++ b/cross/gcc-riscv64/0024-always-build-libgcc_eh.a.patch @@ -9,11 +9,9 @@ highly inspired by: libgcc/Makefile.in | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) -diff --git a/libgcc/Makefile.in b/libgcc/Makefile.in -index 6c4dc79ab71..023cede18a7 100644 --- a/libgcc/Makefile.in +++ b/libgcc/Makefile.in -@@ -960,8 +960,9 @@ ifneq ($(LIBUNWIND),) +@@ -967,8 +967,9 @@ ifneq ($(LIBUNWIND),) all: libunwind.a endif @@ -24,7 +22,7 @@ index 6c4dc79ab71..023cede18a7 100644 ifneq ($(LIBUNWIND),) all: libunwind$(SHLIB_EXT) libgcc_s$(SHLIB_EXT): libunwind$(SHLIB_EXT) -@@ -1163,10 +1164,6 @@ install-libunwind: +@@ -1173,10 +1174,6 @@ install-libunwind: install-shared: $(mkinstalldirs) $(DESTDIR)$(inst_libdir) @@ -35,7 +33,7 @@ index 6c4dc79ab71..023cede18a7 100644 $(subst @multilib_dir@,$(MULTIDIR),$(subst \ @shlib_base_name@,libgcc_s,$(subst \ @shlib_slibdir_qual@,$(MULTIOSSUBDIR),$(SHLIB_INSTALL)))) -@@ -1183,6 +1180,10 @@ ifeq ($(enable_gcov),yes) +@@ -1193,6 +1190,10 @@ ifeq ($(enable_gcov),yes) $(RANLIB) $(DESTDIR)$(inst_libdir)/libgcov.a endif @@ -46,6 +44,3 @@ index 6c4dc79ab71..023cede18a7 100644 parts="$(INSTALL_PARTS)"; \ for file in $$parts; do \ rm -f $(DESTDIR)$(inst_libdir)/$$file; \ --- -2.41.0 - diff --git a/cross/gcc-riscv64/0026-ada-musl-support-fixes.patch b/cross/gcc-riscv64/0026-ada-musl-support-fixes.patch index 91a8268ab..0be683fa6 100644 --- a/cross/gcc-riscv64/0026-ada-musl-support-fixes.patch +++ b/cross/gcc-riscv64/0026-ada-musl-support-fixes.patch @@ -10,8 +10,6 @@ Subject: [PATCH 26/35] ada: musl support fixes gcc/ada/terminals.c | 8 ++++---- 4 files changed, 35 insertions(+), 33 deletions(-) -diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl -index 32cbdb692..463028fbe 100644 --- a/gcc/ada/Makefile.rtl +++ b/gcc/ada/Makefile.rtl @@ -1558,7 +1558,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),) @@ -23,7 +21,7 @@ index 32cbdb692..463028fbe 100644 a-exetim.adb&5 $as_echo_n "checking for library containing swapcontext... " >&6; } -diff --git a/libphobos/m4/druntime/libraries.m4 b/libphobos/m4/druntime/libraries.m4 -index 45a56f6f76a..fef6e890b1e 100644 --- a/libphobos/m4/druntime/libraries.m4 +++ b/libphobos/m4/druntime/libraries.m4 @@ -220,14 +220,6 @@ AC_DEFUN([DRUNTIME_LIBRARIES_UCONTEXT], @@ -49,6 +45,3 @@ index 45a56f6f76a..fef6e890b1e 100644 if test "$druntime_fiber_asm_external" = no; then AC_SEARCH_LIBS([swapcontext], [c ucontext], [], AC_MSG_ERROR([swapcontext required but not found])) --- -2.41.0 - diff --git a/cross/gcc-riscv64/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch b/cross/gcc-riscv64/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch index e1679a8e5..b53e5847d 100644 --- a/cross/gcc-riscv64/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch +++ b/cross/gcc-riscv64/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch @@ -7,11 +7,9 @@ Subject: [PATCH 32/35] libgnat: time_t is always 64-bit on musl libc gcc/ada/libgnat/s-parame.ads | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/gcc/ada/libgnat/s-parame.ads b/gcc/ada/libgnat/s-parame.ads -index 3d6e345a1ba..cfe0b4d3ca6 100644 --- a/gcc/ada/libgnat/s-parame.ads +++ b/gcc/ada/libgnat/s-parame.ads -@@ -102,7 +102,7 @@ package System.Parameters is +@@ -100,7 +100,7 @@ package System.Parameters is -- Characteristics of time_t type -- ------------------------------------ @@ -20,6 +18,3 @@ index 3d6e345a1ba..cfe0b4d3ca6 100644 -- Number of bits in type time_t ---------------------------------------------- --- -2.41.0 - diff --git a/cross/gcc-riscv64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch b/cross/gcc-riscv64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch deleted file mode 100644 index bc3c4a6ac..000000000 --- a/cross/gcc-riscv64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 4d0a333ef13e2da140cd44c4941b20f48a80dc0f Mon Sep 17 00:00:00 2001 -From: Hannes Braun -Date: Thu, 20 Feb 2025 15:09:41 +0100 -Subject: [PATCH] arm: Fix signedness of vld1q intrinsic parms [PR118942] - -vld1q_s8_x3, vld1q_s16_x3, vld1q_s8_x4 and vld1q_s16_x4 were expecting -pointers to unsigned integers. These parameters should be pointers to -signed integers. - -gcc/ChangeLog: - PR target/118942 - * config/arm/arm_neon.h (vld1q_s8_x3): Use int8_t instead of - uint16_t. - (vld1q_s16_x3): Use int16_t instead of uint16_t. - (vld1q_s8_x4): Likewise. - (vld1q_s16_x4): Likewise. - -gcc/testsuite/ChangeLog: - PR target/118942 - * gcc.target/arm/simd/vld1q_base_xN_1.c: Add -Wpointer-sign. - -Signed-off-by: Hannes Braun ---- - gcc/config/arm/arm_neon.h | 8 ++++---- - gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c | 2 +- - 2 files changed, 5 insertions(+), 5 deletions(-) - -diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h -index 5b1c55c8d9f..578ada88fa6 100644 ---- a/gcc/config/arm/arm_neon.h -+++ b/gcc/config/arm/arm_neon.h -@@ -10854,7 +10854,7 @@ vld1q_s64_x2 (const int64_t * __a) - - __extension__ extern __inline int8x16x3_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s8_x3 (const uint8_t * __a) -+vld1q_s8_x3 (const int8_t * __a) - { - union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a); -@@ -10863,7 +10863,7 @@ vld1q_s8_x3 (const uint8_t * __a) - - __extension__ extern __inline int16x8x3_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s16_x3 (const uint16_t * __a) -+vld1q_s16_x3 (const int16_t * __a) - { - union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a); -@@ -10890,7 +10890,7 @@ vld1q_s64_x3 (const int64_t * __a) - - __extension__ extern __inline int8x16x4_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s8_x4 (const uint8_t * __a) -+vld1q_s8_x4 (const int8_t * __a) - { - union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x4v16qi ((const __builtin_neon_qi *) __a); -@@ -10899,7 +10899,7 @@ vld1q_s8_x4 (const uint8_t * __a) - - __extension__ extern __inline int16x8x4_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s16_x4 (const uint16_t * __a) -+vld1q_s16_x4 (const int16_t * __a) - { - union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x4v8hi ((const __builtin_neon_hi *) __a); -diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -index 01b29b60084..c73afe2b723 100644 ---- a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -+++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -@@ -1,6 +1,6 @@ - /* { dg-do assemble } */ - /* { dg-require-effective-target arm_neon_ok } */ --/* { dg-options "-save-temps -O2" } */ -+/* { dg-options "-save-temps -O2 -Wpointer-sign" } */ - /* { dg-add-options arm_neon } */ - - #include "arm_neon.h" --- -2.48.1 - diff --git a/cross/gcc-riscv64/APKBUILD b/cross/gcc-riscv64/APKBUILD index 0e62dca7d..71d0df8b9 100644 --- a/cross/gcc-riscv64/APKBUILD +++ b/cross/gcc-riscv64/APKBUILD @@ -24,7 +24,7 @@ CBUILDROOT="/" _cross_configure="--disable-bootstrap --with-sysroot=/usr/$CTARGET" pkgname=gcc-riscv64 -pkgver=14.2.0 +pkgver=14.3.0 # i.e. 13.2.1, must match gcc/BASE-VER _pkgbase="${pkgver%%_git*}" # date component from snapshots @@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}" [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target="" pkgname=gcc-riscv64 -pkgrel=6 +pkgrel=1 pkgdesc="Stage2 cross-compiler for riscv64" url="https://gcc.gnu.org" arch="x86_64" @@ -278,10 +278,6 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz 0034-libgo-fix-lfs64-use.patch 0035-loongarch-disable-multilib-support.patch 0036-libphobos-add-riscv64-and-loongarch64-support.patch - 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch - fix-arm64.patch - ppc64le-quadmath.patch - riscv64-improve-build-time.patch " # secfixes: @@ -291,8 +287,8 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz # we build out-of-tree #builddir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap builddir="$srcdir"/gcc-$_pkgbase -_gcclibdir="/usr/lib/gcc/$CTARGET/$_pkgbase" -_gcclibexec="/usr/libexec/gcc/$CTARGET/$_pkgbase" +_gcclibdir="usr/lib/gcc/$CTARGET/$_pkgbase" +_gcclibexec="usr/libexec/gcc/$CTARGET/$_pkgbase" prepare() { default_prepare @@ -319,7 +315,7 @@ build() { i586-*-*-*) _arch_configure="--with-arch=pentium-m --with-fpmath=sse --with-tune=generic --enable-cld";; s390x-*-*-*) _arch_configure="--with-arch=z196 --with-tune=zEC12 --with-zarch --with-long-double-128 --enable-decimal-float";; riscv64-*-*-*) _arch_configure="--with-arch=rv64gc --with-abi=lp64d --enable-autolink-libatomic";; - loongarch64-*-*-*) _arch_configure="--with-arch=la64v1.0 --with-abi=lp64d";; + loongarch64-*-*-*) _arch_configure="--with-arch=la64v1.0 --with-abi=lp64d";; esac case "$CTARGET_ARCH" in @@ -431,6 +427,11 @@ package() { [ "$CHOST" = "$CTARGET" ] && ln -s gcc "$pkgdir"/usr/bin/cc ln -s ${CTARGET}-gcc "$pkgdir"/usr/bin/${CTARGET}-cc + # symlink to vendor-less target triple for + # supporting clang --target's fallback match + # ref: https://gitlab.alpinelinux.org/alpine/aports/-/issues/16828 + ln -s "$CTARGET" "$pkgdir/usr/lib/gcc/${CTARGET%%-*}-${CTARGET#*-*-}" + if $LANG_JIT; then make -C "$_builddir"/libgccjit-build/gcc DESTDIR="$pkgdir" jit.install-common fi @@ -487,8 +488,6 @@ package() { # libcc1 does not depend on target, don't ship it rm -rf "$pkgdir"/usr/lib/libcc1.so* - # These are moved into packages with arch=$CTARGET_ARCH so remove - # cross prefix (doesn't exist when BOOTSTRAP=nolibc) # fixup gcc library symlinks to be linker scripts so # linker finds the libs from relocated sysroot @@ -663,7 +662,6 @@ libgo() { go() { pkgdesc="GCC Go frontend (intended for bootstrapping community/go)" depends="gcc=$_gccrel libgo=$_gccrel !go" - install="$pkgname-go.post-install" amove usr/lib/go amove usr/bin/*go @@ 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c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75 0033-libphobos-do-not-use-LFS64-symbols.patch c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c 0034-libgo-fix-lfs64-use.patch 65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3 0035-loongarch-disable-multilib-support.patch 06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453 0036-libphobos-add-riscv64-and-loongarch64-support.patch -a30148fb2cfa9a5800df4aed73f6b1b3b5d5817d768835a2574216f5818e6d6070199bacfe964f0d15b70eab7e2310c40b55e354f65360efce90e15d40287639 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch -00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f fix-arm64.patch -815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9 ppc64le-quadmath.patch -ea55e0fa6813fc95c4ca2e87f059182edc54dc61515ebb92bf6eb31dbbd176d0fe81edcc7ea28d32f84ca37e8d48a544623d3d9bc94aa41ffc0859326a616aa2 riscv64-improve-build-time.patch " diff --git a/cross/gcc-riscv64/fix-arm64.patch b/cross/gcc-riscv64/fix-arm64.patch deleted file mode 100644 index 8aaa9f742..000000000 --- a/cross/gcc-riscv64/fix-arm64.patch +++ /dev/null @@ -1,544 +0,0 @@ -From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Thu, 13 Jun 2024 12:48:21 +0100 -Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464] - -The testcase extracts one arm_neon.h vector from a pair (one subreg) -and then reinterprets the result as an SVE vector (another subreg). -Each subreg makes sense individually, but we can't fold them together -into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes, -but the interpretation of 32 bytes -> 16*N bytes depends on -whether N==1 or N>1. - -Since the second subreg makes sense individually, simplify_subreg -should bail out rather than ICE on it. simplify_gen_subreg will -then do the same (because it already checks validate_subreg). -This leaves simplify_gen_subreg returning null, requiring the -caller to take appropriate action. - -I think this is relatively likely to occur elsewhere, so the patch -adds a helper for forcing a subreg, allowing a temporary pseudo to -be created where necessary. - -I'll follow up by using force_subreg in more places. This patch -is intended to be a minimal backportable fix for the PR. - -gcc/ - PR target/115464 - * simplify-rtx.cc (simplify_context::simplify_subreg): Don't try - to fold two subregs together if their relationship isn't known - at compile time. - * explow.h (force_subreg): Declare. - * explow.cc (force_subreg): New function. - * config/aarch64/aarch64-sve-builtins-base.cc - (svset_neonq_impl::expand): Use it instead of simplify_gen_subreg. - -gcc/testsuite/ - PR target/115464 - * gcc.target/aarch64/sve/acle/general/pr115464.c: New test. - -(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0) ---- - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- - gcc/explow.cc | 15 +++++++++++++++ - gcc/explow.h | 2 ++ - gcc/simplify-rtx.cc | 5 +++++ - .../aarch64/sve/acle/general/pr115464.c | 13 +++++++++++++ - 5 files changed, 36 insertions(+), 1 deletion(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c - -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index 0d2edf3f19e..c9182594bc1 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1174,7 +1174,7 @@ public: - Advanced SIMD argument as an SVE vector. */ - if (!BYTES_BIG_ENDIAN - && is_undef (CALL_EXPR_ARG (e.call_expr, 0))) -- return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0); -+ return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0); - - rtx_vector_builder builder (VNx16BImode, 16, 2); - for (unsigned int i = 0; i < 16; i++) -diff --git a/gcc/explow.cc b/gcc/explow.cc -index 8e5f6b8e680..f6843398c4b 100644 ---- a/gcc/explow.cc -+++ b/gcc/explow.cc -@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x) - return temp; - } - -+/* Like simplify_gen_subreg, but force OP into a new register if the -+ subreg cannot be formed directly. */ -+ -+rtx -+force_subreg (machine_mode outermode, rtx op, -+ machine_mode innermode, poly_uint64 byte) -+{ -+ rtx x = simplify_gen_subreg (outermode, op, innermode, byte); -+ if (x) -+ return x; -+ -+ op = copy_to_mode_reg (innermode, op); -+ return simplify_gen_subreg (outermode, op, innermode, byte); -+} -+ - /* If X is a memory ref, copy its contents to a new temp reg and return - that reg. Otherwise, return X. */ - -diff --git a/gcc/explow.h b/gcc/explow.h -index 16aa02cfb68..cbd1fcb7eb3 100644 ---- a/gcc/explow.h -+++ b/gcc/explow.h -@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode); - Args are mode (in case value is a constant) and the value. */ - extern rtx force_reg (machine_mode, rtx); - -+extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64); -+ - /* Return given rtx, copied into a new temp reg if it was in memory. */ - extern rtx force_not_mem (rtx); - -diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc -index dceaa13333c..729d408aa55 100644 ---- a/gcc/simplify-rtx.cc -+++ b/gcc/simplify-rtx.cc -@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op, - poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode); - rtx newx; - -+ /* Make sure that the relationship between the two subregs is -+ known at compile time. */ -+ if (!ordered_p (outersize, innermostsize)) -+ return NULL_RTX; -+ - if (outermode == innermostmode - && known_eq (byte, 0U) - && known_eq (SUBREG_BYTE (op), 0)) -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c -new file mode 100644 -index 00000000000..d728d1325ed ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c -@@ -0,0 +1,13 @@ -+/* { dg-options "-O2" } */ -+ -+#include -+#include -+#include -+ -+svuint16_t -+convolve4_4_x (uint16x8x2_t permute_tbl) -+{ -+ return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]); -+} -+ -+/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */ --- -2.46.0 - - -From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:30 +0100 -Subject: [PATCH 2/4] aarch64: Use force_subreg in more places - -This patch makes the aarch64 code use force_subreg instead of -simplify_gen_subreg in more places. The criteria were: - -(1) The code is obviously specific to expand (where new pseudos - can be created). - -(2) The value is obviously an rvalue rather than an lvalue. - -(3) The offset wasn't a simple lowpart or highpart calculation; - a later patch will deal with those. - -gcc/ - * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin): - Use force_subreg instead of simplify_gen_subreg. - * config/aarch64/aarch64-simd.md (ctz2): Likewise. - * config/aarch64/aarch64-sve-builtins-base.cc - (svget_impl::expand): Likewise. - (svget_neonq_impl::expand): Likewise. - * config/aarch64/aarch64-sve-builtins-functions.h - (multireg_permute::expand): Likewise. - -(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4) ---- - gcc/config/aarch64/aarch64-builtins.cc | 4 ++-- - gcc/config/aarch64/aarch64-simd.md | 4 ++-- - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 8 +++----- - gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++--- - 4 files changed, 10 insertions(+), 12 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc -index 75d21de1401..b2e46a073a8 100644 ---- a/gcc/config/aarch64/aarch64-builtins.cc -+++ b/gcc/config/aarch64/aarch64-builtins.cc -@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - rtx temp2 = gen_reg_rtx (DImode); - temp1 = simplify_gen_subreg (d->mode, op2, quadmode, - subreg_lowpart_offset (d->mode, quadmode)); -- temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0); -+ temp1 = force_subreg (V2DImode, temp1, d->mode, 0); - if (BYTES_BIG_ENDIAN) - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx)); - else - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx)); -- op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0); -+ op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0); - - /* And recalculate the index. */ - lane -= nunits / 4; -diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md -index 33ab0741e87..5b9efe0b165 100644 ---- a/gcc/config/aarch64/aarch64-simd.md -+++ b/gcc/config/aarch64/aarch64-simd.md -@@ -412,8 +412,8 @@ - "TARGET_SIMD" - { - emit_insn (gen_bswap2 (operands[0], operands[1])); -- rtx op0_castsi2qi = simplify_gen_subreg(mode, operands[0], -- mode, 0); -+ rtx op0_castsi2qi = force_subreg (mode, operands[0], -+ mode, 0); - emit_insn (gen_aarch64_rbit (op0_castsi2qi, op0_castsi2qi)); - emit_insn (gen_clz2 (operands[0], operands[0])); - DONE; -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index c9182594bc1..2c95da79572 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1121,9 +1121,8 @@ public: - expand (function_expander &e) const override - { - /* Fold the access into a subreg rvalue. */ -- return simplify_gen_subreg (e.vector_mode (0), e.args[0], -- GET_MODE (e.args[0]), -- INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR); -+ return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]), -+ INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR); - } - }; - -@@ -1157,8 +1156,7 @@ public: - e.add_fixed_operand (indices); - return e.generate_insn (icode); - } -- return simplify_gen_subreg (e.result_mode (), e.args[0], -- GET_MODE (e.args[0]), 0); -+ return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0); - } - }; - -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h -index 3b8e575e98e..7d06a57ff83 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h -+++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h -@@ -639,9 +639,9 @@ public: - { - machine_mode elt_mode = e.vector_mode (0); - rtx arg = e.args[0]; -- e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0); -- e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), -- GET_MODE_SIZE (elt_mode))); -+ e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0); -+ e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg), -+ GET_MODE_SIZE (elt_mode))); - } - return e.use_exact_insn (icode); - } --- -2.46.0 - - -From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:31 +0100 -Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg - -This patch makes more use of force_lowpart_subreg, similarly -to the recent patch for force_subreg. The criteria were: - -(1) The code is obviously specific to expand (where new pseudos - can be created). - -(2) The value is obviously an rvalue rather than an lvalue. - -gcc/ - PR target/115464 - * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin) - (aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of - simplify_gen_subreg and lowpart_subreg. - * config/aarch64/aarch64-sve-builtins-base.cc - (svset_neonq_impl::expand): Likewise. - * config/aarch64/aarch64-sve-builtins-sme.cc - (add_load_store_slice_operand): Likewise. - * config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise. - (aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise. - -gcc/testsuite/ - PR target/115464 - * gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test. - -(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def) ---- - gcc/config/aarch64/aarch64-builtins.cc | 11 +++++------ - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- - gcc/config/aarch64/aarch64-sve-builtins-sme.cc | 2 +- - gcc/config/aarch64/aarch64.cc | 14 +++++--------- - .../aarch64/sve/acle/general/pr115464_2.c | 11 +++++++++++ - 5 files changed, 23 insertions(+), 17 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c - -diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc -index b2e46a073a8..264b9560709 100644 ---- a/gcc/config/aarch64/aarch64-builtins.cc -+++ b/gcc/config/aarch64/aarch64-builtins.cc -@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - int lane = INTVAL (lane_idx); - - if (lane < nunits / 4) -- op2 = simplify_gen_subreg (d->mode, op2, quadmode, -- subreg_lowpart_offset (d->mode, quadmode)); -+ op2 = force_lowpart_subreg (d->mode, op2, quadmode); - else - { - /* Select the upper 64 bits, either a V2SF or V4HF, this however -@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - gen_highpart_mode generates code that isn't optimal. */ - rtx temp1 = gen_reg_rtx (d->mode); - rtx temp2 = gen_reg_rtx (DImode); -- temp1 = simplify_gen_subreg (d->mode, op2, quadmode, -- subreg_lowpart_offset (d->mode, quadmode)); -+ temp1 = force_lowpart_subreg (d->mode, op2, quadmode); - temp1 = force_subreg (V2DImode, temp1, d->mode, 0); - if (BYTES_BIG_ENDIAN) - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx)); -@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode) - case AARCH64_WSR64: - case AARCH64_WSRF64: - case AARCH64_WSR128: -- subreg = lowpart_subreg (sysreg_mode, input_val, mode); -+ subreg = force_lowpart_subreg (sysreg_mode, input_val, mode); - break; - case AARCH64_WSRF: - subreg = gen_lowpart_SUBREG (SImode, input_val); -@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode) - case AARCH64_RSR64: - case AARCH64_RSRF64: - case AARCH64_RSR128: -- return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode); -+ return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), -+ target, sysreg_mode); - case AARCH64_RSRF: - subreg = gen_lowpart_SUBREG (SImode, target); - return gen_lowpart_SUBREG (SFmode, subreg); -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index 2c95da79572..3c970e9c5f8 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1183,7 +1183,7 @@ public: - if (BYTES_BIG_ENDIAN) - return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode)); - insn_code icode = code_for_vcond_mask (mode, mode); -- e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1])); -+ e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1])); - e.add_output_operand (icode); - e.add_input_operand (icode, e.args[1]); - e.add_input_operand (icode, e.args[0]); -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -index f4c91bcbb95..b66b35ae60b 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode, - rtx base = e.args[argno]; - if (e.mode_suffix_id == MODE_vnum) - { -- rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode); -+ rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode); - base = simplify_gen_binary (PLUS, SImode, base, vnum); - } - e.add_input_operand (icode, base); -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 1beec94629d..a064aeecbc0 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x) - /* can_change_mode_class must only return true if subregs and svreinterprets - have the same semantics. */ - if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS)) -- return lowpart_subreg (mode, x, GET_MODE (x)); -+ return force_lowpart_subreg (mode, x, GET_MODE (x)); - - rtx res = gen_reg_rtx (mode); - x = force_reg (GET_MODE (x), x); -@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest, - rtx *high_in2) - { - *low_dest = gen_reg_rtx (DImode); -- *low_in1 = gen_lowpart (DImode, op1); -- *low_in2 = simplify_gen_subreg (DImode, op2, TImode, -- subreg_lowpart_offset (DImode, TImode)); -+ *low_in1 = force_lowpart_subreg (DImode, op1, TImode); -+ *low_in2 = force_lowpart_subreg (DImode, op2, TImode); - *high_dest = gen_reg_rtx (DImode); - *high_in1 = gen_highpart (DImode, op1); - *high_in2 = simplify_gen_subreg (DImode, op2, TImode, -@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest, - rtx *high_in2) - { - *low_dest = gen_reg_rtx (DImode); -- *low_in1 = simplify_gen_subreg (DImode, op1, TImode, -- subreg_lowpart_offset (DImode, TImode)); -- -- *low_in2 = simplify_gen_subreg (DImode, op2, TImode, -- subreg_lowpart_offset (DImode, TImode)); -+ *low_in1 = force_lowpart_subreg (DImode, op1, TImode); -+ *low_in2 = force_lowpart_subreg (DImode, op2, TImode); - *high_dest = gen_reg_rtx (DImode); - - *high_in1 = simplify_gen_subreg (DImode, op1, TImode, -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c -new file mode 100644 -index 00000000000..f561c34f732 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c -@@ -0,0 +1,11 @@ -+/* { dg-options "-O2" } */ -+ -+#include -+#include -+#include -+ -+svuint16_t -+convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a) -+{ -+ return svset_neonq_u16 (a, permute_tbl.val[1]); -+} --- -2.46.0 - - -From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:31 +0100 -Subject: [PATCH 4/4] Add force_lowpart_subreg - -optabs had a local function called lowpart_subreg_maybe_copy -that is very similar to the lowpart version of force_subreg. -This patch adds a force_lowpart_subreg wrapper around -force_subreg and uses it in optabs.cc. - -The only difference between the old and new functions is that -the old one asserted success while the new one doesn't. -It's common not to assert elsewhere when taking subregs; -normally a null result is enough. - -Later patches will make more use of the new function. - -gcc/ - * explow.h (force_lowpart_subreg): Declare. - * explow.cc (force_lowpart_subreg): New function. - * optabs.cc (lowpart_subreg_maybe_copy): Delete. - (expand_absneg_bit): Use force_lowpart_subreg instead of - lowpart_subreg_maybe_copy. - (expand_copysign_bit): Likewise. - -(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c) ---- - gcc/explow.cc | 14 ++++++++++++++ - gcc/explow.h | 1 + - gcc/optabs.cc | 24 ++---------------------- - 3 files changed, 17 insertions(+), 22 deletions(-) - -diff --git a/gcc/explow.cc b/gcc/explow.cc -index f6843398c4b..5fdfa81f69b 100644 ---- a/gcc/explow.cc -+++ b/gcc/explow.cc -@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op, - return simplify_gen_subreg (outermode, op, innermode, byte); - } - -+/* Try to return an rvalue expression for the OUTERMODE lowpart of OP, -+ which has mode INNERMODE. Allow OP to be forced into a new register -+ if necessary. -+ -+ Return null on failure. */ -+ -+rtx -+force_lowpart_subreg (machine_mode outermode, rtx op, -+ machine_mode innermode) -+{ -+ auto byte = subreg_lowpart_offset (outermode, innermode); -+ return force_subreg (outermode, op, innermode, byte); -+} -+ - /* If X is a memory ref, copy its contents to a new temp reg and return - that reg. Otherwise, return X. */ - -diff --git a/gcc/explow.h b/gcc/explow.h -index cbd1fcb7eb3..dd654649b06 100644 ---- a/gcc/explow.h -+++ b/gcc/explow.h -@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode); - extern rtx force_reg (machine_mode, rtx); - - extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64); -+extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode); - - /* Return given rtx, copied into a new temp reg if it was in memory. */ - extern rtx force_not_mem (rtx); -diff --git a/gcc/optabs.cc b/gcc/optabs.cc -index ce91f94ed43..804c0dc73ba 100644 ---- a/gcc/optabs.cc -+++ b/gcc/optabs.cc -@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target) - return 0; - } - --/* Extract the OMODE lowpart from VAL, which has IMODE. Under certain -- conditions, VAL may already be a SUBREG against which we cannot generate -- a further SUBREG. In this case, we expect forcing the value into a -- register will work around the situation. */ -- --static rtx --lowpart_subreg_maybe_copy (machine_mode omode, rtx val, -- machine_mode imode) --{ -- rtx ret; -- ret = lowpart_subreg (omode, val, imode); -- if (ret == NULL) -- { -- val = force_reg (imode, val); -- ret = lowpart_subreg (omode, val, imode); -- gcc_assert (ret != NULL); -- } -- return ret; --} -- - /* Expand a floating point absolute value or negation operation via a - logical operation on the sign bit. */ - -@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode, - gen_lowpart (imode, op0), - immed_wide_int_const (mask, imode), - gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN); -- target = lowpart_subreg_maybe_copy (mode, temp, imode); -+ target = force_lowpart_subreg (mode, temp, imode); - - set_dst_reg_note (get_last_insn (), REG_EQUAL, - gen_rtx_fmt_e (code, mode, copy_rtx (op0)), -@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target, - - temp = expand_binop (imode, ior_optab, op0, op1, - gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN); -- target = lowpart_subreg_maybe_copy (mode, temp, imode); -+ target = force_lowpart_subreg (mode, temp, imode); - } - - return target; --- -2.46.0 - diff --git a/cross/gcc-riscv64/gcc-go.post-install b/cross/gcc-riscv64/gcc-go.post-install deleted file mode 100644 index 6805fa7cf..000000000 --- a/cross/gcc-riscv64/gcc-go.post-install +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/sh - -cat 1>&2 < -Date: Sat, 3 Aug 2024 20:37:54 +0200 -Subject: [PATCH] libquadmath: Fix up libquadmath/math/sqrtq.c compilation in - some powerpc* configurations [PR116007] - -My PR114623 change started using soft-fp.h and quad.h for the sqrtq implementation. -Unfortunately, that seems to fail building in some powerpc* configurations, where -TFmode isn't available. -quad.h has: - #ifndef TFtype - typedef float TFtype __attribute__ ((mode (TF))); - #endif -and uses TFtype. quad.h has: - /* Define the complex type corresponding to __float128 - ("_Complex __float128" is not allowed) */ - #if (!defined(_ARCH_PPC)) || defined(__LONG_DOUBLE_IEEE128__) - typedef _Complex float __attribute__((mode(TC))) __complex128; - #else - typedef _Complex float __attribute__((mode(KC))) __complex128; - #endif -with the conditional and KCmode use added during porting of libquadmath -to powerpc*, so I've just defined TFtype for powerpc when __LONG_DOUBLE_IEEE128__ -isn't defined; I could define it to float __attribute__ ((mode (KF))) but it -seemed easier to just define it to __float128 which should do the same thing. - -2024-08-03 Jakub Jelinek - - PR target/116007 - * math/sqrtq.c (TFtype): For PowerPC without __LONG_DOUBLE_IEEE128__ - define to __float128 before including soft-fp.h and quad.h. - -(cherry picked from commit 3ac02e67503ccffa3dfeeffc0a60fce6bdaca43b) ---- - libquadmath/math/sqrtq.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/libquadmath/math/sqrtq.c b/libquadmath/math/sqrtq.c -index 8ca2828d42ce..a58998a06670 100644 ---- a/libquadmath/math/sqrtq.c -+++ b/libquadmath/math/sqrtq.c -@@ -9,6 +9,9 @@ - && defined(FE_TOWARDZERO) \ - && defined(FE_INEXACT) - #define USE_SOFT_FP 1 -+#if defined(_ARCH_PPC) && !defined(__LONG_DOUBLE_IEEE128__) -+#define TFtype __float128 -+#endif - #include "../../libgcc/soft-fp/soft-fp.h" - #include "../../libgcc/soft-fp/quad.h" - #endif --- -2.43.5 - diff --git a/cross/gcc-riscv64/riscv64-improve-build-time.patch b/cross/gcc-riscv64/riscv64-improve-build-time.patch deleted file mode 100644 index 2c8c52a2c..000000000 --- a/cross/gcc-riscv64/riscv64-improve-build-time.patch +++ /dev/null @@ -1,149 +0,0 @@ -Patch-Source: https://gcc.gnu.org/git/?p=gcc.git;a=patch;h=2cf89ae83225f932b226cd57ef2d083a59bcf8a3 --- -From 2cf89ae83225f932b226cd57ef2d083a59bcf8a3 Mon Sep 17 00:00:00 2001 -From: Richard Biener -Date: Tue, 6 Aug 2024 14:56:26 +0200 -Subject: [PATCH] tree-optimization/116166 - forward jump-threading going wild - -Currently the forward threader isn't limited as to the search space -it explores and with it now using path-ranger for simplifying -conditions it runs into it became pretty slow for degenerate cases -like compiling insn-emit.cc for RISC-V esp. when compiling for -a host with LOGICAL_OP_NON_SHORT_CIRCUIT disabled. - -The following makes the forward threader honor the search space -limit I introduced for the backward threader. This reduces -compile-time from minutes to seconds for the testcase in PR116166. - -Note this wasn't necessary before we had ranger but with ranger -the work we do is quadatic in the length of the threading path -we build up (the same is true for the backwards threader). - - PR tree-optimization/116166 - * tree-ssa-threadedge.h (jump_threader::thread_around_empty_blocks): - Add limit parameter. - (jump_threader::thread_through_normal_block): Likewise. - * tree-ssa-threadedge.cc (jump_threader::thread_around_empty_blocks): - Honor and decrement limit parameter. - (jump_threader::thread_through_normal_block): Likewise. - (jump_threader::thread_across_edge): Initialize limit from - param_max_jump_thread_paths and pass it down to workers. ---- - gcc/tree-ssa-threadedge.cc | 30 ++++++++++++++++++++++-------- - gcc/tree-ssa-threadedge.h | 4 ++-- - 2 files changed, 24 insertions(+), 10 deletions(-) - -diff --git a/gcc/tree-ssa-threadedge.cc b/gcc/tree-ssa-threadedge.cc -index 7f82639b8ecc..0aa2aa851430 100644 ---- a/gcc/tree-ssa-threadedge.cc -+++ b/gcc/tree-ssa-threadedge.cc -@@ -786,13 +786,17 @@ propagate_threaded_block_debug_into (basic_block dest, basic_block src) - bool - jump_threader::thread_around_empty_blocks (vec *path, - edge taken_edge, -- bitmap visited) -+ bitmap visited, unsigned &limit) - { - basic_block bb = taken_edge->dest; - gimple_stmt_iterator gsi; - gimple *stmt; - tree cond; - -+ if (limit == 0) -+ return false; -+ --limit; -+ - /* The key property of these blocks is that they need not be duplicated - when threading. Thus they cannot have visible side effects such - as PHI nodes. */ -@@ -830,7 +834,8 @@ jump_threader::thread_around_empty_blocks (vec *path, - m_registry->push_edge (path, taken_edge, EDGE_NO_COPY_SRC_BLOCK); - m_state->append_path (taken_edge->dest); - bitmap_set_bit (visited, taken_edge->dest->index); -- return thread_around_empty_blocks (path, taken_edge, visited); -+ return thread_around_empty_blocks (path, taken_edge, visited, -+ limit); - } - } - -@@ -872,7 +877,7 @@ jump_threader::thread_around_empty_blocks (vec *path, - m_registry->push_edge (path, taken_edge, EDGE_NO_COPY_SRC_BLOCK); - m_state->append_path (taken_edge->dest); - -- thread_around_empty_blocks (path, taken_edge, visited); -+ thread_around_empty_blocks (path, taken_edge, visited, limit); - return true; - } - -@@ -899,8 +904,13 @@ jump_threader::thread_around_empty_blocks (vec *path, - - int - jump_threader::thread_through_normal_block (vec *path, -- edge e, bitmap visited) -+ edge e, bitmap visited, -+ unsigned &limit) - { -+ if (limit == 0) -+ return 0; -+ limit--; -+ - m_state->register_equivs_edge (e); - - /* PHIs create temporary equivalences. -@@ -989,7 +999,7 @@ jump_threader::thread_through_normal_block (vec *path, - visited. This may be overly conservative. */ - bitmap_set_bit (visited, dest->index); - bitmap_set_bit (visited, e->dest->index); -- thread_around_empty_blocks (path, taken_edge, visited); -+ thread_around_empty_blocks (path, taken_edge, visited, limit); - return 1; - } - } -@@ -1075,9 +1085,12 @@ jump_threader::thread_across_edge (edge e) - bitmap_set_bit (visited, e->src->index); - bitmap_set_bit (visited, e->dest->index); - -+ /* Limit search space. */ -+ unsigned limit = param_max_jump_thread_paths; -+ - int threaded = 0; - if ((e->flags & EDGE_DFS_BACK) == 0) -- threaded = thread_through_normal_block (path, e, visited); -+ threaded = thread_through_normal_block (path, e, visited, limit); - - if (threaded > 0) - { -@@ -1148,11 +1161,12 @@ jump_threader::thread_across_edge (edge e) - m_registry->push_edge (path, e, EDGE_START_JUMP_THREAD); - m_registry->push_edge (path, taken_edge, EDGE_COPY_SRC_JOINER_BLOCK); - -- found = thread_around_empty_blocks (path, taken_edge, visited); -+ found = thread_around_empty_blocks (path, taken_edge, visited, limit); - - if (!found) - found = thread_through_normal_block (path, -- path->last ()->e, visited) > 0; -+ path->last ()->e, visited, -+ limit) > 0; - - /* If we were able to thread through a successor of E->dest, then - record the jump threading opportunity. */ -diff --git a/gcc/tree-ssa-threadedge.h b/gcc/tree-ssa-threadedge.h -index 9f6cbfe93307..245b3506a550 100644 ---- a/gcc/tree-ssa-threadedge.h -+++ b/gcc/tree-ssa-threadedge.h -@@ -101,9 +101,9 @@ private: - unsigned limit); - - bool thread_around_empty_blocks (vec *path, -- edge, bitmap visited); -+ edge, bitmap visited, unsigned &limit); - int thread_through_normal_block (vec *path, -- edge, bitmap visited); -+ edge, bitmap visited, unsigned &limit); - void thread_across_edge (edge); - bool record_temporary_equivalences_from_phis (edge); - gimple *record_temporary_equivalences_from_stmts_at_dest (edge); --- -2.43.5 - diff --git a/cross/gcc-x86/0002-gcc-poison-system-directories.patch b/cross/gcc-x86/0002-gcc-poison-system-directories.patch index 84c80c95b..9a1671267 100644 --- a/cross/gcc-x86/0002-gcc-poison-system-directories.patch +++ b/cross/gcc-x86/0002-gcc-poison-system-directories.patch @@ -25,11 +25,9 @@ Upstream-Status: Pending gcc/incpath.cc | 21 +++++++++++++++++++++ 7 files changed, 68 insertions(+) -diff --git a/gcc/common.opt b/gcc/common.opt -index 862c474d3c8..64c4277c991 100644 --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -711,6 +711,10 @@ Wreturn-local-addr +@@ -715,6 +715,10 @@ Wreturn-local-addr Common Var(warn_return_local_addr) Init(1) Warning Warn about returning a pointer/reference to a local or temporary variable. @@ -40,11 +38,9 @@ index 862c474d3c8..64c4277c991 100644 Wshadow Common Var(warn_shadow) Warning Warn when one variable shadows another. Same as -Wshadow=global. -diff --git a/gcc/config.in b/gcc/config.in -index 4cad077bfbe..0679fbbf4c6 100644 --- a/gcc/config.in +++ b/gcc/config.in -@@ -236,6 +236,12 @@ +@@ -249,6 +249,12 @@ #endif @@ -57,19 +53,17 @@ index 4cad077bfbe..0679fbbf4c6 100644 /* Define if you want all operations on RTL (the basic data structure of the optimizer and back end) to be checked for dynamic type safety at runtime. This is quite expensive. */ -diff --git a/gcc/configure b/gcc/configure -index c7b26d1927d..8c46369f73f 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -1026,6 +1026,7 @@ enable_maintainer_mode +@@ -1050,6 +1050,7 @@ enable_maintainer_mode enable_link_mutex enable_link_serialization enable_version_specific_runtime_libs +enable_poison_system_directories enable_plugin enable_host_shared - enable_libquadmath_support -@@ -1788,6 +1789,8 @@ Optional Features: + enable_host_pie +@@ -1823,6 +1824,8 @@ Optional Features: --enable-version-specific-runtime-libs specify that runtime libraries should be installed in a compiler-specific directory @@ -77,8 +71,8 @@ index c7b26d1927d..8c46369f73f 100755 + warn for use of native system header directories --enable-plugin enable plugin support --enable-host-shared build host code as shared libraries - --disable-libquadmath-support -@@ -31753,6 +31756,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : + --enable-host-pie build host code as PIE +@@ -34082,6 +34085,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : fi @@ -98,11 +92,9 @@ index c7b26d1927d..8c46369f73f 100755 # Substitute configuration variables -diff --git a/gcc/configure.ac b/gcc/configure.ac -index 09082e8ccae..5504bf6eb01 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -7292,6 +7292,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs, +@@ -7555,6 +7555,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs, [specify that runtime libraries should be installed in a compiler-specific directory])]) @@ -119,11 +111,9 @@ index 09082e8ccae..5504bf6eb01 100644 # Substitute configuration variables AC_SUBST(subdirs) AC_SUBST(srcdir) -diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index af0e5933fdb..b6731a4673c 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -384,6 +384,7 @@ Objective-C and Objective-C++ Dialects}. +@@ -391,6 +391,7 @@ Objective-C and Objective-C++ Dialects}. -Wpacked -Wno-packed-bitfield-compat -Wpacked-not-aligned -Wpadded -Wparentheses -Wno-pedantic-ms-format -Wpointer-arith -Wno-pointer-compare -Wno-pointer-to-int-cast @@ -131,7 +121,7 @@ index af0e5933fdb..b6731a4673c 100644 -Wno-pragmas -Wno-prio-ctor-dtor -Wredundant-decls -Wrestrict -Wno-return-local-addr -Wreturn-type -Wno-scalar-storage-order -Wsequence-point -@@ -8426,6 +8427,14 @@ made up of data only and thus requires no special treatment. But, for +@@ -8861,6 +8862,14 @@ made up of data only and thus requires no special treatment. But, for most targets, it is made up of code and thus requires the stack to be made executable in order for the program to work properly. @@ -146,12 +136,10 @@ index af0e5933fdb..b6731a4673c 100644 @opindex Wfloat-equal @opindex Wno-float-equal @item -Wfloat-equal -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 16bb07f2cdc..33b56e721d2 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -1177,6 +1187,8 @@ proper position among the other output files. */ - "-z now " \ +@@ -1163,6 +1163,8 @@ proper position among the other output files. */ + "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \ "%X %{o*} %{e*} %{N} %{n} %{r}\ %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \ + %{Wno-poison-system-directories:--no-poison-system-directories} \ @@ -159,8 +147,6 @@ index 16bb07f2cdc..33b56e721d2 100644 %{static|no-pie|static-pie:} %@{L*} %(link_libgcc) " \ VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \ %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\ -diff --git a/gcc/incpath.cc b/gcc/incpath.cc -index 4d44321183f..0f3f071b44c 100644 --- a/gcc/incpath.cc +++ b/gcc/incpath.cc @@ -26,6 +26,7 @@ @@ -198,6 +184,3 @@ index 4d44321183f..0f3f071b44c 100644 } /* Use given -I paths for #include "..." but not #include <...>, and --- -2.41.0 - diff --git a/cross/gcc-x86/0003-specs-turn-on-Wl-z-now-by-default.patch b/cross/gcc-x86/0003-specs-turn-on-Wl-z-now-by-default.patch index bfb0a6eba..33e8b56f1 100644 --- a/cross/gcc-x86/0003-specs-turn-on-Wl-z-now-by-default.patch +++ b/cross/gcc-x86/0003-specs-turn-on-Wl-z-now-by-default.patch @@ -13,11 +13,9 @@ now by default. gcc/gcc.cc | 1 + 2 files changed, 4 insertions(+) -diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index b6731a4673c..f393c7846c6 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -17961,6 +17961,9 @@ For example, @option{-Wl,-Map,output.map} passes @option{-Map output.map} to the +@@ -18935,6 +18935,9 @@ For example, @option{-Wl,-Map,output.map} passes @option{-Map output.map} to the linker. When using the GNU linker, you can also get the same effect with @option{-Wl,-Map=output.map}. @@ -27,11 +25,9 @@ index b6731a4673c..f393c7846c6 100644 @opindex u @item -u @var{symbol} Pretend the symbol @var{symbol} is undefined, to force linking of -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 33b56e721d2..f82fae23c22 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -1144,6 +1144,7 @@ proper position among the other output files. */ +@@ -1161,6 +1161,7 @@ proper position among the other output files. */ "%{flto|flto=*:%= 2, 0) @@ -20,7 +18,7 @@ index a75038930ae..b98726f33ed 100644 Warn about possible security problems with format functions. Wformat-signedness -@@ -725,7 +725,7 @@ C ObjC C++ ObjC++ Var(warn_format_zero_length) Warning LangEnabledBy(C ObjC C++ +@@ -799,7 +799,7 @@ C ObjC C++ ObjC++ Var(warn_format_zero_length) Warning LangEnabledBy(C ObjC C++ Warn about zero-length formats. Wformat= @@ -28,7 +26,4 @@ index a75038930ae..b98726f33ed 100644 +C ObjC C++ ObjC++ Joined RejectNegative UInteger Var(warn_format) Init(1) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall, 1, 0) IntegerRange(0, 2) Warn about printf/scanf/strftime/strfmon format string anomalies. - Wformat-overflow= --- -2.41.0 - + Wframe-address diff --git a/cross/gcc-x86/0007-Enable-Wtrampolines-by-default.patch b/cross/gcc-x86/0007-Enable-Wtrampolines-by-default.patch index eb7aae838..140685d7b 100644 --- a/cross/gcc-x86/0007-Enable-Wtrampolines-by-default.patch +++ b/cross/gcc-x86/0007-Enable-Wtrampolines-by-default.patch @@ -7,11 +7,9 @@ Subject: [PATCH 07/35] Enable -Wtrampolines by default. gcc/common.opt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/gcc/common.opt b/gcc/common.opt -index 64c4277c991..c24839d32bc 100644 --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -803,7 +803,7 @@ Common Var(warn_system_headers) Warning +@@ -811,7 +811,7 @@ Common Var(warn_system_headers) Warning Do not suppress warnings from system headers. Wtrampolines @@ -20,6 +18,3 @@ index 64c4277c991..c24839d32bc 100644 Warn whenever a trampoline is generated. Wtrivial-auto-var-init --- -2.41.0 - diff --git a/cross/gcc-x86/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch b/cross/gcc-x86/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch index 69c1bf725..e85284ff0 100644 --- a/cross/gcc-x86/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch +++ b/cross/gcc-x86/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch @@ -9,11 +9,9 @@ Subject: [PATCH 08/35] Disable ssp on -nostdlib, -nodefaultlibs and gcc/params.opt | 2 +- 2 files changed, 8 insertions(+), 2 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index da6417dd0d1..b5a6f200635 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -983,6 +983,12 @@ proper position among the other output files. */ +@@ -1000,6 +1000,12 @@ proper position among the other output files. */ #define LINK_GCC_C_SEQUENCE_SPEC "%G %{!nolibc:%L %G}" #endif @@ -26,20 +24,18 @@ index da6417dd0d1..b5a6f200635 100644 #ifndef LINK_SSP_SPEC #ifdef TARGET_LIBC_PROVIDES_SSP #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ -@@ -1282,7 +1288,7 @@ static const char *cc1_options = +@@ -1305,7 +1311,7 @@ static const char *cc1_options = %{-version:--version}\ %{-help=*:--help=%*}\ %{!fsyntax-only:%{S:%W{o*}%{!o*:-o %w%b.s}}}\ - %{fsyntax-only:-o %j} %{-param*}\ + %{fsyntax-only:-o %j} %{-param*} " NO_SSP_SPEC "\ %{coverage:-fprofile-arcs -ftest-coverage}\ - %{fprofile-arcs|fprofile-generate*|coverage:\ + %{fprofile-arcs|fcondition-coverage|fprofile-generate*|coverage:\ %{!fprofile-update=single:\ -diff --git a/gcc/params.opt b/gcc/params.opt -index 823cdb2ff85..5b096899b40 100644 --- a/gcc/params.opt +++ b/gcc/params.opt -@@ -1006,7 +1006,7 @@ Common Joined UInteger Var(param_ssa_name_def_chain_limit) Init(512) Param Optim +@@ -1013,7 +1013,7 @@ Common Joined UInteger Var(param_ssa_name_def_chain_limit) Init(512) Param Optim The maximum number of SSA_NAME assignments to follow in determining a value. -param=ssp-buffer-size= @@ -48,6 +44,3 @@ index 823cdb2ff85..5b096899b40 100644 The lower bound for a buffer to be considered for stack smashing protection. -param=stack-clash-protection-guard-size= --- -2.41.0 - diff --git a/cross/gcc-x86/0012-libgcc_s.patch b/cross/gcc-x86/0012-libgcc_s.patch index d8bbc602f..8189f8491 100644 --- a/cross/gcc-x86/0012-libgcc_s.patch +++ b/cross/gcc-x86/0012-libgcc_s.patch @@ -9,11 +9,9 @@ Subject: [PATCH 12/35] libgcc_s libgcc/config/i386/t-linux | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) -diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc -index 0d817fc3f3b..2e99db00db9 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc -@@ -12691,10 +12691,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, +@@ -13089,10 +13089,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, { case IX86_BUILTIN_CPU_INIT: { @@ -26,8 +24,6 @@ index 0d817fc3f3b..2e99db00db9 100644 call_expr = build_call_expr (fndecl, 0); return expand_expr (call_expr, target, mode, EXPAND_NORMAL); } -diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c -index 50b6d8248a2..724ced402a1 100644 --- a/libgcc/config/i386/cpuinfo.c +++ b/libgcc/config/i386/cpuinfo.c @@ -63,7 +63,7 @@ __cpu_indicator_init (void) @@ -41,8 +37,6 @@ index 50b6d8248a2..724ced402a1 100644 +int __cpu_indicator_init_local (void) + __attribute__ ((weak, alias ("__cpu_indicator_init"))); #endif -diff --git a/libgcc/config/i386/t-linux b/libgcc/config/i386/t-linux -index 8506a635790..564296f788e 100644 --- a/libgcc/config/i386/t-linux +++ b/libgcc/config/i386/t-linux @@ -3,5 +3,5 @@ @@ -52,6 +46,3 @@ index 8506a635790..564296f788e 100644 -HOST_LIBGCC2_CFLAGS += -mlong-double-80 -DUSE_ELF_SYMVER $(CET_FLAGS) +HOST_LIBGCC2_CFLAGS += -mlong-double-80 $(CET_FLAGS) CRTSTUFF_T_CFLAGS += $(CET_FLAGS) --- -2.41.0 - diff --git a/cross/gcc-x86/0013-nopie.patch b/cross/gcc-x86/0013-nopie.patch index 6578ee110..4a9ea0770 100644 --- a/cross/gcc-x86/0013-nopie.patch +++ b/cross/gcc-x86/0013-nopie.patch @@ -4,15 +4,13 @@ Date: Sat, 7 Nov 2015 02:08:05 +0000 Subject: [PATCH 13/35] nopie --- - gcc/configure | 27 +++++++++++++++++++++++++++ - gcc/configure.ac | 13 +++++++++++++ - 2 files changed, 40 insertions(+) + gcc/configure | 25 +++++++++++++++++++++++++ + gcc/configure.ac | 11 +++++++++++ + 2 files changed, 36 insertions(+) -diff --git a/gcc/configure b/gcc/configure -index 23da7d55d..f38732bb2 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -34534,6 +34534,29 @@ rm -f core conftest.err conftest.$ac_objext \ +@@ -34606,6 +34606,29 @@ rm -f core conftest.err conftest.$ac_objext \ fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_no_pie" >&5 $as_echo "$gcc_cv_no_pie" >&6; } @@ -42,7 +40,7 @@ index 23da7d55d..f38732bb2 100755 if test x$enable_host_shared = xyes; then PICFLAG=-fPIC -@@ -34551,6 +34574,8 @@ if test x$enable_host_pie = xyes; then +@@ -34623,6 +34646,8 @@ if test x$enable_host_pie = xyes; then LD_PICFLAG=-pie elif test x$gcc_cv_no_pie = xyes; then LD_PICFLAG=-no-pie @@ -51,11 +49,9 @@ index 23da7d55d..f38732bb2 100755 else LD_PICFLAG= fi -diff --git a/gcc/configure.ac b/gcc/configure.ac -index d7cf0b92c..db2e2c802 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -7781,6 +7781,15 @@ AC_CACHE_CHECK([for -no-pie option], +@@ -7821,6 +7821,15 @@ AC_CACHE_CHECK([for -no-pie option], [gcc_cv_no_pie=yes], [gcc_cv_no_pie=no]) LDFLAGS="$saved_LDFLAGS"]) @@ -71,7 +67,7 @@ index d7cf0b92c..db2e2c802 100644 if test x$enable_host_shared = xyes; then PICFLAG=-fPIC -@@ -7798,6 +7807,8 @@ if test x$enable_host_pie = xyes; then +@@ -7838,6 +7847,8 @@ if test x$enable_host_pie = xyes; then LD_PICFLAG=-pie elif test x$gcc_cv_no_pie = xyes; then LD_PICFLAG=-no-pie @@ -80,6 +76,3 @@ index d7cf0b92c..db2e2c802 100644 else LD_PICFLAG= fi --- -2.41.0 - diff --git a/cross/gcc-x86/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch b/cross/gcc-x86/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch index 937cad8a7..ddea4a05b 100644 --- a/cross/gcc-x86/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch +++ b/cross/gcc-x86/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch @@ -7,11 +7,9 @@ Subject: [PATCH 15/35] build: fix CXXFLAGS_FOR_BUILD passing Makefile.in | 1 + 1 file changed, 1 insertion(+) -diff --git a/Makefile.in b/Makefile.in -index 06a9398e172..6ff2b3f9925 100644 --- a/Makefile.in +++ b/Makefile.in -@@ -178,6 +178,7 @@ BUILD_EXPORTS = \ +@@ -179,6 +179,7 @@ BUILD_EXPORTS = \ # built for the build system to override those in BASE_FLAGS_TO_PASS. EXTRA_BUILD_FLAGS = \ CFLAGS="$(CFLAGS_FOR_BUILD)" \ @@ -19,6 +17,3 @@ index 06a9398e172..6ff2b3f9925 100644 LDFLAGS="$(LDFLAGS_FOR_BUILD)" # This is the list of directories to built for the host system. --- -2.41.0 - diff --git a/cross/gcc-x86/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch b/cross/gcc-x86/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch index 96972482c..4796a055d 100644 --- a/cross/gcc-x86/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch +++ b/cross/gcc-x86/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch @@ -12,11 +12,9 @@ Subject: [PATCH 17/35] Alpine musl package provides libssp_nonshared.a. We gcc/gcc.cc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index b5a6f200635..6cbb726599b 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -991,8 +991,7 @@ proper position among the other output files. */ +@@ -1008,8 +1008,7 @@ proper position among the other output files. */ #ifndef LINK_SSP_SPEC #ifdef TARGET_LIBC_PROVIDES_SSP @@ -26,6 +24,3 @@ index b5a6f200635..6cbb726599b 100644 #else #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ "|fstack-protector-strong|fstack-protector-explicit" \ --- -2.41.0 - diff --git a/cross/gcc-x86/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch b/cross/gcc-x86/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch index a9612913e..b829e5b34 100644 --- a/cross/gcc-x86/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch +++ b/cross/gcc-x86/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch @@ -8,11 +8,9 @@ Subject: [PATCH 18/35] DP: Use --push-state/--pop-state for gold as well when gcc/gcc.cc | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 6cbb726599b..59390fd39d6 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -755,10 +755,10 @@ proper position among the other output files. */ +@@ -772,10 +772,10 @@ proper position among the other output files. */ #define LIBASAN_SPEC STATIC_LIBASAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBASAN_SPEC "%{static-libasan:" LD_STATIC_OPTION "}" \ @@ -25,7 +23,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBASAN_LIBS #else #define LIBASAN_SPEC "-lasan" STATIC_LIBASAN_LIBS -@@ -794,10 +794,10 @@ proper position among the other output files. */ +@@ -811,10 +811,10 @@ proper position among the other output files. */ #define LIBTSAN_SPEC STATIC_LIBTSAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBTSAN_SPEC "%{static-libtsan:" LD_STATIC_OPTION "}" \ @@ -38,7 +36,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBTSAN_LIBS #else #define LIBTSAN_SPEC "-ltsan" STATIC_LIBTSAN_LIBS -@@ -815,10 +815,10 @@ proper position among the other output files. */ +@@ -832,10 +832,10 @@ proper position among the other output files. */ #define LIBLSAN_SPEC STATIC_LIBLSAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBLSAN_SPEC "%{static-liblsan:" LD_STATIC_OPTION "}" \ @@ -51,7 +49,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBLSAN_LIBS #else #define LIBLSAN_SPEC "-llsan" STATIC_LIBLSAN_LIBS -@@ -834,10 +834,10 @@ proper position among the other output files. */ +@@ -851,10 +851,10 @@ proper position among the other output files. */ " %{static-libubsan|static:%:include(libsanitizer.spec)%(link_libubsan)}" #ifdef HAVE_LD_STATIC_DYNAMIC #define LIBUBSAN_SPEC "%{static-libubsan:" LD_STATIC_OPTION "}" \ @@ -64,6 +62,3 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBUBSAN_LIBS #else #define LIBUBSAN_SPEC "-lubsan" STATIC_LIBUBSAN_LIBS --- -2.41.0 - diff --git a/cross/gcc-x86/0023-riscv-disable-multilib-support.patch b/cross/gcc-x86/0023-riscv-disable-multilib-support.patch index 49916376f..eb9ba90fc 100644 --- a/cross/gcc-x86/0023-riscv-disable-multilib-support.patch +++ b/cross/gcc-x86/0023-riscv-disable-multilib-support.patch @@ -42,11 +42,9 @@ library. gcc/config/riscv/t-linux | 7 +++++-- 2 files changed, 5 insertions(+), 10 deletions(-) -diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h -index f8c2c351e5a..8d9881eadeb 100644 --- a/gcc/config/riscv/linux.h +++ b/gcc/config/riscv/linux.h -@@ -60,11 +60,3 @@ along with GCC; see the file COPYING3. If not see +@@ -61,11 +61,3 @@ along with GCC; see the file COPYING3. If not see %{rdynamic:-export-dynamic} \ -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \ %{static:-static} %{static-pie:-static -pie --no-dynamic-linker -z text}}" @@ -58,11 +56,9 @@ index f8c2c351e5a..8d9881eadeb 100644 - "/usr/lib/ " - -#define RISCV_USE_CUSTOMISED_MULTI_LIB select_by_abi -diff --git a/gcc/config/riscv/t-linux b/gcc/config/riscv/t-linux -index 216d2776a18..1a8a863853e 100644 --- a/gcc/config/riscv/t-linux +++ b/gcc/config/riscv/t-linux -@@ -1,3 +1,6 @@ +@@ -1,5 +1,8 @@ -# Only XLEN and ABI affect Linux multilib dir names, e.g. /lib32/ilp32d/ -MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib64,$(MULTILIB_DIRNAMES))) +MULTILIB_OPTIONS := march=rv64gc @@ -71,6 +67,5 @@ index 216d2776a18..1a8a863853e 100644 +MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib,$(MULTILIB_DIRNAMES))) MULTILIB_OSDIRNAMES := $(patsubst lib%,../lib%,$(MULTILIB_DIRNAMES)) +MULTILIB_MATCHES := march?rv64gc=march?rv64imafdc --- -2.41.0 - + + MULTIARCH_DIRNAME := $(call if_multiarch,$(firstword $(subst -, ,$(target)))-linux-gnu) diff --git a/cross/gcc-x86/0024-always-build-libgcc_eh.a.patch b/cross/gcc-x86/0024-always-build-libgcc_eh.a.patch index 6b0514e98..5d508ea08 100644 --- a/cross/gcc-x86/0024-always-build-libgcc_eh.a.patch +++ b/cross/gcc-x86/0024-always-build-libgcc_eh.a.patch @@ -9,11 +9,9 @@ highly inspired by: libgcc/Makefile.in | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) -diff --git a/libgcc/Makefile.in b/libgcc/Makefile.in -index 6c4dc79ab71..023cede18a7 100644 --- a/libgcc/Makefile.in +++ b/libgcc/Makefile.in -@@ -960,8 +960,9 @@ ifneq ($(LIBUNWIND),) +@@ -967,8 +967,9 @@ ifneq ($(LIBUNWIND),) all: libunwind.a endif @@ -24,7 +22,7 @@ index 6c4dc79ab71..023cede18a7 100644 ifneq ($(LIBUNWIND),) all: libunwind$(SHLIB_EXT) libgcc_s$(SHLIB_EXT): libunwind$(SHLIB_EXT) -@@ -1163,10 +1164,6 @@ install-libunwind: +@@ -1173,10 +1174,6 @@ install-libunwind: install-shared: $(mkinstalldirs) $(DESTDIR)$(inst_libdir) @@ -35,7 +33,7 @@ index 6c4dc79ab71..023cede18a7 100644 $(subst @multilib_dir@,$(MULTIDIR),$(subst \ @shlib_base_name@,libgcc_s,$(subst \ @shlib_slibdir_qual@,$(MULTIOSSUBDIR),$(SHLIB_INSTALL)))) -@@ -1183,6 +1180,10 @@ ifeq ($(enable_gcov),yes) +@@ -1193,6 +1190,10 @@ ifeq ($(enable_gcov),yes) $(RANLIB) $(DESTDIR)$(inst_libdir)/libgcov.a endif @@ -46,6 +44,3 @@ index 6c4dc79ab71..023cede18a7 100644 parts="$(INSTALL_PARTS)"; \ for file in $$parts; do \ rm -f $(DESTDIR)$(inst_libdir)/$$file; \ --- -2.41.0 - diff --git a/cross/gcc-x86/0026-ada-musl-support-fixes.patch b/cross/gcc-x86/0026-ada-musl-support-fixes.patch index 91a8268ab..0be683fa6 100644 --- a/cross/gcc-x86/0026-ada-musl-support-fixes.patch +++ b/cross/gcc-x86/0026-ada-musl-support-fixes.patch @@ -10,8 +10,6 @@ Subject: [PATCH 26/35] ada: musl support fixes gcc/ada/terminals.c | 8 ++++---- 4 files changed, 35 insertions(+), 33 deletions(-) -diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl -index 32cbdb692..463028fbe 100644 --- a/gcc/ada/Makefile.rtl +++ b/gcc/ada/Makefile.rtl @@ -1558,7 +1558,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),) @@ -23,7 +21,7 @@ index 32cbdb692..463028fbe 100644 a-exetim.adb&5 $as_echo_n "checking for library containing swapcontext... " >&6; } -diff --git a/libphobos/m4/druntime/libraries.m4 b/libphobos/m4/druntime/libraries.m4 -index 45a56f6f76a..fef6e890b1e 100644 --- a/libphobos/m4/druntime/libraries.m4 +++ b/libphobos/m4/druntime/libraries.m4 @@ -220,14 +220,6 @@ AC_DEFUN([DRUNTIME_LIBRARIES_UCONTEXT], @@ -49,6 +45,3 @@ index 45a56f6f76a..fef6e890b1e 100644 if test "$druntime_fiber_asm_external" = no; then AC_SEARCH_LIBS([swapcontext], [c ucontext], [], AC_MSG_ERROR([swapcontext required but not found])) --- -2.41.0 - diff --git a/cross/gcc-x86/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch b/cross/gcc-x86/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch index e1679a8e5..b53e5847d 100644 --- a/cross/gcc-x86/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch +++ b/cross/gcc-x86/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch @@ -7,11 +7,9 @@ Subject: [PATCH 32/35] libgnat: time_t is always 64-bit on musl libc gcc/ada/libgnat/s-parame.ads | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/gcc/ada/libgnat/s-parame.ads b/gcc/ada/libgnat/s-parame.ads -index 3d6e345a1ba..cfe0b4d3ca6 100644 --- a/gcc/ada/libgnat/s-parame.ads +++ b/gcc/ada/libgnat/s-parame.ads -@@ -102,7 +102,7 @@ package System.Parameters is +@@ -100,7 +100,7 @@ package System.Parameters is -- Characteristics of time_t type -- ------------------------------------ @@ -20,6 +18,3 @@ index 3d6e345a1ba..cfe0b4d3ca6 100644 -- Number of bits in type time_t ---------------------------------------------- --- -2.41.0 - diff --git a/cross/gcc-x86/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch b/cross/gcc-x86/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch deleted file mode 100644 index bc3c4a6ac..000000000 --- a/cross/gcc-x86/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 4d0a333ef13e2da140cd44c4941b20f48a80dc0f Mon Sep 17 00:00:00 2001 -From: Hannes Braun -Date: Thu, 20 Feb 2025 15:09:41 +0100 -Subject: [PATCH] arm: Fix signedness of vld1q intrinsic parms [PR118942] - -vld1q_s8_x3, vld1q_s16_x3, vld1q_s8_x4 and vld1q_s16_x4 were expecting -pointers to unsigned integers. These parameters should be pointers to -signed integers. - -gcc/ChangeLog: - PR target/118942 - * config/arm/arm_neon.h (vld1q_s8_x3): Use int8_t instead of - uint16_t. - (vld1q_s16_x3): Use int16_t instead of uint16_t. - (vld1q_s8_x4): Likewise. - (vld1q_s16_x4): Likewise. - -gcc/testsuite/ChangeLog: - PR target/118942 - * gcc.target/arm/simd/vld1q_base_xN_1.c: Add -Wpointer-sign. - -Signed-off-by: Hannes Braun ---- - gcc/config/arm/arm_neon.h | 8 ++++---- - gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c | 2 +- - 2 files changed, 5 insertions(+), 5 deletions(-) - -diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h -index 5b1c55c8d9f..578ada88fa6 100644 ---- a/gcc/config/arm/arm_neon.h -+++ b/gcc/config/arm/arm_neon.h -@@ -10854,7 +10854,7 @@ vld1q_s64_x2 (const int64_t * __a) - - __extension__ extern __inline int8x16x3_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s8_x3 (const uint8_t * __a) -+vld1q_s8_x3 (const int8_t * __a) - { - union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a); -@@ -10863,7 +10863,7 @@ vld1q_s8_x3 (const uint8_t * __a) - - __extension__ extern __inline int16x8x3_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s16_x3 (const uint16_t * __a) -+vld1q_s16_x3 (const int16_t * __a) - { - union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a); -@@ -10890,7 +10890,7 @@ vld1q_s64_x3 (const int64_t * __a) - - __extension__ extern __inline int8x16x4_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s8_x4 (const uint8_t * __a) -+vld1q_s8_x4 (const int8_t * __a) - { - union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x4v16qi ((const __builtin_neon_qi *) __a); -@@ -10899,7 +10899,7 @@ vld1q_s8_x4 (const uint8_t * __a) - - __extension__ extern __inline int16x8x4_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s16_x4 (const uint16_t * __a) -+vld1q_s16_x4 (const int16_t * __a) - { - union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x4v8hi ((const __builtin_neon_hi *) __a); -diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -index 01b29b60084..c73afe2b723 100644 ---- a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -+++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -@@ -1,6 +1,6 @@ - /* { dg-do assemble } */ - /* { dg-require-effective-target arm_neon_ok } */ --/* { dg-options "-save-temps -O2" } */ -+/* { dg-options "-save-temps -O2 -Wpointer-sign" } */ - /* { dg-add-options arm_neon } */ - - #include "arm_neon.h" --- -2.48.1 - diff --git a/cross/gcc-x86/APKBUILD b/cross/gcc-x86/APKBUILD index 0c9f2a691..9a3241ccc 100644 --- a/cross/gcc-x86/APKBUILD +++ b/cross/gcc-x86/APKBUILD @@ -24,7 +24,7 @@ CBUILDROOT="/" _cross_configure="--disable-bootstrap --with-sysroot=/usr/$CTARGET" pkgname=gcc-x86 -pkgver=14.2.0 +pkgver=14.3.0 # i.e. 13.2.1, must match gcc/BASE-VER _pkgbase="${pkgver%%_git*}" # date component from snapshots @@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}" [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target="" pkgname=gcc-x86 -pkgrel=6 +pkgrel=1 pkgdesc="Stage2 cross-compiler for x86" url="https://gcc.gnu.org" arch="x86_64" @@ -278,10 +278,6 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz 0034-libgo-fix-lfs64-use.patch 0035-loongarch-disable-multilib-support.patch 0036-libphobos-add-riscv64-and-loongarch64-support.patch - 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch - fix-arm64.patch - ppc64le-quadmath.patch - riscv64-improve-build-time.patch " # secfixes: @@ -291,8 +287,8 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz # we build out-of-tree #builddir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap builddir="$srcdir"/gcc-$_pkgbase -_gcclibdir="/usr/lib/gcc/$CTARGET/$_pkgbase" -_gcclibexec="/usr/libexec/gcc/$CTARGET/$_pkgbase" +_gcclibdir="usr/lib/gcc/$CTARGET/$_pkgbase" +_gcclibexec="usr/libexec/gcc/$CTARGET/$_pkgbase" prepare() { default_prepare @@ -319,7 +315,7 @@ build() { i586-*-*-*) _arch_configure="--with-arch=pentium-m --with-fpmath=sse --with-tune=generic --enable-cld";; s390x-*-*-*) _arch_configure="--with-arch=z196 --with-tune=zEC12 --with-zarch --with-long-double-128 --enable-decimal-float";; riscv64-*-*-*) _arch_configure="--with-arch=rv64gc --with-abi=lp64d --enable-autolink-libatomic";; - loongarch64-*-*-*) _arch_configure="--with-arch=la64v1.0 --with-abi=lp64d";; + loongarch64-*-*-*) _arch_configure="--with-arch=la64v1.0 --with-abi=lp64d";; esac case "$CTARGET_ARCH" in @@ -431,6 +427,11 @@ package() { [ "$CHOST" = "$CTARGET" ] && ln -s gcc "$pkgdir"/usr/bin/cc ln -s ${CTARGET}-gcc "$pkgdir"/usr/bin/${CTARGET}-cc + # symlink to vendor-less target triple for + # supporting clang --target's fallback match + # ref: https://gitlab.alpinelinux.org/alpine/aports/-/issues/16828 + ln -s "$CTARGET" "$pkgdir/usr/lib/gcc/${CTARGET%%-*}-${CTARGET#*-*-}" + if $LANG_JIT; then make -C "$_builddir"/libgccjit-build/gcc DESTDIR="$pkgdir" jit.install-common fi @@ -487,8 +488,6 @@ package() { # libcc1 does not depend on target, don't ship it rm -rf "$pkgdir"/usr/lib/libcc1.so* - # These are moved into packages with arch=$CTARGET_ARCH so remove - # cross prefix (doesn't exist when BOOTSTRAP=nolibc) # fixup gcc library symlinks to be linker scripts so # linker finds the libs from relocated sysroot @@ -663,7 +662,6 @@ libgo() { go() { pkgdesc="GCC Go frontend (intended for bootstrapping community/go)" depends="gcc=$_gccrel libgo=$_gccrel !go" - install="$pkgname-go.post-install" amove usr/lib/go amove usr/bin/*go @@ -747,45 +745,41 @@ gdb() { } sha512sums=" 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c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0761e16eec77ba2c1ca921fb7d7bc1e040fc3703fc9559e75 0033-libphobos-do-not-use-LFS64-symbols.patch c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c 0034-libgo-fix-lfs64-use.patch 65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3 0035-loongarch-disable-multilib-support.patch 06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453 0036-libphobos-add-riscv64-and-loongarch64-support.patch -a30148fb2cfa9a5800df4aed73f6b1b3b5d5817d768835a2574216f5818e6d6070199bacfe964f0d15b70eab7e2310c40b55e354f65360efce90e15d40287639 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch -00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f fix-arm64.patch -815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9 ppc64le-quadmath.patch -ea55e0fa6813fc95c4ca2e87f059182edc54dc61515ebb92bf6eb31dbbd176d0fe81edcc7ea28d32f84ca37e8d48a544623d3d9bc94aa41ffc0859326a616aa2 riscv64-improve-build-time.patch " diff --git a/cross/gcc-x86/fix-arm64.patch b/cross/gcc-x86/fix-arm64.patch deleted file mode 100644 index 8aaa9f742..000000000 --- a/cross/gcc-x86/fix-arm64.patch +++ /dev/null @@ -1,544 +0,0 @@ -From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Thu, 13 Jun 2024 12:48:21 +0100 -Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464] - -The testcase extracts one arm_neon.h vector from a pair (one subreg) -and then reinterprets the result as an SVE vector (another subreg). -Each subreg makes sense individually, but we can't fold them together -into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes, -but the interpretation of 32 bytes -> 16*N bytes depends on -whether N==1 or N>1. - -Since the second subreg makes sense individually, simplify_subreg -should bail out rather than ICE on it. simplify_gen_subreg will -then do the same (because it already checks validate_subreg). -This leaves simplify_gen_subreg returning null, requiring the -caller to take appropriate action. - -I think this is relatively likely to occur elsewhere, so the patch -adds a helper for forcing a subreg, allowing a temporary pseudo to -be created where necessary. - -I'll follow up by using force_subreg in more places. This patch -is intended to be a minimal backportable fix for the PR. - -gcc/ - PR target/115464 - * simplify-rtx.cc (simplify_context::simplify_subreg): Don't try - to fold two subregs together if their relationship isn't known - at compile time. - * explow.h (force_subreg): Declare. - * explow.cc (force_subreg): New function. - * config/aarch64/aarch64-sve-builtins-base.cc - (svset_neonq_impl::expand): Use it instead of simplify_gen_subreg. - -gcc/testsuite/ - PR target/115464 - * gcc.target/aarch64/sve/acle/general/pr115464.c: New test. - -(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0) ---- - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- - gcc/explow.cc | 15 +++++++++++++++ - gcc/explow.h | 2 ++ - gcc/simplify-rtx.cc | 5 +++++ - .../aarch64/sve/acle/general/pr115464.c | 13 +++++++++++++ - 5 files changed, 36 insertions(+), 1 deletion(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c - -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index 0d2edf3f19e..c9182594bc1 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1174,7 +1174,7 @@ public: - Advanced SIMD argument as an SVE vector. */ - if (!BYTES_BIG_ENDIAN - && is_undef (CALL_EXPR_ARG (e.call_expr, 0))) -- return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0); -+ return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0); - - rtx_vector_builder builder (VNx16BImode, 16, 2); - for (unsigned int i = 0; i < 16; i++) -diff --git a/gcc/explow.cc b/gcc/explow.cc -index 8e5f6b8e680..f6843398c4b 100644 ---- a/gcc/explow.cc -+++ b/gcc/explow.cc -@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x) - return temp; - } - -+/* Like simplify_gen_subreg, but force OP into a new register if the -+ subreg cannot be formed directly. */ -+ -+rtx -+force_subreg (machine_mode outermode, rtx op, -+ machine_mode innermode, poly_uint64 byte) -+{ -+ rtx x = simplify_gen_subreg (outermode, op, innermode, byte); -+ if (x) -+ return x; -+ -+ op = copy_to_mode_reg (innermode, op); -+ return simplify_gen_subreg (outermode, op, innermode, byte); -+} -+ - /* If X is a memory ref, copy its contents to a new temp reg and return - that reg. Otherwise, return X. */ - -diff --git a/gcc/explow.h b/gcc/explow.h -index 16aa02cfb68..cbd1fcb7eb3 100644 ---- a/gcc/explow.h -+++ b/gcc/explow.h -@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode); - Args are mode (in case value is a constant) and the value. */ - extern rtx force_reg (machine_mode, rtx); - -+extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64); -+ - /* Return given rtx, copied into a new temp reg if it was in memory. */ - extern rtx force_not_mem (rtx); - -diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc -index dceaa13333c..729d408aa55 100644 ---- a/gcc/simplify-rtx.cc -+++ b/gcc/simplify-rtx.cc -@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op, - poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode); - rtx newx; - -+ /* Make sure that the relationship between the two subregs is -+ known at compile time. */ -+ if (!ordered_p (outersize, innermostsize)) -+ return NULL_RTX; -+ - if (outermode == innermostmode - && known_eq (byte, 0U) - && known_eq (SUBREG_BYTE (op), 0)) -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c -new file mode 100644 -index 00000000000..d728d1325ed ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c -@@ -0,0 +1,13 @@ -+/* { dg-options "-O2" } */ -+ -+#include -+#include -+#include -+ -+svuint16_t -+convolve4_4_x (uint16x8x2_t permute_tbl) -+{ -+ return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]); -+} -+ -+/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */ --- -2.46.0 - - -From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:30 +0100 -Subject: [PATCH 2/4] aarch64: Use force_subreg in more places - -This patch makes the aarch64 code use force_subreg instead of -simplify_gen_subreg in more places. The criteria were: - -(1) The code is obviously specific to expand (where new pseudos - can be created). - -(2) The value is obviously an rvalue rather than an lvalue. - -(3) The offset wasn't a simple lowpart or highpart calculation; - a later patch will deal with those. - -gcc/ - * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin): - Use force_subreg instead of simplify_gen_subreg. - * config/aarch64/aarch64-simd.md (ctz2): Likewise. - * config/aarch64/aarch64-sve-builtins-base.cc - (svget_impl::expand): Likewise. - (svget_neonq_impl::expand): Likewise. - * config/aarch64/aarch64-sve-builtins-functions.h - (multireg_permute::expand): Likewise. - -(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4) ---- - gcc/config/aarch64/aarch64-builtins.cc | 4 ++-- - gcc/config/aarch64/aarch64-simd.md | 4 ++-- - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 8 +++----- - gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++--- - 4 files changed, 10 insertions(+), 12 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc -index 75d21de1401..b2e46a073a8 100644 ---- a/gcc/config/aarch64/aarch64-builtins.cc -+++ b/gcc/config/aarch64/aarch64-builtins.cc -@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - rtx temp2 = gen_reg_rtx (DImode); - temp1 = simplify_gen_subreg (d->mode, op2, quadmode, - subreg_lowpart_offset (d->mode, quadmode)); -- temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0); -+ temp1 = force_subreg (V2DImode, temp1, d->mode, 0); - if (BYTES_BIG_ENDIAN) - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx)); - else - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx)); -- op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0); -+ op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0); - - /* And recalculate the index. */ - lane -= nunits / 4; -diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md -index 33ab0741e87..5b9efe0b165 100644 ---- a/gcc/config/aarch64/aarch64-simd.md -+++ b/gcc/config/aarch64/aarch64-simd.md -@@ -412,8 +412,8 @@ - "TARGET_SIMD" - { - emit_insn (gen_bswap2 (operands[0], operands[1])); -- rtx op0_castsi2qi = simplify_gen_subreg(mode, operands[0], -- mode, 0); -+ rtx op0_castsi2qi = force_subreg (mode, operands[0], -+ mode, 0); - emit_insn (gen_aarch64_rbit (op0_castsi2qi, op0_castsi2qi)); - emit_insn (gen_clz2 (operands[0], operands[0])); - DONE; -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index c9182594bc1..2c95da79572 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1121,9 +1121,8 @@ public: - expand (function_expander &e) const override - { - /* Fold the access into a subreg rvalue. */ -- return simplify_gen_subreg (e.vector_mode (0), e.args[0], -- GET_MODE (e.args[0]), -- INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR); -+ return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]), -+ INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR); - } - }; - -@@ -1157,8 +1156,7 @@ public: - e.add_fixed_operand (indices); - return e.generate_insn (icode); - } -- return simplify_gen_subreg (e.result_mode (), e.args[0], -- GET_MODE (e.args[0]), 0); -+ return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0); - } - }; - -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h -index 3b8e575e98e..7d06a57ff83 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h -+++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h -@@ -639,9 +639,9 @@ public: - { - machine_mode elt_mode = e.vector_mode (0); - rtx arg = e.args[0]; -- e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0); -- e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), -- GET_MODE_SIZE (elt_mode))); -+ e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0); -+ e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg), -+ GET_MODE_SIZE (elt_mode))); - } - return e.use_exact_insn (icode); - } --- -2.46.0 - - -From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:31 +0100 -Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg - -This patch makes more use of force_lowpart_subreg, similarly -to the recent patch for force_subreg. The criteria were: - -(1) The code is obviously specific to expand (where new pseudos - can be created). - -(2) The value is obviously an rvalue rather than an lvalue. - -gcc/ - PR target/115464 - * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin) - (aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of - simplify_gen_subreg and lowpart_subreg. - * config/aarch64/aarch64-sve-builtins-base.cc - (svset_neonq_impl::expand): Likewise. - * config/aarch64/aarch64-sve-builtins-sme.cc - (add_load_store_slice_operand): Likewise. - * config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise. - (aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise. - -gcc/testsuite/ - PR target/115464 - * gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test. - -(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def) ---- - gcc/config/aarch64/aarch64-builtins.cc | 11 +++++------ - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- - gcc/config/aarch64/aarch64-sve-builtins-sme.cc | 2 +- - gcc/config/aarch64/aarch64.cc | 14 +++++--------- - .../aarch64/sve/acle/general/pr115464_2.c | 11 +++++++++++ - 5 files changed, 23 insertions(+), 17 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c - -diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc -index b2e46a073a8..264b9560709 100644 ---- a/gcc/config/aarch64/aarch64-builtins.cc -+++ b/gcc/config/aarch64/aarch64-builtins.cc -@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - int lane = INTVAL (lane_idx); - - if (lane < nunits / 4) -- op2 = simplify_gen_subreg (d->mode, op2, quadmode, -- subreg_lowpart_offset (d->mode, quadmode)); -+ op2 = force_lowpart_subreg (d->mode, op2, quadmode); - else - { - /* Select the upper 64 bits, either a V2SF or V4HF, this however -@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - gen_highpart_mode generates code that isn't optimal. */ - rtx temp1 = gen_reg_rtx (d->mode); - rtx temp2 = gen_reg_rtx (DImode); -- temp1 = simplify_gen_subreg (d->mode, op2, quadmode, -- subreg_lowpart_offset (d->mode, quadmode)); -+ temp1 = force_lowpart_subreg (d->mode, op2, quadmode); - temp1 = force_subreg (V2DImode, temp1, d->mode, 0); - if (BYTES_BIG_ENDIAN) - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx)); -@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode) - case AARCH64_WSR64: - case AARCH64_WSRF64: - case AARCH64_WSR128: -- subreg = lowpart_subreg (sysreg_mode, input_val, mode); -+ subreg = force_lowpart_subreg (sysreg_mode, input_val, mode); - break; - case AARCH64_WSRF: - subreg = gen_lowpart_SUBREG (SImode, input_val); -@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode) - case AARCH64_RSR64: - case AARCH64_RSRF64: - case AARCH64_RSR128: -- return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode); -+ return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), -+ target, sysreg_mode); - case AARCH64_RSRF: - subreg = gen_lowpart_SUBREG (SImode, target); - return gen_lowpart_SUBREG (SFmode, subreg); -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index 2c95da79572..3c970e9c5f8 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1183,7 +1183,7 @@ public: - if (BYTES_BIG_ENDIAN) - return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode)); - insn_code icode = code_for_vcond_mask (mode, mode); -- e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1])); -+ e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1])); - e.add_output_operand (icode); - e.add_input_operand (icode, e.args[1]); - e.add_input_operand (icode, e.args[0]); -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -index f4c91bcbb95..b66b35ae60b 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode, - rtx base = e.args[argno]; - if (e.mode_suffix_id == MODE_vnum) - { -- rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode); -+ rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode); - base = simplify_gen_binary (PLUS, SImode, base, vnum); - } - e.add_input_operand (icode, base); -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 1beec94629d..a064aeecbc0 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x) - /* can_change_mode_class must only return true if subregs and svreinterprets - have the same semantics. */ - if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS)) -- return lowpart_subreg (mode, x, GET_MODE (x)); -+ return force_lowpart_subreg (mode, x, GET_MODE (x)); - - rtx res = gen_reg_rtx (mode); - x = force_reg (GET_MODE (x), x); -@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest, - rtx *high_in2) - { - *low_dest = gen_reg_rtx (DImode); -- *low_in1 = gen_lowpart (DImode, op1); -- *low_in2 = simplify_gen_subreg (DImode, op2, TImode, -- subreg_lowpart_offset (DImode, TImode)); -+ *low_in1 = force_lowpart_subreg (DImode, op1, TImode); -+ *low_in2 = force_lowpart_subreg (DImode, op2, TImode); - *high_dest = gen_reg_rtx (DImode); - *high_in1 = gen_highpart (DImode, op1); - *high_in2 = simplify_gen_subreg (DImode, op2, TImode, -@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest, - rtx *high_in2) - { - *low_dest = gen_reg_rtx (DImode); -- *low_in1 = simplify_gen_subreg (DImode, op1, TImode, -- subreg_lowpart_offset (DImode, TImode)); -- -- *low_in2 = simplify_gen_subreg (DImode, op2, TImode, -- subreg_lowpart_offset (DImode, TImode)); -+ *low_in1 = force_lowpart_subreg (DImode, op1, TImode); -+ *low_in2 = force_lowpart_subreg (DImode, op2, TImode); - *high_dest = gen_reg_rtx (DImode); - - *high_in1 = simplify_gen_subreg (DImode, op1, TImode, -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c -new file mode 100644 -index 00000000000..f561c34f732 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c -@@ -0,0 +1,11 @@ -+/* { dg-options "-O2" } */ -+ -+#include -+#include -+#include -+ -+svuint16_t -+convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a) -+{ -+ return svset_neonq_u16 (a, permute_tbl.val[1]); -+} --- -2.46.0 - - -From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:31 +0100 -Subject: [PATCH 4/4] Add force_lowpart_subreg - -optabs had a local function called lowpart_subreg_maybe_copy -that is very similar to the lowpart version of force_subreg. -This patch adds a force_lowpart_subreg wrapper around -force_subreg and uses it in optabs.cc. - -The only difference between the old and new functions is that -the old one asserted success while the new one doesn't. -It's common not to assert elsewhere when taking subregs; -normally a null result is enough. - -Later patches will make more use of the new function. - -gcc/ - * explow.h (force_lowpart_subreg): Declare. - * explow.cc (force_lowpart_subreg): New function. - * optabs.cc (lowpart_subreg_maybe_copy): Delete. - (expand_absneg_bit): Use force_lowpart_subreg instead of - lowpart_subreg_maybe_copy. - (expand_copysign_bit): Likewise. - -(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c) ---- - gcc/explow.cc | 14 ++++++++++++++ - gcc/explow.h | 1 + - gcc/optabs.cc | 24 ++---------------------- - 3 files changed, 17 insertions(+), 22 deletions(-) - -diff --git a/gcc/explow.cc b/gcc/explow.cc -index f6843398c4b..5fdfa81f69b 100644 ---- a/gcc/explow.cc -+++ b/gcc/explow.cc -@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op, - return simplify_gen_subreg (outermode, op, innermode, byte); - } - -+/* Try to return an rvalue expression for the OUTERMODE lowpart of OP, -+ which has mode INNERMODE. Allow OP to be forced into a new register -+ if necessary. -+ -+ Return null on failure. */ -+ -+rtx -+force_lowpart_subreg (machine_mode outermode, rtx op, -+ machine_mode innermode) -+{ -+ auto byte = subreg_lowpart_offset (outermode, innermode); -+ return force_subreg (outermode, op, innermode, byte); -+} -+ - /* If X is a memory ref, copy its contents to a new temp reg and return - that reg. Otherwise, return X. */ - -diff --git a/gcc/explow.h b/gcc/explow.h -index cbd1fcb7eb3..dd654649b06 100644 ---- a/gcc/explow.h -+++ b/gcc/explow.h -@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode); - extern rtx force_reg (machine_mode, rtx); - - extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64); -+extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode); - - /* Return given rtx, copied into a new temp reg if it was in memory. */ - extern rtx force_not_mem (rtx); -diff --git a/gcc/optabs.cc b/gcc/optabs.cc -index ce91f94ed43..804c0dc73ba 100644 ---- a/gcc/optabs.cc -+++ b/gcc/optabs.cc -@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target) - return 0; - } - --/* Extract the OMODE lowpart from VAL, which has IMODE. Under certain -- conditions, VAL may already be a SUBREG against which we cannot generate -- a further SUBREG. In this case, we expect forcing the value into a -- register will work around the situation. */ -- --static rtx --lowpart_subreg_maybe_copy (machine_mode omode, rtx val, -- machine_mode imode) --{ -- rtx ret; -- ret = lowpart_subreg (omode, val, imode); -- if (ret == NULL) -- { -- val = force_reg (imode, val); -- ret = lowpart_subreg (omode, val, imode); -- gcc_assert (ret != NULL); -- } -- return ret; --} -- - /* Expand a floating point absolute value or negation operation via a - logical operation on the sign bit. */ - -@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode, - gen_lowpart (imode, op0), - immed_wide_int_const (mask, imode), - gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN); -- target = lowpart_subreg_maybe_copy (mode, temp, imode); -+ target = force_lowpart_subreg (mode, temp, imode); - - set_dst_reg_note (get_last_insn (), REG_EQUAL, - gen_rtx_fmt_e (code, mode, copy_rtx (op0)), -@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target, - - temp = expand_binop (imode, ior_optab, op0, op1, - gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN); -- target = lowpart_subreg_maybe_copy (mode, temp, imode); -+ target = force_lowpart_subreg (mode, temp, imode); - } - - return target; --- -2.46.0 - diff --git a/cross/gcc-x86/gcc-go.post-install b/cross/gcc-x86/gcc-go.post-install deleted file mode 100644 index 6805fa7cf..000000000 --- a/cross/gcc-x86/gcc-go.post-install +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/sh - -cat 1>&2 < -Date: Sat, 3 Aug 2024 20:37:54 +0200 -Subject: [PATCH] libquadmath: Fix up libquadmath/math/sqrtq.c compilation in - some powerpc* configurations [PR116007] - -My PR114623 change started using soft-fp.h and quad.h for the sqrtq implementation. -Unfortunately, that seems to fail building in some powerpc* configurations, where -TFmode isn't available. -quad.h has: - #ifndef TFtype - typedef float TFtype __attribute__ ((mode (TF))); - #endif -and uses TFtype. quad.h has: - /* Define the complex type corresponding to __float128 - ("_Complex __float128" is not allowed) */ - #if (!defined(_ARCH_PPC)) || defined(__LONG_DOUBLE_IEEE128__) - typedef _Complex float __attribute__((mode(TC))) __complex128; - #else - typedef _Complex float __attribute__((mode(KC))) __complex128; - #endif -with the conditional and KCmode use added during porting of libquadmath -to powerpc*, so I've just defined TFtype for powerpc when __LONG_DOUBLE_IEEE128__ -isn't defined; I could define it to float __attribute__ ((mode (KF))) but it -seemed easier to just define it to __float128 which should do the same thing. - -2024-08-03 Jakub Jelinek - - PR target/116007 - * math/sqrtq.c (TFtype): For PowerPC without __LONG_DOUBLE_IEEE128__ - define to __float128 before including soft-fp.h and quad.h. - -(cherry picked from commit 3ac02e67503ccffa3dfeeffc0a60fce6bdaca43b) ---- - libquadmath/math/sqrtq.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/libquadmath/math/sqrtq.c b/libquadmath/math/sqrtq.c -index 8ca2828d42ce..a58998a06670 100644 ---- a/libquadmath/math/sqrtq.c -+++ b/libquadmath/math/sqrtq.c -@@ -9,6 +9,9 @@ - && defined(FE_TOWARDZERO) \ - && defined(FE_INEXACT) - #define USE_SOFT_FP 1 -+#if defined(_ARCH_PPC) && !defined(__LONG_DOUBLE_IEEE128__) -+#define TFtype __float128 -+#endif - #include "../../libgcc/soft-fp/soft-fp.h" - #include "../../libgcc/soft-fp/quad.h" - #endif --- -2.43.5 - diff --git a/cross/gcc-x86/riscv64-improve-build-time.patch b/cross/gcc-x86/riscv64-improve-build-time.patch deleted file mode 100644 index 2c8c52a2c..000000000 --- a/cross/gcc-x86/riscv64-improve-build-time.patch +++ /dev/null @@ -1,149 +0,0 @@ -Patch-Source: https://gcc.gnu.org/git/?p=gcc.git;a=patch;h=2cf89ae83225f932b226cd57ef2d083a59bcf8a3 --- -From 2cf89ae83225f932b226cd57ef2d083a59bcf8a3 Mon Sep 17 00:00:00 2001 -From: Richard Biener -Date: Tue, 6 Aug 2024 14:56:26 +0200 -Subject: [PATCH] tree-optimization/116166 - forward jump-threading going wild - -Currently the forward threader isn't limited as to the search space -it explores and with it now using path-ranger for simplifying -conditions it runs into it became pretty slow for degenerate cases -like compiling insn-emit.cc for RISC-V esp. when compiling for -a host with LOGICAL_OP_NON_SHORT_CIRCUIT disabled. - -The following makes the forward threader honor the search space -limit I introduced for the backward threader. This reduces -compile-time from minutes to seconds for the testcase in PR116166. - -Note this wasn't necessary before we had ranger but with ranger -the work we do is quadatic in the length of the threading path -we build up (the same is true for the backwards threader). - - PR tree-optimization/116166 - * tree-ssa-threadedge.h (jump_threader::thread_around_empty_blocks): - Add limit parameter. - (jump_threader::thread_through_normal_block): Likewise. - * tree-ssa-threadedge.cc (jump_threader::thread_around_empty_blocks): - Honor and decrement limit parameter. - (jump_threader::thread_through_normal_block): Likewise. - (jump_threader::thread_across_edge): Initialize limit from - param_max_jump_thread_paths and pass it down to workers. ---- - gcc/tree-ssa-threadedge.cc | 30 ++++++++++++++++++++++-------- - gcc/tree-ssa-threadedge.h | 4 ++-- - 2 files changed, 24 insertions(+), 10 deletions(-) - -diff --git a/gcc/tree-ssa-threadedge.cc b/gcc/tree-ssa-threadedge.cc -index 7f82639b8ecc..0aa2aa851430 100644 ---- a/gcc/tree-ssa-threadedge.cc -+++ b/gcc/tree-ssa-threadedge.cc -@@ -786,13 +786,17 @@ propagate_threaded_block_debug_into (basic_block dest, basic_block src) - bool - jump_threader::thread_around_empty_blocks (vec *path, - edge taken_edge, -- bitmap visited) -+ bitmap visited, unsigned &limit) - { - basic_block bb = taken_edge->dest; - gimple_stmt_iterator gsi; - gimple *stmt; - tree cond; - -+ if (limit == 0) -+ return false; -+ --limit; -+ - /* The key property of these blocks is that they need not be duplicated - when threading. Thus they cannot have visible side effects such - as PHI nodes. */ -@@ -830,7 +834,8 @@ jump_threader::thread_around_empty_blocks (vec *path, - m_registry->push_edge (path, taken_edge, EDGE_NO_COPY_SRC_BLOCK); - m_state->append_path (taken_edge->dest); - bitmap_set_bit (visited, taken_edge->dest->index); -- return thread_around_empty_blocks (path, taken_edge, visited); -+ return thread_around_empty_blocks (path, taken_edge, visited, -+ limit); - } - } - -@@ -872,7 +877,7 @@ jump_threader::thread_around_empty_blocks (vec *path, - m_registry->push_edge (path, taken_edge, EDGE_NO_COPY_SRC_BLOCK); - m_state->append_path (taken_edge->dest); - -- thread_around_empty_blocks (path, taken_edge, visited); -+ thread_around_empty_blocks (path, taken_edge, visited, limit); - return true; - } - -@@ -899,8 +904,13 @@ jump_threader::thread_around_empty_blocks (vec *path, - - int - jump_threader::thread_through_normal_block (vec *path, -- edge e, bitmap visited) -+ edge e, bitmap visited, -+ unsigned &limit) - { -+ if (limit == 0) -+ return 0; -+ limit--; -+ - m_state->register_equivs_edge (e); - - /* PHIs create temporary equivalences. -@@ -989,7 +999,7 @@ jump_threader::thread_through_normal_block (vec *path, - visited. This may be overly conservative. */ - bitmap_set_bit (visited, dest->index); - bitmap_set_bit (visited, e->dest->index); -- thread_around_empty_blocks (path, taken_edge, visited); -+ thread_around_empty_blocks (path, taken_edge, visited, limit); - return 1; - } - } -@@ -1075,9 +1085,12 @@ jump_threader::thread_across_edge (edge e) - bitmap_set_bit (visited, e->src->index); - bitmap_set_bit (visited, e->dest->index); - -+ /* Limit search space. */ -+ unsigned limit = param_max_jump_thread_paths; -+ - int threaded = 0; - if ((e->flags & EDGE_DFS_BACK) == 0) -- threaded = thread_through_normal_block (path, e, visited); -+ threaded = thread_through_normal_block (path, e, visited, limit); - - if (threaded > 0) - { -@@ -1148,11 +1161,12 @@ jump_threader::thread_across_edge (edge e) - m_registry->push_edge (path, e, EDGE_START_JUMP_THREAD); - m_registry->push_edge (path, taken_edge, EDGE_COPY_SRC_JOINER_BLOCK); - -- found = thread_around_empty_blocks (path, taken_edge, visited); -+ found = thread_around_empty_blocks (path, taken_edge, visited, limit); - - if (!found) - found = thread_through_normal_block (path, -- path->last ()->e, visited) > 0; -+ path->last ()->e, visited, -+ limit) > 0; - - /* If we were able to thread through a successor of E->dest, then - record the jump threading opportunity. */ -diff --git a/gcc/tree-ssa-threadedge.h b/gcc/tree-ssa-threadedge.h -index 9f6cbfe93307..245b3506a550 100644 ---- a/gcc/tree-ssa-threadedge.h -+++ b/gcc/tree-ssa-threadedge.h -@@ -101,9 +101,9 @@ private: - unsigned limit); - - bool thread_around_empty_blocks (vec *path, -- edge, bitmap visited); -+ edge, bitmap visited, unsigned &limit); - int thread_through_normal_block (vec *path, -- edge, bitmap visited); -+ edge, bitmap visited, unsigned &limit); - void thread_across_edge (edge); - bool record_temporary_equivalences_from_phis (edge); - gimple *record_temporary_equivalences_from_stmts_at_dest (edge); --- -2.43.5 - diff --git a/cross/gcc-x86_64/0002-gcc-poison-system-directories.patch b/cross/gcc-x86_64/0002-gcc-poison-system-directories.patch index 84c80c95b..9a1671267 100644 --- a/cross/gcc-x86_64/0002-gcc-poison-system-directories.patch +++ b/cross/gcc-x86_64/0002-gcc-poison-system-directories.patch @@ -25,11 +25,9 @@ Upstream-Status: Pending gcc/incpath.cc | 21 +++++++++++++++++++++ 7 files changed, 68 insertions(+) -diff --git a/gcc/common.opt b/gcc/common.opt -index 862c474d3c8..64c4277c991 100644 --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -711,6 +711,10 @@ Wreturn-local-addr +@@ -715,6 +715,10 @@ Wreturn-local-addr Common Var(warn_return_local_addr) Init(1) Warning Warn about returning a pointer/reference to a local or temporary variable. @@ -40,11 +38,9 @@ index 862c474d3c8..64c4277c991 100644 Wshadow Common Var(warn_shadow) Warning Warn when one variable shadows another. Same as -Wshadow=global. -diff --git a/gcc/config.in b/gcc/config.in -index 4cad077bfbe..0679fbbf4c6 100644 --- a/gcc/config.in +++ b/gcc/config.in -@@ -236,6 +236,12 @@ +@@ -249,6 +249,12 @@ #endif @@ -57,19 +53,17 @@ index 4cad077bfbe..0679fbbf4c6 100644 /* Define if you want all operations on RTL (the basic data structure of the optimizer and back end) to be checked for dynamic type safety at runtime. This is quite expensive. */ -diff --git a/gcc/configure b/gcc/configure -index c7b26d1927d..8c46369f73f 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -1026,6 +1026,7 @@ enable_maintainer_mode +@@ -1050,6 +1050,7 @@ enable_maintainer_mode enable_link_mutex enable_link_serialization enable_version_specific_runtime_libs +enable_poison_system_directories enable_plugin enable_host_shared - enable_libquadmath_support -@@ -1788,6 +1789,8 @@ Optional Features: + enable_host_pie +@@ -1823,6 +1824,8 @@ Optional Features: --enable-version-specific-runtime-libs specify that runtime libraries should be installed in a compiler-specific directory @@ -77,8 +71,8 @@ index c7b26d1927d..8c46369f73f 100755 + warn for use of native system header directories --enable-plugin enable plugin support --enable-host-shared build host code as shared libraries - --disable-libquadmath-support -@@ -31753,6 +31756,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : + --enable-host-pie build host code as PIE +@@ -34082,6 +34085,19 @@ if test "${enable_version_specific_runtime_libs+set}" = set; then : fi @@ -98,11 +92,9 @@ index c7b26d1927d..8c46369f73f 100755 # Substitute configuration variables -diff --git a/gcc/configure.ac b/gcc/configure.ac -index 09082e8ccae..5504bf6eb01 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -7292,6 +7292,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs, +@@ -7555,6 +7555,16 @@ AC_ARG_ENABLE(version-specific-runtime-libs, [specify that runtime libraries should be installed in a compiler-specific directory])]) @@ -119,11 +111,9 @@ index 09082e8ccae..5504bf6eb01 100644 # Substitute configuration variables AC_SUBST(subdirs) AC_SUBST(srcdir) -diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index af0e5933fdb..b6731a4673c 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -384,6 +384,7 @@ Objective-C and Objective-C++ Dialects}. +@@ -391,6 +391,7 @@ Objective-C and Objective-C++ Dialects}. -Wpacked -Wno-packed-bitfield-compat -Wpacked-not-aligned -Wpadded -Wparentheses -Wno-pedantic-ms-format -Wpointer-arith -Wno-pointer-compare -Wno-pointer-to-int-cast @@ -131,7 +121,7 @@ index af0e5933fdb..b6731a4673c 100644 -Wno-pragmas -Wno-prio-ctor-dtor -Wredundant-decls -Wrestrict -Wno-return-local-addr -Wreturn-type -Wno-scalar-storage-order -Wsequence-point -@@ -8426,6 +8427,14 @@ made up of data only and thus requires no special treatment. But, for +@@ -8861,6 +8862,14 @@ made up of data only and thus requires no special treatment. But, for most targets, it is made up of code and thus requires the stack to be made executable in order for the program to work properly. @@ -146,12 +136,10 @@ index af0e5933fdb..b6731a4673c 100644 @opindex Wfloat-equal @opindex Wno-float-equal @item -Wfloat-equal -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 16bb07f2cdc..33b56e721d2 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -1177,6 +1187,8 @@ proper position among the other output files. */ - "-z now " \ +@@ -1163,6 +1163,8 @@ proper position among the other output files. */ + "%{fuse-ld=*:-fuse-ld=%*} " LINK_COMPRESS_DEBUG_SPEC \ "%X %{o*} %{e*} %{N} %{n} %{r}\ %{s} %{t} %{u*} %{z} %{Z} %{!nostdlib:%{!r:%{!nostartfiles:%S}}} \ + %{Wno-poison-system-directories:--no-poison-system-directories} \ @@ -159,8 +147,6 @@ index 16bb07f2cdc..33b56e721d2 100644 %{static|no-pie|static-pie:} %@{L*} %(link_libgcc) " \ VTABLE_VERIFICATION_SPEC " " SANITIZER_EARLY_SPEC " %o "" \ %{fopenacc|fopenmp|%:gt(%{ftree-parallelize-loops=*:%*} 1):\ -diff --git a/gcc/incpath.cc b/gcc/incpath.cc -index 4d44321183f..0f3f071b44c 100644 --- a/gcc/incpath.cc +++ b/gcc/incpath.cc @@ -26,6 +26,7 @@ @@ -198,6 +184,3 @@ index 4d44321183f..0f3f071b44c 100644 } /* Use given -I paths for #include "..." but not #include <...>, and --- -2.41.0 - diff --git a/cross/gcc-x86_64/0003-specs-turn-on-Wl-z-now-by-default.patch b/cross/gcc-x86_64/0003-specs-turn-on-Wl-z-now-by-default.patch index bfb0a6eba..33e8b56f1 100644 --- a/cross/gcc-x86_64/0003-specs-turn-on-Wl-z-now-by-default.patch +++ b/cross/gcc-x86_64/0003-specs-turn-on-Wl-z-now-by-default.patch @@ -13,11 +13,9 @@ now by default. gcc/gcc.cc | 1 + 2 files changed, 4 insertions(+) -diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi -index b6731a4673c..f393c7846c6 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi -@@ -17961,6 +17961,9 @@ For example, @option{-Wl,-Map,output.map} passes @option{-Map output.map} to the +@@ -18935,6 +18935,9 @@ For example, @option{-Wl,-Map,output.map} passes @option{-Map output.map} to the linker. When using the GNU linker, you can also get the same effect with @option{-Wl,-Map=output.map}. @@ -27,11 +25,9 @@ index b6731a4673c..f393c7846c6 100644 @opindex u @item -u @var{symbol} Pretend the symbol @var{symbol} is undefined, to force linking of -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 33b56e721d2..f82fae23c22 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -1144,6 +1144,7 @@ proper position among the other output files. */ +@@ -1161,6 +1161,7 @@ proper position among the other output files. */ "%{flto|flto=*:%= 2, 0) @@ -20,7 +18,7 @@ index a75038930ae..b98726f33ed 100644 Warn about possible security problems with format functions. Wformat-signedness -@@ -725,7 +725,7 @@ C ObjC C++ ObjC++ Var(warn_format_zero_length) Warning LangEnabledBy(C ObjC C++ +@@ -799,7 +799,7 @@ C ObjC C++ ObjC++ Var(warn_format_zero_length) Warning LangEnabledBy(C ObjC C++ Warn about zero-length formats. Wformat= @@ -28,7 +26,4 @@ index a75038930ae..b98726f33ed 100644 +C ObjC C++ ObjC++ Joined RejectNegative UInteger Var(warn_format) Init(1) Warning LangEnabledBy(C ObjC C++ ObjC++,Wall, 1, 0) IntegerRange(0, 2) Warn about printf/scanf/strftime/strfmon format string anomalies. - Wformat-overflow= --- -2.41.0 - + Wframe-address diff --git a/cross/gcc-x86_64/0007-Enable-Wtrampolines-by-default.patch b/cross/gcc-x86_64/0007-Enable-Wtrampolines-by-default.patch index eb7aae838..140685d7b 100644 --- a/cross/gcc-x86_64/0007-Enable-Wtrampolines-by-default.patch +++ b/cross/gcc-x86_64/0007-Enable-Wtrampolines-by-default.patch @@ -7,11 +7,9 @@ Subject: [PATCH 07/35] Enable -Wtrampolines by default. gcc/common.opt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/gcc/common.opt b/gcc/common.opt -index 64c4277c991..c24839d32bc 100644 --- a/gcc/common.opt +++ b/gcc/common.opt -@@ -803,7 +803,7 @@ Common Var(warn_system_headers) Warning +@@ -811,7 +811,7 @@ Common Var(warn_system_headers) Warning Do not suppress warnings from system headers. Wtrampolines @@ -20,6 +18,3 @@ index 64c4277c991..c24839d32bc 100644 Warn whenever a trampoline is generated. Wtrivial-auto-var-init --- -2.41.0 - diff --git a/cross/gcc-x86_64/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch b/cross/gcc-x86_64/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch index 69c1bf725..e85284ff0 100644 --- a/cross/gcc-x86_64/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch +++ b/cross/gcc-x86_64/0008-Disable-ssp-on-nostdlib-nodefaultlibs-and-ffreestand.patch @@ -9,11 +9,9 @@ Subject: [PATCH 08/35] Disable ssp on -nostdlib, -nodefaultlibs and gcc/params.opt | 2 +- 2 files changed, 8 insertions(+), 2 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index da6417dd0d1..b5a6f200635 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -983,6 +983,12 @@ proper position among the other output files. */ +@@ -1000,6 +1000,12 @@ proper position among the other output files. */ #define LINK_GCC_C_SEQUENCE_SPEC "%G %{!nolibc:%L %G}" #endif @@ -26,20 +24,18 @@ index da6417dd0d1..b5a6f200635 100644 #ifndef LINK_SSP_SPEC #ifdef TARGET_LIBC_PROVIDES_SSP #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ -@@ -1282,7 +1288,7 @@ static const char *cc1_options = +@@ -1305,7 +1311,7 @@ static const char *cc1_options = %{-version:--version}\ %{-help=*:--help=%*}\ %{!fsyntax-only:%{S:%W{o*}%{!o*:-o %w%b.s}}}\ - %{fsyntax-only:-o %j} %{-param*}\ + %{fsyntax-only:-o %j} %{-param*} " NO_SSP_SPEC "\ %{coverage:-fprofile-arcs -ftest-coverage}\ - %{fprofile-arcs|fprofile-generate*|coverage:\ + %{fprofile-arcs|fcondition-coverage|fprofile-generate*|coverage:\ %{!fprofile-update=single:\ -diff --git a/gcc/params.opt b/gcc/params.opt -index 823cdb2ff85..5b096899b40 100644 --- a/gcc/params.opt +++ b/gcc/params.opt -@@ -1006,7 +1006,7 @@ Common Joined UInteger Var(param_ssa_name_def_chain_limit) Init(512) Param Optim +@@ -1013,7 +1013,7 @@ Common Joined UInteger Var(param_ssa_name_def_chain_limit) Init(512) Param Optim The maximum number of SSA_NAME assignments to follow in determining a value. -param=ssp-buffer-size= @@ -48,6 +44,3 @@ index 823cdb2ff85..5b096899b40 100644 The lower bound for a buffer to be considered for stack smashing protection. -param=stack-clash-protection-guard-size= --- -2.41.0 - diff --git a/cross/gcc-x86_64/0012-libgcc_s.patch b/cross/gcc-x86_64/0012-libgcc_s.patch index d8bbc602f..8189f8491 100644 --- a/cross/gcc-x86_64/0012-libgcc_s.patch +++ b/cross/gcc-x86_64/0012-libgcc_s.patch @@ -9,11 +9,9 @@ Subject: [PATCH 12/35] libgcc_s libgcc/config/i386/t-linux | 2 +- 3 files changed, 6 insertions(+), 6 deletions(-) -diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc -index 0d817fc3f3b..2e99db00db9 100644 --- a/gcc/config/i386/i386-expand.cc +++ b/gcc/config/i386/i386-expand.cc -@@ -12691,10 +12691,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, +@@ -13089,10 +13089,10 @@ ix86_expand_builtin (tree exp, rtx target, rtx subtarget, { case IX86_BUILTIN_CPU_INIT: { @@ -26,8 +24,6 @@ index 0d817fc3f3b..2e99db00db9 100644 call_expr = build_call_expr (fndecl, 0); return expand_expr (call_expr, target, mode, EXPAND_NORMAL); } -diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c -index 50b6d8248a2..724ced402a1 100644 --- a/libgcc/config/i386/cpuinfo.c +++ b/libgcc/config/i386/cpuinfo.c @@ -63,7 +63,7 @@ __cpu_indicator_init (void) @@ -41,8 +37,6 @@ index 50b6d8248a2..724ced402a1 100644 +int __cpu_indicator_init_local (void) + __attribute__ ((weak, alias ("__cpu_indicator_init"))); #endif -diff --git a/libgcc/config/i386/t-linux b/libgcc/config/i386/t-linux -index 8506a635790..564296f788e 100644 --- a/libgcc/config/i386/t-linux +++ b/libgcc/config/i386/t-linux @@ -3,5 +3,5 @@ @@ -52,6 +46,3 @@ index 8506a635790..564296f788e 100644 -HOST_LIBGCC2_CFLAGS += -mlong-double-80 -DUSE_ELF_SYMVER $(CET_FLAGS) +HOST_LIBGCC2_CFLAGS += -mlong-double-80 $(CET_FLAGS) CRTSTUFF_T_CFLAGS += $(CET_FLAGS) --- -2.41.0 - diff --git a/cross/gcc-x86_64/0013-nopie.patch b/cross/gcc-x86_64/0013-nopie.patch index 6578ee110..4a9ea0770 100644 --- a/cross/gcc-x86_64/0013-nopie.patch +++ b/cross/gcc-x86_64/0013-nopie.patch @@ -4,15 +4,13 @@ Date: Sat, 7 Nov 2015 02:08:05 +0000 Subject: [PATCH 13/35] nopie --- - gcc/configure | 27 +++++++++++++++++++++++++++ - gcc/configure.ac | 13 +++++++++++++ - 2 files changed, 40 insertions(+) + gcc/configure | 25 +++++++++++++++++++++++++ + gcc/configure.ac | 11 +++++++++++ + 2 files changed, 36 insertions(+) -diff --git a/gcc/configure b/gcc/configure -index 23da7d55d..f38732bb2 100755 --- a/gcc/configure +++ b/gcc/configure -@@ -34534,6 +34534,29 @@ rm -f core conftest.err conftest.$ac_objext \ +@@ -34606,6 +34606,29 @@ rm -f core conftest.err conftest.$ac_objext \ fi { $as_echo "$as_me:${as_lineno-$LINENO}: result: $gcc_cv_no_pie" >&5 $as_echo "$gcc_cv_no_pie" >&6; } @@ -42,7 +40,7 @@ index 23da7d55d..f38732bb2 100755 if test x$enable_host_shared = xyes; then PICFLAG=-fPIC -@@ -34551,6 +34574,8 @@ if test x$enable_host_pie = xyes; then +@@ -34623,6 +34646,8 @@ if test x$enable_host_pie = xyes; then LD_PICFLAG=-pie elif test x$gcc_cv_no_pie = xyes; then LD_PICFLAG=-no-pie @@ -51,11 +49,9 @@ index 23da7d55d..f38732bb2 100755 else LD_PICFLAG= fi -diff --git a/gcc/configure.ac b/gcc/configure.ac -index d7cf0b92c..db2e2c802 100644 --- a/gcc/configure.ac +++ b/gcc/configure.ac -@@ -7781,6 +7781,15 @@ AC_CACHE_CHECK([for -no-pie option], +@@ -7821,6 +7821,15 @@ AC_CACHE_CHECK([for -no-pie option], [gcc_cv_no_pie=yes], [gcc_cv_no_pie=no]) LDFLAGS="$saved_LDFLAGS"]) @@ -71,7 +67,7 @@ index d7cf0b92c..db2e2c802 100644 if test x$enable_host_shared = xyes; then PICFLAG=-fPIC -@@ -7798,6 +7807,8 @@ if test x$enable_host_pie = xyes; then +@@ -7838,6 +7847,8 @@ if test x$enable_host_pie = xyes; then LD_PICFLAG=-pie elif test x$gcc_cv_no_pie = xyes; then LD_PICFLAG=-no-pie @@ -80,6 +76,3 @@ index d7cf0b92c..db2e2c802 100644 else LD_PICFLAG= fi --- -2.41.0 - diff --git a/cross/gcc-x86_64/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch b/cross/gcc-x86_64/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch index 937cad8a7..ddea4a05b 100644 --- a/cross/gcc-x86_64/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch +++ b/cross/gcc-x86_64/0015-build-fix-CXXFLAGS_FOR_BUILD-passing.patch @@ -7,11 +7,9 @@ Subject: [PATCH 15/35] build: fix CXXFLAGS_FOR_BUILD passing Makefile.in | 1 + 1 file changed, 1 insertion(+) -diff --git a/Makefile.in b/Makefile.in -index 06a9398e172..6ff2b3f9925 100644 --- a/Makefile.in +++ b/Makefile.in -@@ -178,6 +178,7 @@ BUILD_EXPORTS = \ +@@ -179,6 +179,7 @@ BUILD_EXPORTS = \ # built for the build system to override those in BASE_FLAGS_TO_PASS. EXTRA_BUILD_FLAGS = \ CFLAGS="$(CFLAGS_FOR_BUILD)" \ @@ -19,6 +17,3 @@ index 06a9398e172..6ff2b3f9925 100644 LDFLAGS="$(LDFLAGS_FOR_BUILD)" # This is the list of directories to built for the host system. --- -2.41.0 - diff --git a/cross/gcc-x86_64/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch b/cross/gcc-x86_64/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch index 96972482c..4796a055d 100644 --- a/cross/gcc-x86_64/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch +++ b/cross/gcc-x86_64/0017-Alpine-musl-package-provides-libssp_nonshared.a.-We-.patch @@ -12,11 +12,9 @@ Subject: [PATCH 17/35] Alpine musl package provides libssp_nonshared.a. We gcc/gcc.cc | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index b5a6f200635..6cbb726599b 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -991,8 +991,7 @@ proper position among the other output files. */ +@@ -1008,8 +1008,7 @@ proper position among the other output files. */ #ifndef LINK_SSP_SPEC #ifdef TARGET_LIBC_PROVIDES_SSP @@ -26,6 +24,3 @@ index b5a6f200635..6cbb726599b 100644 #else #define LINK_SSP_SPEC "%{fstack-protector|fstack-protector-all" \ "|fstack-protector-strong|fstack-protector-explicit" \ --- -2.41.0 - diff --git a/cross/gcc-x86_64/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch b/cross/gcc-x86_64/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch index a9612913e..b829e5b34 100644 --- a/cross/gcc-x86_64/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch +++ b/cross/gcc-x86_64/0018-DP-Use-push-state-pop-state-for-gold-as-well-when-li.patch @@ -8,11 +8,9 @@ Subject: [PATCH 18/35] DP: Use --push-state/--pop-state for gold as well when gcc/gcc.cc | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) -diff --git a/gcc/gcc.cc b/gcc/gcc.cc -index 6cbb726599b..59390fd39d6 100644 --- a/gcc/gcc.cc +++ b/gcc/gcc.cc -@@ -755,10 +755,10 @@ proper position among the other output files. */ +@@ -772,10 +772,10 @@ proper position among the other output files. */ #define LIBASAN_SPEC STATIC_LIBASAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBASAN_SPEC "%{static-libasan:" LD_STATIC_OPTION "}" \ @@ -25,7 +23,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBASAN_LIBS #else #define LIBASAN_SPEC "-lasan" STATIC_LIBASAN_LIBS -@@ -794,10 +794,10 @@ proper position among the other output files. */ +@@ -811,10 +811,10 @@ proper position among the other output files. */ #define LIBTSAN_SPEC STATIC_LIBTSAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBTSAN_SPEC "%{static-libtsan:" LD_STATIC_OPTION "}" \ @@ -38,7 +36,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBTSAN_LIBS #else #define LIBTSAN_SPEC "-ltsan" STATIC_LIBTSAN_LIBS -@@ -815,10 +815,10 @@ proper position among the other output files. */ +@@ -832,10 +832,10 @@ proper position among the other output files. */ #define LIBLSAN_SPEC STATIC_LIBLSAN_LIBS #elif defined(HAVE_LD_STATIC_DYNAMIC) #define LIBLSAN_SPEC "%{static-liblsan:" LD_STATIC_OPTION "}" \ @@ -51,7 +49,7 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBLSAN_LIBS #else #define LIBLSAN_SPEC "-llsan" STATIC_LIBLSAN_LIBS -@@ -834,10 +834,10 @@ proper position among the other output files. */ +@@ -851,10 +851,10 @@ proper position among the other output files. */ " %{static-libubsan|static:%:include(libsanitizer.spec)%(link_libubsan)}" #ifdef HAVE_LD_STATIC_DYNAMIC #define LIBUBSAN_SPEC "%{static-libubsan:" LD_STATIC_OPTION "}" \ @@ -64,6 +62,3 @@ index 6cbb726599b..59390fd39d6 100644 STATIC_LIBUBSAN_LIBS #else #define LIBUBSAN_SPEC "-lubsan" STATIC_LIBUBSAN_LIBS --- -2.41.0 - diff --git a/cross/gcc-x86_64/0023-riscv-disable-multilib-support.patch b/cross/gcc-x86_64/0023-riscv-disable-multilib-support.patch index 49916376f..eb9ba90fc 100644 --- a/cross/gcc-x86_64/0023-riscv-disable-multilib-support.patch +++ b/cross/gcc-x86_64/0023-riscv-disable-multilib-support.patch @@ -42,11 +42,9 @@ library. gcc/config/riscv/t-linux | 7 +++++-- 2 files changed, 5 insertions(+), 10 deletions(-) -diff --git a/gcc/config/riscv/linux.h b/gcc/config/riscv/linux.h -index f8c2c351e5a..8d9881eadeb 100644 --- a/gcc/config/riscv/linux.h +++ b/gcc/config/riscv/linux.h -@@ -60,11 +60,3 @@ along with GCC; see the file COPYING3. If not see +@@ -61,11 +61,3 @@ along with GCC; see the file COPYING3. If not see %{rdynamic:-export-dynamic} \ -dynamic-linker " GNU_USER_DYNAMIC_LINKER "}} \ %{static:-static} %{static-pie:-static -pie --no-dynamic-linker -z text}}" @@ -58,11 +56,9 @@ index f8c2c351e5a..8d9881eadeb 100644 - "/usr/lib/ " - -#define RISCV_USE_CUSTOMISED_MULTI_LIB select_by_abi -diff --git a/gcc/config/riscv/t-linux b/gcc/config/riscv/t-linux -index 216d2776a18..1a8a863853e 100644 --- a/gcc/config/riscv/t-linux +++ b/gcc/config/riscv/t-linux -@@ -1,3 +1,6 @@ +@@ -1,5 +1,8 @@ -# Only XLEN and ABI affect Linux multilib dir names, e.g. /lib32/ilp32d/ -MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib64,$(MULTILIB_DIRNAMES))) +MULTILIB_OPTIONS := march=rv64gc @@ -71,6 +67,5 @@ index 216d2776a18..1a8a863853e 100644 +MULTILIB_DIRNAMES := $(patsubst rv32%,lib32,$(patsubst rv64%,lib,$(MULTILIB_DIRNAMES))) MULTILIB_OSDIRNAMES := $(patsubst lib%,../lib%,$(MULTILIB_DIRNAMES)) +MULTILIB_MATCHES := march?rv64gc=march?rv64imafdc --- -2.41.0 - + + MULTIARCH_DIRNAME := $(call if_multiarch,$(firstword $(subst -, ,$(target)))-linux-gnu) diff --git a/cross/gcc-x86_64/0024-always-build-libgcc_eh.a.patch b/cross/gcc-x86_64/0024-always-build-libgcc_eh.a.patch index 6b0514e98..5d508ea08 100644 --- a/cross/gcc-x86_64/0024-always-build-libgcc_eh.a.patch +++ b/cross/gcc-x86_64/0024-always-build-libgcc_eh.a.patch @@ -9,11 +9,9 @@ highly inspired by: libgcc/Makefile.in | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) -diff --git a/libgcc/Makefile.in b/libgcc/Makefile.in -index 6c4dc79ab71..023cede18a7 100644 --- a/libgcc/Makefile.in +++ b/libgcc/Makefile.in -@@ -960,8 +960,9 @@ ifneq ($(LIBUNWIND),) +@@ -967,8 +967,9 @@ ifneq ($(LIBUNWIND),) all: libunwind.a endif @@ -24,7 +22,7 @@ index 6c4dc79ab71..023cede18a7 100644 ifneq ($(LIBUNWIND),) all: libunwind$(SHLIB_EXT) libgcc_s$(SHLIB_EXT): libunwind$(SHLIB_EXT) -@@ -1163,10 +1164,6 @@ install-libunwind: +@@ -1173,10 +1174,6 @@ install-libunwind: install-shared: $(mkinstalldirs) $(DESTDIR)$(inst_libdir) @@ -35,7 +33,7 @@ index 6c4dc79ab71..023cede18a7 100644 $(subst @multilib_dir@,$(MULTIDIR),$(subst \ @shlib_base_name@,libgcc_s,$(subst \ @shlib_slibdir_qual@,$(MULTIOSSUBDIR),$(SHLIB_INSTALL)))) -@@ -1183,6 +1180,10 @@ ifeq ($(enable_gcov),yes) +@@ -1193,6 +1190,10 @@ ifeq ($(enable_gcov),yes) $(RANLIB) $(DESTDIR)$(inst_libdir)/libgcov.a endif @@ -46,6 +44,3 @@ index 6c4dc79ab71..023cede18a7 100644 parts="$(INSTALL_PARTS)"; \ for file in $$parts; do \ rm -f $(DESTDIR)$(inst_libdir)/$$file; \ --- -2.41.0 - diff --git a/cross/gcc-x86_64/0026-ada-musl-support-fixes.patch b/cross/gcc-x86_64/0026-ada-musl-support-fixes.patch index 91a8268ab..0be683fa6 100644 --- a/cross/gcc-x86_64/0026-ada-musl-support-fixes.patch +++ b/cross/gcc-x86_64/0026-ada-musl-support-fixes.patch @@ -10,8 +10,6 @@ Subject: [PATCH 26/35] ada: musl support fixes gcc/ada/terminals.c | 8 ++++---- 4 files changed, 35 insertions(+), 33 deletions(-) -diff --git a/gcc/ada/Makefile.rtl b/gcc/ada/Makefile.rtl -index 32cbdb692..463028fbe 100644 --- a/gcc/ada/Makefile.rtl +++ b/gcc/ada/Makefile.rtl @@ -1558,7 +1558,7 @@ ifeq ($(strip $(filter-out %86 linux%,$(target_cpu) $(target_os))),) @@ -23,7 +21,7 @@ index 32cbdb692..463028fbe 100644 a-exetim.adb&5 $as_echo_n "checking for library containing swapcontext... " >&6; } -diff --git a/libphobos/m4/druntime/libraries.m4 b/libphobos/m4/druntime/libraries.m4 -index 45a56f6f76a..fef6e890b1e 100644 --- a/libphobos/m4/druntime/libraries.m4 +++ b/libphobos/m4/druntime/libraries.m4 @@ -220,14 +220,6 @@ AC_DEFUN([DRUNTIME_LIBRARIES_UCONTEXT], @@ -49,6 +45,3 @@ index 45a56f6f76a..fef6e890b1e 100644 if test "$druntime_fiber_asm_external" = no; then AC_SEARCH_LIBS([swapcontext], [c ucontext], [], AC_MSG_ERROR([swapcontext required but not found])) --- -2.41.0 - diff --git a/cross/gcc-x86_64/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch b/cross/gcc-x86_64/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch index e1679a8e5..b53e5847d 100644 --- a/cross/gcc-x86_64/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch +++ b/cross/gcc-x86_64/0032-libgnat-time_t-is-always-64-bit-on-musl-libc.patch @@ -7,11 +7,9 @@ Subject: [PATCH 32/35] libgnat: time_t is always 64-bit on musl libc gcc/ada/libgnat/s-parame.ads | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -diff --git a/gcc/ada/libgnat/s-parame.ads b/gcc/ada/libgnat/s-parame.ads -index 3d6e345a1ba..cfe0b4d3ca6 100644 --- a/gcc/ada/libgnat/s-parame.ads +++ b/gcc/ada/libgnat/s-parame.ads -@@ -102,7 +102,7 @@ package System.Parameters is +@@ -100,7 +100,7 @@ package System.Parameters is -- Characteristics of time_t type -- ------------------------------------ @@ -20,6 +18,3 @@ index 3d6e345a1ba..cfe0b4d3ca6 100644 -- Number of bits in type time_t ---------------------------------------------- --- -2.41.0 - diff --git a/cross/gcc-x86_64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch b/cross/gcc-x86_64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch deleted file mode 100644 index bc3c4a6ac..000000000 --- a/cross/gcc-x86_64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch +++ /dev/null @@ -1,82 +0,0 @@ -From 4d0a333ef13e2da140cd44c4941b20f48a80dc0f Mon Sep 17 00:00:00 2001 -From: Hannes Braun -Date: Thu, 20 Feb 2025 15:09:41 +0100 -Subject: [PATCH] arm: Fix signedness of vld1q intrinsic parms [PR118942] - -vld1q_s8_x3, vld1q_s16_x3, vld1q_s8_x4 and vld1q_s16_x4 were expecting -pointers to unsigned integers. These parameters should be pointers to -signed integers. - -gcc/ChangeLog: - PR target/118942 - * config/arm/arm_neon.h (vld1q_s8_x3): Use int8_t instead of - uint16_t. - (vld1q_s16_x3): Use int16_t instead of uint16_t. - (vld1q_s8_x4): Likewise. - (vld1q_s16_x4): Likewise. - -gcc/testsuite/ChangeLog: - PR target/118942 - * gcc.target/arm/simd/vld1q_base_xN_1.c: Add -Wpointer-sign. - -Signed-off-by: Hannes Braun ---- - gcc/config/arm/arm_neon.h | 8 ++++---- - gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c | 2 +- - 2 files changed, 5 insertions(+), 5 deletions(-) - -diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h -index 5b1c55c8d9f..578ada88fa6 100644 ---- a/gcc/config/arm/arm_neon.h -+++ b/gcc/config/arm/arm_neon.h -@@ -10854,7 +10854,7 @@ vld1q_s64_x2 (const int64_t * __a) - - __extension__ extern __inline int8x16x3_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s8_x3 (const uint8_t * __a) -+vld1q_s8_x3 (const int8_t * __a) - { - union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a); -@@ -10863,7 +10863,7 @@ vld1q_s8_x3 (const uint8_t * __a) - - __extension__ extern __inline int16x8x3_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s16_x3 (const uint16_t * __a) -+vld1q_s16_x3 (const int16_t * __a) - { - union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a); -@@ -10890,7 +10890,7 @@ vld1q_s64_x3 (const int64_t * __a) - - __extension__ extern __inline int8x16x4_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s8_x4 (const uint8_t * __a) -+vld1q_s8_x4 (const int8_t * __a) - { - union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x4v16qi ((const __builtin_neon_qi *) __a); -@@ -10899,7 +10899,7 @@ vld1q_s8_x4 (const uint8_t * __a) - - __extension__ extern __inline int16x8x4_t - __attribute__ ((__always_inline__, __gnu_inline__, __artificial__)) --vld1q_s16_x4 (const uint16_t * __a) -+vld1q_s16_x4 (const int16_t * __a) - { - union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv; - __rv.__o = __builtin_neon_vld1q_x4v8hi ((const __builtin_neon_hi *) __a); -diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -index 01b29b60084..c73afe2b723 100644 ---- a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -+++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c -@@ -1,6 +1,6 @@ - /* { dg-do assemble } */ - /* { dg-require-effective-target arm_neon_ok } */ --/* { dg-options "-save-temps -O2" } */ -+/* { dg-options "-save-temps -O2 -Wpointer-sign" } */ - /* { dg-add-options arm_neon } */ - - #include "arm_neon.h" --- -2.48.1 - diff --git a/cross/gcc-x86_64/APKBUILD b/cross/gcc-x86_64/APKBUILD index 3c5be1bb3..f9d2da356 100644 --- a/cross/gcc-x86_64/APKBUILD +++ b/cross/gcc-x86_64/APKBUILD @@ -24,7 +24,7 @@ CBUILDROOT="/" _cross_configure="--disable-bootstrap --with-sysroot=/usr/$CTARGET" pkgname=gcc-x86_64 -pkgver=14.2.0 +pkgver=14.3.0 # i.e. 13.2.1, must match gcc/BASE-VER _pkgbase="${pkgver%%_git*}" # date component from snapshots @@ -34,7 +34,7 @@ _pkgsnap="${pkgver##*_git}" [ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target="" pkgname=gcc-x86_64 -pkgrel=6 +pkgrel=1 pkgdesc="Stage2 cross-compiler for x86_64" url="https://gcc.gnu.org" arch="aarch64" @@ -278,10 +278,6 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz 0034-libgo-fix-lfs64-use.patch 0035-loongarch-disable-multilib-support.patch 0036-libphobos-add-riscv64-and-loongarch64-support.patch - 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch - fix-arm64.patch - ppc64le-quadmath.patch - riscv64-improve-build-time.patch " # secfixes: @@ -291,8 +287,8 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz # we build out-of-tree #builddir="$srcdir"/gcc-${_pkgbase%%.*}-$_pkgsnap builddir="$srcdir"/gcc-$_pkgbase -_gcclibdir="/usr/lib/gcc/$CTARGET/$_pkgbase" -_gcclibexec="/usr/libexec/gcc/$CTARGET/$_pkgbase" +_gcclibdir="usr/lib/gcc/$CTARGET/$_pkgbase" +_gcclibexec="usr/libexec/gcc/$CTARGET/$_pkgbase" prepare() { default_prepare @@ -319,7 +315,7 @@ build() { i586-*-*-*) _arch_configure="--with-arch=pentium-m --with-fpmath=sse --with-tune=generic --enable-cld";; s390x-*-*-*) _arch_configure="--with-arch=z196 --with-tune=zEC12 --with-zarch --with-long-double-128 --enable-decimal-float";; riscv64-*-*-*) _arch_configure="--with-arch=rv64gc --with-abi=lp64d --enable-autolink-libatomic";; - loongarch64-*-*-*) _arch_configure="--with-arch=la64v1.0 --with-abi=lp64d";; + loongarch64-*-*-*) _arch_configure="--with-arch=la64v1.0 --with-abi=lp64d";; esac case "$CTARGET_ARCH" in @@ -431,6 +427,11 @@ package() { [ "$CHOST" = "$CTARGET" ] && ln -s gcc "$pkgdir"/usr/bin/cc ln -s ${CTARGET}-gcc "$pkgdir"/usr/bin/${CTARGET}-cc + # symlink to vendor-less target triple for + # supporting clang --target's fallback match + # ref: https://gitlab.alpinelinux.org/alpine/aports/-/issues/16828 + ln -s "$CTARGET" "$pkgdir/usr/lib/gcc/${CTARGET%%-*}-${CTARGET#*-*-}" + if $LANG_JIT; then make -C "$_builddir"/libgccjit-build/gcc DESTDIR="$pkgdir" jit.install-common fi @@ -487,8 +488,6 @@ package() { # libcc1 does not depend on target, don't ship it rm -rf "$pkgdir"/usr/lib/libcc1.so* - # These are moved into packages with arch=$CTARGET_ARCH so remove - # cross prefix (doesn't exist when BOOTSTRAP=nolibc) # fixup gcc library symlinks to be linker scripts so # linker finds the libs from relocated sysroot @@ -572,7 +571,7 @@ gpp() { depends="libstdc++-dev$_target=$_gccrel gcc$_target=$_gccrel musl-dev" [ "$CHOST" = "$CTARGET" ] && depends="$depends libstdc++=$_gccrel" - depends="$depends so:libc.musl-x86_64.so.1 so:libgmp.so.10 so:libisl.so.23 so:libmpc.so.3 so:libmpfr.so.6 so:libz.so.1" + depends="$depends so:libc.musl-aarch64.so.1 so:libgmp.so.10 so:libisl.so.23 so:libmpc.so.3 so:libmpfr.so.6 so:libz.so.1" amove $_gcclibexec/cc1plus amove usr/bin/*++ @@ -663,7 +662,6 @@ libgo() { go() { pkgdesc="GCC Go frontend (intended for bootstrapping community/go)" depends="gcc=$_gccrel libgo=$_gccrel !go" - install="$pkgname-go.post-install" amove usr/lib/go amove usr/bin/*go @@ -747,45 +745,41 @@ gdb() { } sha512sums=" -932bdef0cda94bacedf452ab17f103c0cb511ff2cec55e9112fc0328cbf1d803b42595728ea7b200e0a057c03e85626f937012e49a7515bc5dd256b2bf4bc396 gcc-14.2.0.tar.xz +cb4e3259640721bbd275c723fe4df53d12f9b1673afb3db274c22c6aa457865dccf2d6ea20b4fd4c591f6152e6d4b87516c402015900f06ce9d43af66d3b7a93 gcc-14.3.0.tar.xz 1ecffba1b07d60e1b4422302b032bbea918b674c8e12b30aa6965b544d700ce86b61e9f7b8d402c6caf59257f491a394dd0912f0948565d6eae9335ee54f3b35 0001-posix_memalign.patch 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riscv64-improve-build-time.patch " diff --git a/cross/gcc-x86_64/fix-arm64.patch b/cross/gcc-x86_64/fix-arm64.patch deleted file mode 100644 index 8aaa9f742..000000000 --- a/cross/gcc-x86_64/fix-arm64.patch +++ /dev/null @@ -1,544 +0,0 @@ -From 2894660df1292153632edbc2a5b66eaf6a864660 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Thu, 13 Jun 2024 12:48:21 +0100 -Subject: [PATCH 1/4] aarch64: Fix invalid nested subregs [PR115464] - -The testcase extracts one arm_neon.h vector from a pair (one subreg) -and then reinterprets the result as an SVE vector (another subreg). -Each subreg makes sense individually, but we can't fold them together -into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes, -but the interpretation of 32 bytes -> 16*N bytes depends on -whether N==1 or N>1. - -Since the second subreg makes sense individually, simplify_subreg -should bail out rather than ICE on it. simplify_gen_subreg will -then do the same (because it already checks validate_subreg). -This leaves simplify_gen_subreg returning null, requiring the -caller to take appropriate action. - -I think this is relatively likely to occur elsewhere, so the patch -adds a helper for forcing a subreg, allowing a temporary pseudo to -be created where necessary. - -I'll follow up by using force_subreg in more places. This patch -is intended to be a minimal backportable fix for the PR. - -gcc/ - PR target/115464 - * simplify-rtx.cc (simplify_context::simplify_subreg): Don't try - to fold two subregs together if their relationship isn't known - at compile time. - * explow.h (force_subreg): Declare. - * explow.cc (force_subreg): New function. - * config/aarch64/aarch64-sve-builtins-base.cc - (svset_neonq_impl::expand): Use it instead of simplify_gen_subreg. - -gcc/testsuite/ - PR target/115464 - * gcc.target/aarch64/sve/acle/general/pr115464.c: New test. - -(cherry picked from commit 0970ff46ba6330fc80e8736fc05b2eaeeae0b6a0) ---- - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- - gcc/explow.cc | 15 +++++++++++++++ - gcc/explow.h | 2 ++ - gcc/simplify-rtx.cc | 5 +++++ - .../aarch64/sve/acle/general/pr115464.c | 13 +++++++++++++ - 5 files changed, 36 insertions(+), 1 deletion(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c - -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index 0d2edf3f19e..c9182594bc1 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1174,7 +1174,7 @@ public: - Advanced SIMD argument as an SVE vector. */ - if (!BYTES_BIG_ENDIAN - && is_undef (CALL_EXPR_ARG (e.call_expr, 0))) -- return simplify_gen_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0); -+ return force_subreg (mode, e.args[1], GET_MODE (e.args[1]), 0); - - rtx_vector_builder builder (VNx16BImode, 16, 2); - for (unsigned int i = 0; i < 16; i++) -diff --git a/gcc/explow.cc b/gcc/explow.cc -index 8e5f6b8e680..f6843398c4b 100644 ---- a/gcc/explow.cc -+++ b/gcc/explow.cc -@@ -745,6 +745,21 @@ force_reg (machine_mode mode, rtx x) - return temp; - } - -+/* Like simplify_gen_subreg, but force OP into a new register if the -+ subreg cannot be formed directly. */ -+ -+rtx -+force_subreg (machine_mode outermode, rtx op, -+ machine_mode innermode, poly_uint64 byte) -+{ -+ rtx x = simplify_gen_subreg (outermode, op, innermode, byte); -+ if (x) -+ return x; -+ -+ op = copy_to_mode_reg (innermode, op); -+ return simplify_gen_subreg (outermode, op, innermode, byte); -+} -+ - /* If X is a memory ref, copy its contents to a new temp reg and return - that reg. Otherwise, return X. */ - -diff --git a/gcc/explow.h b/gcc/explow.h -index 16aa02cfb68..cbd1fcb7eb3 100644 ---- a/gcc/explow.h -+++ b/gcc/explow.h -@@ -42,6 +42,8 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode); - Args are mode (in case value is a constant) and the value. */ - extern rtx force_reg (machine_mode, rtx); - -+extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64); -+ - /* Return given rtx, copied into a new temp reg if it was in memory. */ - extern rtx force_not_mem (rtx); - -diff --git a/gcc/simplify-rtx.cc b/gcc/simplify-rtx.cc -index dceaa13333c..729d408aa55 100644 ---- a/gcc/simplify-rtx.cc -+++ b/gcc/simplify-rtx.cc -@@ -7612,6 +7612,11 @@ simplify_context::simplify_subreg (machine_mode outermode, rtx op, - poly_uint64 innermostsize = GET_MODE_SIZE (innermostmode); - rtx newx; - -+ /* Make sure that the relationship between the two subregs is -+ known at compile time. */ -+ if (!ordered_p (outersize, innermostsize)) -+ return NULL_RTX; -+ - if (outermode == innermostmode - && known_eq (byte, 0U) - && known_eq (SUBREG_BYTE (op), 0)) -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c -new file mode 100644 -index 00000000000..d728d1325ed ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464.c -@@ -0,0 +1,13 @@ -+/* { dg-options "-O2" } */ -+ -+#include -+#include -+#include -+ -+svuint16_t -+convolve4_4_x (uint16x8x2_t permute_tbl) -+{ -+ return svset_neonq_u16 (svundef_u16 (), permute_tbl.val[1]); -+} -+ -+/* { dg-final { scan-assembler {\tmov\tz0\.d, z1\.d\n} } } */ --- -2.46.0 - - -From 7edecb21012d88902c60d38f5865bc254eaa9c55 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:30 +0100 -Subject: [PATCH 2/4] aarch64: Use force_subreg in more places - -This patch makes the aarch64 code use force_subreg instead of -simplify_gen_subreg in more places. The criteria were: - -(1) The code is obviously specific to expand (where new pseudos - can be created). - -(2) The value is obviously an rvalue rather than an lvalue. - -(3) The offset wasn't a simple lowpart or highpart calculation; - a later patch will deal with those. - -gcc/ - * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin): - Use force_subreg instead of simplify_gen_subreg. - * config/aarch64/aarch64-simd.md (ctz2): Likewise. - * config/aarch64/aarch64-sve-builtins-base.cc - (svget_impl::expand): Likewise. - (svget_neonq_impl::expand): Likewise. - * config/aarch64/aarch64-sve-builtins-functions.h - (multireg_permute::expand): Likewise. - -(cherry picked from commit 1474a8eead4ab390e59ee014befa8c40346679f4) ---- - gcc/config/aarch64/aarch64-builtins.cc | 4 ++-- - gcc/config/aarch64/aarch64-simd.md | 4 ++-- - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 8 +++----- - gcc/config/aarch64/aarch64-sve-builtins-functions.h | 6 +++--- - 4 files changed, 10 insertions(+), 12 deletions(-) - -diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc -index 75d21de1401..b2e46a073a8 100644 ---- a/gcc/config/aarch64/aarch64-builtins.cc -+++ b/gcc/config/aarch64/aarch64-builtins.cc -@@ -2510,12 +2510,12 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - rtx temp2 = gen_reg_rtx (DImode); - temp1 = simplify_gen_subreg (d->mode, op2, quadmode, - subreg_lowpart_offset (d->mode, quadmode)); -- temp1 = simplify_gen_subreg (V2DImode, temp1, d->mode, 0); -+ temp1 = force_subreg (V2DImode, temp1, d->mode, 0); - if (BYTES_BIG_ENDIAN) - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx)); - else - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const1_rtx)); -- op2 = simplify_gen_subreg (d->mode, temp2, GET_MODE (temp2), 0); -+ op2 = force_subreg (d->mode, temp2, GET_MODE (temp2), 0); - - /* And recalculate the index. */ - lane -= nunits / 4; -diff --git a/gcc/config/aarch64/aarch64-simd.md b/gcc/config/aarch64/aarch64-simd.md -index 33ab0741e87..5b9efe0b165 100644 ---- a/gcc/config/aarch64/aarch64-simd.md -+++ b/gcc/config/aarch64/aarch64-simd.md -@@ -412,8 +412,8 @@ - "TARGET_SIMD" - { - emit_insn (gen_bswap2 (operands[0], operands[1])); -- rtx op0_castsi2qi = simplify_gen_subreg(mode, operands[0], -- mode, 0); -+ rtx op0_castsi2qi = force_subreg (mode, operands[0], -+ mode, 0); - emit_insn (gen_aarch64_rbit (op0_castsi2qi, op0_castsi2qi)); - emit_insn (gen_clz2 (operands[0], operands[0])); - DONE; -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index c9182594bc1..2c95da79572 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1121,9 +1121,8 @@ public: - expand (function_expander &e) const override - { - /* Fold the access into a subreg rvalue. */ -- return simplify_gen_subreg (e.vector_mode (0), e.args[0], -- GET_MODE (e.args[0]), -- INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR); -+ return force_subreg (e.vector_mode (0), e.args[0], GET_MODE (e.args[0]), -+ INTVAL (e.args[1]) * BYTES_PER_SVE_VECTOR); - } - }; - -@@ -1157,8 +1156,7 @@ public: - e.add_fixed_operand (indices); - return e.generate_insn (icode); - } -- return simplify_gen_subreg (e.result_mode (), e.args[0], -- GET_MODE (e.args[0]), 0); -+ return force_subreg (e.result_mode (), e.args[0], GET_MODE (e.args[0]), 0); - } - }; - -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-functions.h b/gcc/config/aarch64/aarch64-sve-builtins-functions.h -index 3b8e575e98e..7d06a57ff83 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-functions.h -+++ b/gcc/config/aarch64/aarch64-sve-builtins-functions.h -@@ -639,9 +639,9 @@ public: - { - machine_mode elt_mode = e.vector_mode (0); - rtx arg = e.args[0]; -- e.args[0] = simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), 0); -- e.args.safe_push (simplify_gen_subreg (elt_mode, arg, GET_MODE (arg), -- GET_MODE_SIZE (elt_mode))); -+ e.args[0] = force_subreg (elt_mode, arg, GET_MODE (arg), 0); -+ e.args.safe_push (force_subreg (elt_mode, arg, GET_MODE (arg), -+ GET_MODE_SIZE (elt_mode))); - } - return e.use_exact_insn (icode); - } --- -2.46.0 - - -From 0ab664f41762803a72e5e99025b0512cad493985 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:31 +0100 -Subject: [PATCH 3/4] aarch64: Add some uses of force_lowpart_subreg - -This patch makes more use of force_lowpart_subreg, similarly -to the recent patch for force_subreg. The criteria were: - -(1) The code is obviously specific to expand (where new pseudos - can be created). - -(2) The value is obviously an rvalue rather than an lvalue. - -gcc/ - PR target/115464 - * config/aarch64/aarch64-builtins.cc (aarch64_expand_fcmla_builtin) - (aarch64_expand_rwsr_builtin): Use force_lowpart_subreg instead of - simplify_gen_subreg and lowpart_subreg. - * config/aarch64/aarch64-sve-builtins-base.cc - (svset_neonq_impl::expand): Likewise. - * config/aarch64/aarch64-sve-builtins-sme.cc - (add_load_store_slice_operand): Likewise. - * config/aarch64/aarch64.cc (aarch64_sve_reinterpret): Likewise. - (aarch64_addti_scratch_regs, aarch64_subvti_scratch_regs): Likewise. - -gcc/testsuite/ - PR target/115464 - * gcc.target/aarch64/sve/acle/general/pr115464_2.c: New test. - -(cherry picked from commit 6bd4fbae45d11795a9a6f54b866308d4d7134def) ---- - gcc/config/aarch64/aarch64-builtins.cc | 11 +++++------ - gcc/config/aarch64/aarch64-sve-builtins-base.cc | 2 +- - gcc/config/aarch64/aarch64-sve-builtins-sme.cc | 2 +- - gcc/config/aarch64/aarch64.cc | 14 +++++--------- - .../aarch64/sve/acle/general/pr115464_2.c | 11 +++++++++++ - 5 files changed, 23 insertions(+), 17 deletions(-) - create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c - -diff --git a/gcc/config/aarch64/aarch64-builtins.cc b/gcc/config/aarch64/aarch64-builtins.cc -index b2e46a073a8..264b9560709 100644 ---- a/gcc/config/aarch64/aarch64-builtins.cc -+++ b/gcc/config/aarch64/aarch64-builtins.cc -@@ -2497,8 +2497,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - int lane = INTVAL (lane_idx); - - if (lane < nunits / 4) -- op2 = simplify_gen_subreg (d->mode, op2, quadmode, -- subreg_lowpart_offset (d->mode, quadmode)); -+ op2 = force_lowpart_subreg (d->mode, op2, quadmode); - else - { - /* Select the upper 64 bits, either a V2SF or V4HF, this however -@@ -2508,8 +2507,7 @@ aarch64_expand_fcmla_builtin (tree exp, rtx target, int fcode) - gen_highpart_mode generates code that isn't optimal. */ - rtx temp1 = gen_reg_rtx (d->mode); - rtx temp2 = gen_reg_rtx (DImode); -- temp1 = simplify_gen_subreg (d->mode, op2, quadmode, -- subreg_lowpart_offset (d->mode, quadmode)); -+ temp1 = force_lowpart_subreg (d->mode, op2, quadmode); - temp1 = force_subreg (V2DImode, temp1, d->mode, 0); - if (BYTES_BIG_ENDIAN) - emit_insn (gen_aarch64_get_lanev2di (temp2, temp1, const0_rtx)); -@@ -2754,7 +2752,7 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode) - case AARCH64_WSR64: - case AARCH64_WSRF64: - case AARCH64_WSR128: -- subreg = lowpart_subreg (sysreg_mode, input_val, mode); -+ subreg = force_lowpart_subreg (sysreg_mode, input_val, mode); - break; - case AARCH64_WSRF: - subreg = gen_lowpart_SUBREG (SImode, input_val); -@@ -2789,7 +2787,8 @@ aarch64_expand_rwsr_builtin (tree exp, rtx target, int fcode) - case AARCH64_RSR64: - case AARCH64_RSRF64: - case AARCH64_RSR128: -- return lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), target, sysreg_mode); -+ return force_lowpart_subreg (TYPE_MODE (TREE_TYPE (exp)), -+ target, sysreg_mode); - case AARCH64_RSRF: - subreg = gen_lowpart_SUBREG (SImode, target); - return gen_lowpart_SUBREG (SFmode, subreg); -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-base.cc b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -index 2c95da79572..3c970e9c5f8 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-base.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-base.cc -@@ -1183,7 +1183,7 @@ public: - if (BYTES_BIG_ENDIAN) - return e.use_exact_insn (code_for_aarch64_sve_set_neonq (mode)); - insn_code icode = code_for_vcond_mask (mode, mode); -- e.args[1] = lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1])); -+ e.args[1] = force_lowpart_subreg (mode, e.args[1], GET_MODE (e.args[1])); - e.add_output_operand (icode); - e.add_input_operand (icode, e.args[1]); - e.add_input_operand (icode, e.args[0]); -diff --git a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -index f4c91bcbb95..b66b35ae60b 100644 ---- a/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -+++ b/gcc/config/aarch64/aarch64-sve-builtins-sme.cc -@@ -112,7 +112,7 @@ add_load_store_slice_operand (function_expander &e, insn_code icode, - rtx base = e.args[argno]; - if (e.mode_suffix_id == MODE_vnum) - { -- rtx vnum = lowpart_subreg (SImode, e.args[vnum_argno], DImode); -+ rtx vnum = force_lowpart_subreg (SImode, e.args[vnum_argno], DImode); - base = simplify_gen_binary (PLUS, SImode, base, vnum); - } - e.add_input_operand (icode, base); -diff --git a/gcc/config/aarch64/aarch64.cc b/gcc/config/aarch64/aarch64.cc -index 1beec94629d..a064aeecbc0 100644 ---- a/gcc/config/aarch64/aarch64.cc -+++ b/gcc/config/aarch64/aarch64.cc -@@ -3284,7 +3284,7 @@ aarch64_sve_reinterpret (machine_mode mode, rtx x) - /* can_change_mode_class must only return true if subregs and svreinterprets - have the same semantics. */ - if (targetm.can_change_mode_class (GET_MODE (x), mode, FP_REGS)) -- return lowpart_subreg (mode, x, GET_MODE (x)); -+ return force_lowpart_subreg (mode, x, GET_MODE (x)); - - rtx res = gen_reg_rtx (mode); - x = force_reg (GET_MODE (x), x); -@@ -26979,9 +26979,8 @@ aarch64_addti_scratch_regs (rtx op1, rtx op2, rtx *low_dest, - rtx *high_in2) - { - *low_dest = gen_reg_rtx (DImode); -- *low_in1 = gen_lowpart (DImode, op1); -- *low_in2 = simplify_gen_subreg (DImode, op2, TImode, -- subreg_lowpart_offset (DImode, TImode)); -+ *low_in1 = force_lowpart_subreg (DImode, op1, TImode); -+ *low_in2 = force_lowpart_subreg (DImode, op2, TImode); - *high_dest = gen_reg_rtx (DImode); - *high_in1 = gen_highpart (DImode, op1); - *high_in2 = simplify_gen_subreg (DImode, op2, TImode, -@@ -27013,11 +27012,8 @@ aarch64_subvti_scratch_regs (rtx op1, rtx op2, rtx *low_dest, - rtx *high_in2) - { - *low_dest = gen_reg_rtx (DImode); -- *low_in1 = simplify_gen_subreg (DImode, op1, TImode, -- subreg_lowpart_offset (DImode, TImode)); -- -- *low_in2 = simplify_gen_subreg (DImode, op2, TImode, -- subreg_lowpart_offset (DImode, TImode)); -+ *low_in1 = force_lowpart_subreg (DImode, op1, TImode); -+ *low_in2 = force_lowpart_subreg (DImode, op2, TImode); - *high_dest = gen_reg_rtx (DImode); - - *high_in1 = simplify_gen_subreg (DImode, op1, TImode, -diff --git a/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c -new file mode 100644 -index 00000000000..f561c34f732 ---- /dev/null -+++ b/gcc/testsuite/gcc.target/aarch64/sve/acle/general/pr115464_2.c -@@ -0,0 +1,11 @@ -+/* { dg-options "-O2" } */ -+ -+#include -+#include -+#include -+ -+svuint16_t -+convolve4_4_x (uint16x8x2_t permute_tbl, svuint16_t a) -+{ -+ return svset_neonq_u16 (a, permute_tbl.val[1]); -+} --- -2.46.0 - - -From e21a377dea6edfaaa494f07974135e58ff66eef1 Mon Sep 17 00:00:00 2001 -From: Richard Sandiford -Date: Tue, 18 Jun 2024 12:22:31 +0100 -Subject: [PATCH 4/4] Add force_lowpart_subreg - -optabs had a local function called lowpart_subreg_maybe_copy -that is very similar to the lowpart version of force_subreg. -This patch adds a force_lowpart_subreg wrapper around -force_subreg and uses it in optabs.cc. - -The only difference between the old and new functions is that -the old one asserted success while the new one doesn't. -It's common not to assert elsewhere when taking subregs; -normally a null result is enough. - -Later patches will make more use of the new function. - -gcc/ - * explow.h (force_lowpart_subreg): Declare. - * explow.cc (force_lowpart_subreg): New function. - * optabs.cc (lowpart_subreg_maybe_copy): Delete. - (expand_absneg_bit): Use force_lowpart_subreg instead of - lowpart_subreg_maybe_copy. - (expand_copysign_bit): Likewise. - -(cherry picked from commit 5f40d1c0cc6ce91ef28d326b8707b3f05e6f239c) ---- - gcc/explow.cc | 14 ++++++++++++++ - gcc/explow.h | 1 + - gcc/optabs.cc | 24 ++---------------------- - 3 files changed, 17 insertions(+), 22 deletions(-) - -diff --git a/gcc/explow.cc b/gcc/explow.cc -index f6843398c4b..5fdfa81f69b 100644 ---- a/gcc/explow.cc -+++ b/gcc/explow.cc -@@ -760,6 +760,20 @@ force_subreg (machine_mode outermode, rtx op, - return simplify_gen_subreg (outermode, op, innermode, byte); - } - -+/* Try to return an rvalue expression for the OUTERMODE lowpart of OP, -+ which has mode INNERMODE. Allow OP to be forced into a new register -+ if necessary. -+ -+ Return null on failure. */ -+ -+rtx -+force_lowpart_subreg (machine_mode outermode, rtx op, -+ machine_mode innermode) -+{ -+ auto byte = subreg_lowpart_offset (outermode, innermode); -+ return force_subreg (outermode, op, innermode, byte); -+} -+ - /* If X is a memory ref, copy its contents to a new temp reg and return - that reg. Otherwise, return X. */ - -diff --git a/gcc/explow.h b/gcc/explow.h -index cbd1fcb7eb3..dd654649b06 100644 ---- a/gcc/explow.h -+++ b/gcc/explow.h -@@ -43,6 +43,7 @@ extern rtx copy_to_suggested_reg (rtx, rtx, machine_mode); - extern rtx force_reg (machine_mode, rtx); - - extern rtx force_subreg (machine_mode, rtx, machine_mode, poly_uint64); -+extern rtx force_lowpart_subreg (machine_mode, rtx, machine_mode); - - /* Return given rtx, copied into a new temp reg if it was in memory. */ - extern rtx force_not_mem (rtx); -diff --git a/gcc/optabs.cc b/gcc/optabs.cc -index ce91f94ed43..804c0dc73ba 100644 ---- a/gcc/optabs.cc -+++ b/gcc/optabs.cc -@@ -3096,26 +3096,6 @@ expand_ffs (scalar_int_mode mode, rtx op0, rtx target) - return 0; - } - --/* Extract the OMODE lowpart from VAL, which has IMODE. Under certain -- conditions, VAL may already be a SUBREG against which we cannot generate -- a further SUBREG. In this case, we expect forcing the value into a -- register will work around the situation. */ -- --static rtx --lowpart_subreg_maybe_copy (machine_mode omode, rtx val, -- machine_mode imode) --{ -- rtx ret; -- ret = lowpart_subreg (omode, val, imode); -- if (ret == NULL) -- { -- val = force_reg (imode, val); -- ret = lowpart_subreg (omode, val, imode); -- gcc_assert (ret != NULL); -- } -- return ret; --} -- - /* Expand a floating point absolute value or negation operation via a - logical operation on the sign bit. */ - -@@ -3204,7 +3184,7 @@ expand_absneg_bit (enum rtx_code code, scalar_float_mode mode, - gen_lowpart (imode, op0), - immed_wide_int_const (mask, imode), - gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN); -- target = lowpart_subreg_maybe_copy (mode, temp, imode); -+ target = force_lowpart_subreg (mode, temp, imode); - - set_dst_reg_note (get_last_insn (), REG_EQUAL, - gen_rtx_fmt_e (code, mode, copy_rtx (op0)), -@@ -4043,7 +4023,7 @@ expand_copysign_bit (scalar_float_mode mode, rtx op0, rtx op1, rtx target, - - temp = expand_binop (imode, ior_optab, op0, op1, - gen_lowpart (imode, target), 1, OPTAB_LIB_WIDEN); -- target = lowpart_subreg_maybe_copy (mode, temp, imode); -+ target = force_lowpart_subreg (mode, temp, imode); - } - - return target; --- -2.46.0 - diff --git a/cross/gcc-x86_64/gcc-go.post-install b/cross/gcc-x86_64/gcc-go.post-install deleted file mode 100644 index 6805fa7cf..000000000 --- a/cross/gcc-x86_64/gcc-go.post-install +++ /dev/null @@ -1,8 +0,0 @@ -#!/bin/sh - -cat 1>&2 < -Date: Sat, 3 Aug 2024 20:37:54 +0200 -Subject: [PATCH] libquadmath: Fix up libquadmath/math/sqrtq.c compilation in - some powerpc* configurations [PR116007] - -My PR114623 change started using soft-fp.h and quad.h for the sqrtq implementation. -Unfortunately, that seems to fail building in some powerpc* configurations, where -TFmode isn't available. -quad.h has: - #ifndef TFtype - typedef float TFtype __attribute__ ((mode (TF))); - #endif -and uses TFtype. quad.h has: - /* Define the complex type corresponding to __float128 - ("_Complex __float128" is not allowed) */ - #if (!defined(_ARCH_PPC)) || defined(__LONG_DOUBLE_IEEE128__) - typedef _Complex float __attribute__((mode(TC))) __complex128; - #else - typedef _Complex float __attribute__((mode(KC))) __complex128; - #endif -with the conditional and KCmode use added during porting of libquadmath -to powerpc*, so I've just defined TFtype for powerpc when __LONG_DOUBLE_IEEE128__ -isn't defined; I could define it to float __attribute__ ((mode (KF))) but it -seemed easier to just define it to __float128 which should do the same thing. - -2024-08-03 Jakub Jelinek - - PR target/116007 - * math/sqrtq.c (TFtype): For PowerPC without __LONG_DOUBLE_IEEE128__ - define to __float128 before including soft-fp.h and quad.h. - -(cherry picked from commit 3ac02e67503ccffa3dfeeffc0a60fce6bdaca43b) ---- - libquadmath/math/sqrtq.c | 3 +++ - 1 file changed, 3 insertions(+) - -diff --git a/libquadmath/math/sqrtq.c b/libquadmath/math/sqrtq.c -index 8ca2828d42ce..a58998a06670 100644 ---- a/libquadmath/math/sqrtq.c -+++ b/libquadmath/math/sqrtq.c -@@ -9,6 +9,9 @@ - && defined(FE_TOWARDZERO) \ - && defined(FE_INEXACT) - #define USE_SOFT_FP 1 -+#if defined(_ARCH_PPC) && !defined(__LONG_DOUBLE_IEEE128__) -+#define TFtype __float128 -+#endif - #include "../../libgcc/soft-fp/soft-fp.h" - #include "../../libgcc/soft-fp/quad.h" - #endif --- -2.43.5 - diff --git a/cross/gcc-x86_64/riscv64-improve-build-time.patch b/cross/gcc-x86_64/riscv64-improve-build-time.patch deleted file mode 100644 index 2c8c52a2c..000000000 --- a/cross/gcc-x86_64/riscv64-improve-build-time.patch +++ /dev/null @@ -1,149 +0,0 @@ -Patch-Source: https://gcc.gnu.org/git/?p=gcc.git;a=patch;h=2cf89ae83225f932b226cd57ef2d083a59bcf8a3 --- -From 2cf89ae83225f932b226cd57ef2d083a59bcf8a3 Mon Sep 17 00:00:00 2001 -From: Richard Biener -Date: Tue, 6 Aug 2024 14:56:26 +0200 -Subject: [PATCH] tree-optimization/116166 - forward jump-threading going wild - -Currently the forward threader isn't limited as to the search space -it explores and with it now using path-ranger for simplifying -conditions it runs into it became pretty slow for degenerate cases -like compiling insn-emit.cc for RISC-V esp. when compiling for -a host with LOGICAL_OP_NON_SHORT_CIRCUIT disabled. - -The following makes the forward threader honor the search space -limit I introduced for the backward threader. This reduces -compile-time from minutes to seconds for the testcase in PR116166. - -Note this wasn't necessary before we had ranger but with ranger -the work we do is quadatic in the length of the threading path -we build up (the same is true for the backwards threader). - - PR tree-optimization/116166 - * tree-ssa-threadedge.h (jump_threader::thread_around_empty_blocks): - Add limit parameter. - (jump_threader::thread_through_normal_block): Likewise. - * tree-ssa-threadedge.cc (jump_threader::thread_around_empty_blocks): - Honor and decrement limit parameter. - (jump_threader::thread_through_normal_block): Likewise. - (jump_threader::thread_across_edge): Initialize limit from - param_max_jump_thread_paths and pass it down to workers. ---- - gcc/tree-ssa-threadedge.cc | 30 ++++++++++++++++++++++-------- - gcc/tree-ssa-threadedge.h | 4 ++-- - 2 files changed, 24 insertions(+), 10 deletions(-) - -diff --git a/gcc/tree-ssa-threadedge.cc b/gcc/tree-ssa-threadedge.cc -index 7f82639b8ecc..0aa2aa851430 100644 ---- a/gcc/tree-ssa-threadedge.cc -+++ b/gcc/tree-ssa-threadedge.cc -@@ -786,13 +786,17 @@ propagate_threaded_block_debug_into (basic_block dest, basic_block src) - bool - jump_threader::thread_around_empty_blocks (vec *path, - edge taken_edge, -- bitmap visited) -+ bitmap visited, unsigned &limit) - { - basic_block bb = taken_edge->dest; - gimple_stmt_iterator gsi; - gimple *stmt; - tree cond; - -+ if (limit == 0) -+ return false; -+ --limit; -+ - /* The key property of these blocks is that they need not be duplicated - when threading. Thus they cannot have visible side effects such - as PHI nodes. */ -@@ -830,7 +834,8 @@ jump_threader::thread_around_empty_blocks (vec *path, - m_registry->push_edge (path, taken_edge, EDGE_NO_COPY_SRC_BLOCK); - m_state->append_path (taken_edge->dest); - bitmap_set_bit (visited, taken_edge->dest->index); -- return thread_around_empty_blocks (path, taken_edge, visited); -+ return thread_around_empty_blocks (path, taken_edge, visited, -+ limit); - } - } - -@@ -872,7 +877,7 @@ jump_threader::thread_around_empty_blocks (vec *path, - m_registry->push_edge (path, taken_edge, EDGE_NO_COPY_SRC_BLOCK); - m_state->append_path (taken_edge->dest); - -- thread_around_empty_blocks (path, taken_edge, visited); -+ thread_around_empty_blocks (path, taken_edge, visited, limit); - return true; - } - -@@ -899,8 +904,13 @@ jump_threader::thread_around_empty_blocks (vec *path, - - int - jump_threader::thread_through_normal_block (vec *path, -- edge e, bitmap visited) -+ edge e, bitmap visited, -+ unsigned &limit) - { -+ if (limit == 0) -+ return 0; -+ limit--; -+ - m_state->register_equivs_edge (e); - - /* PHIs create temporary equivalences. -@@ -989,7 +999,7 @@ jump_threader::thread_through_normal_block (vec *path, - visited. This may be overly conservative. */ - bitmap_set_bit (visited, dest->index); - bitmap_set_bit (visited, e->dest->index); -- thread_around_empty_blocks (path, taken_edge, visited); -+ thread_around_empty_blocks (path, taken_edge, visited, limit); - return 1; - } - } -@@ -1075,9 +1085,12 @@ jump_threader::thread_across_edge (edge e) - bitmap_set_bit (visited, e->src->index); - bitmap_set_bit (visited, e->dest->index); - -+ /* Limit search space. */ -+ unsigned limit = param_max_jump_thread_paths; -+ - int threaded = 0; - if ((e->flags & EDGE_DFS_BACK) == 0) -- threaded = thread_through_normal_block (path, e, visited); -+ threaded = thread_through_normal_block (path, e, visited, limit); - - if (threaded > 0) - { -@@ -1148,11 +1161,12 @@ jump_threader::thread_across_edge (edge e) - m_registry->push_edge (path, e, EDGE_START_JUMP_THREAD); - m_registry->push_edge (path, taken_edge, EDGE_COPY_SRC_JOINER_BLOCK); - -- found = thread_around_empty_blocks (path, taken_edge, visited); -+ found = thread_around_empty_blocks (path, taken_edge, visited, limit); - - if (!found) - found = thread_through_normal_block (path, -- path->last ()->e, visited) > 0; -+ path->last ()->e, visited, -+ limit) > 0; - - /* If we were able to thread through a successor of E->dest, then - record the jump threading opportunity. */ -diff --git a/gcc/tree-ssa-threadedge.h b/gcc/tree-ssa-threadedge.h -index 9f6cbfe93307..245b3506a550 100644 ---- a/gcc/tree-ssa-threadedge.h -+++ b/gcc/tree-ssa-threadedge.h -@@ -101,9 +101,9 @@ private: - unsigned limit); - - bool thread_around_empty_blocks (vec *path, -- edge, bitmap visited); -+ edge, bitmap visited, unsigned &limit); - int thread_through_normal_block (vec *path, -- edge, bitmap visited); -+ edge, bitmap visited, unsigned &limit); - void thread_across_edge (edge); - bool record_temporary_equivalences_from_phis (edge); - gimple *record_temporary_equivalences_from_stmts_at_dest (edge); --- -2.43.5 -