linux-clockworkpi-uconsole-radxa-cm5: add uconsole drivers

Part-of: <https://gitlab.postmarketos.org/postmarketOS/pmaports/-/merge_requests/7918>
This commit is contained in:
Antoine Martin 2026-02-08 06:43:23 -05:00 committed by The Friendly Meow (merge) Bot
parent 1d546198cc
commit cf186ae56d
No known key found for this signature in database
6 changed files with 1238 additions and 156 deletions

View file

@ -0,0 +1,327 @@
From bf1ccb5dc61576a573409810dfee9d68eb141845 Mon Sep 17 00:00:00 2001
From: ayakael <antoine@ayakael.net>
Date: Sun, 8 Feb 2026 09:17:03 -0500
Subject: [PATCH 1/3] video: backlight: Add OCP8178 backlight driver
This driver is taken from
https://github.com/clockworkpi/DevTerm/blob/main/Code/patch/armbian_build_a06/patch/kernel-005-backlight.patch
and optimized for v6.5
---
drivers/video/backlight/Kconfig | 6 +
drivers/video/backlight/Makefile | 1 +
drivers/video/backlight/ocp8178_bl.c | 277 +++++++++++++++++++++++++++
3 files changed, 284 insertions(+)
create mode 100644 drivers/video/backlight/ocp8178_bl.c
diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig
index 936ba1e4d35e..440cf1c6d011 100644
--- a/drivers/video/backlight/Kconfig
+++ b/drivers/video/backlight/Kconfig
@@ -477,6 +477,12 @@ config BACKLIGHT_LED
If you have a LCD backlight adjustable by LED class driver, say Y
to enable this driver.
+config BACKLIGHT_OCP8178
+ tristate "OCP8178 Backlight Driver"
+ depends on GPIOLIB
+ help
+ If you have an OCP8178, say Y to enable the backlight driver.
+
endif # BACKLIGHT_CLASS_DEVICE
endmenu
diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile
index e815f3f1deff..e1184bb56516 100644
--- a/drivers/video/backlight/Makefile
+++ b/drivers/video/backlight/Makefile
@@ -59,3 +59,4 @@ obj-$(CONFIG_BACKLIGHT_WM831X) += wm831x_bl.o
obj-$(CONFIG_BACKLIGHT_ARCXCNN) += arcxcnn_bl.o
obj-$(CONFIG_BACKLIGHT_RAVE_SP) += rave-sp-backlight.o
obj-$(CONFIG_BACKLIGHT_LED) += led_bl.o
+obj-$(CONFIG_BACKLIGHT_OCP8178) += ocp8178_bl.o
diff --git a/drivers/video/backlight/ocp8178_bl.c b/drivers/video/backlight/ocp8178_bl.c
new file mode 100644
index 000000000000..db8db1771644
--- /dev/null
+++ b/drivers/video/backlight/ocp8178_bl.c
@@ -0,0 +1,277 @@
+/*
+ * ocp8178_bl.c - ocp8178 backlight driver
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/backlight.h>
+#include <linux/err.h>
+#include <linux/fb.h>
+#include <linux/gpio.h> /* Only for legacy support */
+#include <linux/gpio/consumer.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/platform_data/gpio_backlight.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/delay.h>
+#include <linux/timer.h>
+#include <linux/poll.h>
+#include <linux/proc_fs.h>
+#include <linux/seq_file.h>
+#include <linux/sched.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/io.h>
+#include <linux/clk.h>
+
+struct ocp8178_backlight {
+ struct device *dev;
+ struct device *fbdev;
+
+ struct gpio_desc *gpiod;
+ int def_value;
+ int current_value;
+};
+
+#define DETECT_DELAY 200
+#define DETECT_TIME 500
+#define DETECT_WINDOW_TIME 1000
+#define START_TIME 10
+#define END_TIME 10
+#define SHUTDOWN_TIME 3000
+#define LOW_BIT_HIGH_TIME 10
+#define LOW_BIT_LOW_TIME 50
+#define HIGH_BIT_HIGH_TIME 50
+#define HIGH_BIT_LOW_TIME 10
+#define MAX_BRIGHTNESS_VALUE 9
+
+static void entry_1wire_mode(struct ocp8178_backlight *gbl)
+{
+ unsigned long flags = 0;
+ local_irq_save(flags);
+ gpiod_set_value(gbl->gpiod, 0);
+ mdelay(SHUTDOWN_TIME/1000);
+ gpiod_set_value(gbl->gpiod, 1);
+ udelay(DETECT_DELAY);
+ gpiod_set_value(gbl->gpiod, 0);
+ udelay(DETECT_TIME);
+ gpiod_set_value(gbl->gpiod, 1);
+ udelay(DETECT_WINDOW_TIME);
+ local_irq_restore(flags);
+}
+
+static inline void write_bit(struct ocp8178_backlight *gbl, int bit)
+{
+ if (bit) {
+ gpiod_set_value(gbl->gpiod, 0);
+ udelay(HIGH_BIT_LOW_TIME);
+ gpiod_set_value(gbl->gpiod, 1);
+ udelay(HIGH_BIT_HIGH_TIME);
+ } else {
+ gpiod_set_value(gbl->gpiod, 0);
+ udelay(LOW_BIT_LOW_TIME);
+ gpiod_set_value(gbl->gpiod, 1);
+ udelay(LOW_BIT_HIGH_TIME);
+ }
+}
+
+static void write_byte(struct ocp8178_backlight *gbl, int byte)
+{
+ unsigned long flags = 0;
+ unsigned char data = 0x72;
+ int i;
+
+ local_irq_save(flags);
+
+ gpiod_set_value(gbl->gpiod, 1);
+ udelay(START_TIME);
+ for(i = 0; i < 8; i++) {
+ if(data & 0x80) {
+ write_bit(gbl, 1);
+ } else {
+ write_bit(gbl, 0);
+ }
+ data <<= 1;
+ }
+ gpiod_set_value(gbl->gpiod, 0);
+ udelay(END_TIME);
+
+ data = byte & 0x1f;
+
+ gpiod_set_value(gbl->gpiod, 1);
+ udelay(START_TIME);
+ for(i = 0; i < 8; i++) {
+ if(data & 0x80) {
+ write_bit(gbl, 1);
+ } else {
+ write_bit(gbl, 0);
+ }
+ data <<= 1;
+ }
+ gpiod_set_value(gbl->gpiod, 0);
+ udelay(END_TIME);
+ gpiod_set_value(gbl->gpiod, 1);
+
+ local_irq_restore(flags);
+}
+
+unsigned char ocp8178_bl_table[MAX_BRIGHTNESS_VALUE+1] = {0, 1, 4, 8, 12, 16, 20, 24, 28, 31};
+
+static int ocp8178_update_status(struct backlight_device *bl)
+{
+ struct ocp8178_backlight *gbl = bl_get_data(bl);
+ int brightness = bl->props.brightness, i;
+
+ if (bl->props.power != FB_BLANK_UNBLANK ||
+ bl->props.fb_blank != FB_BLANK_UNBLANK ||
+ bl->props.state & (BL_CORE_SUSPENDED | BL_CORE_FBBLANK))
+ brightness = 0;
+
+ if(brightness > MAX_BRIGHTNESS_VALUE)
+ brightness = MAX_BRIGHTNESS_VALUE;
+
+ for(i = 0; i < 2; i++) {
+ entry_1wire_mode(gbl);
+ write_byte(gbl, ocp8178_bl_table[brightness]);
+ }
+ gbl->current_value = brightness;
+
+ return 0;
+}
+
+static int ocp8178_get_brightness(struct backlight_device *bl)
+{
+ struct ocp8178_backlight *gbl = bl_get_data(bl);
+ return gbl->current_value;
+}
+
+static int ocp8178_check_fb(struct backlight_device *bl,
+ struct fb_info *info)
+{
+ struct ocp8178_backlight *gbl = bl_get_data(bl);
+ return gbl->fbdev == NULL || gbl->fbdev == info->dev;
+}
+
+static const struct backlight_ops ocp8178_backlight_ops = {
+ .options = BL_CORE_SUSPENDRESUME,
+ .update_status = ocp8178_update_status,
+ .get_brightness = ocp8178_get_brightness,
+ .check_fb = ocp8178_check_fb,
+};
+
+static int ocp8178_probe_dt(struct platform_device *pdev,
+ struct ocp8178_backlight *gbl)
+{
+ struct device *dev = &pdev->dev;
+ struct device_node *np = dev->of_node;
+ enum gpiod_flags flags;
+ int ret = 0;
+ u32 value32;
+
+ of_property_read_u32(np, "default-brightness", &value32);
+ if(value32 > MAX_BRIGHTNESS_VALUE)
+ gbl->def_value = MAX_BRIGHTNESS_VALUE;
+ else
+ gbl->def_value = value32;
+ flags = gbl->def_value ? GPIOD_OUT_HIGH : GPIOD_OUT_LOW;
+
+ gbl->gpiod = devm_gpiod_get(dev, "backlight-control", flags);
+ if (IS_ERR(gbl->gpiod)) {
+ ret = PTR_ERR(gbl->gpiod);
+
+ if (ret != -EPROBE_DEFER) {
+ dev_err(dev,
+ "Error: The gpios parameter is missing or invalid.\n");
+ }
+ }
+
+ return ret;
+}
+
+static struct backlight_device *backlight;
+
+static int ocp8178_probe(struct platform_device *pdev)
+{
+ struct backlight_properties props;
+ struct backlight_device *bl;
+ struct ocp8178_backlight *gbl;
+ struct device_node *np = pdev->dev.of_node;
+ int ret;
+
+ if ( !np) {
+ dev_err(&pdev->dev,
+ "failed to find platform data or device tree node.\n");
+ return -ENODEV;
+ }
+
+ gbl = devm_kzalloc(&pdev->dev, sizeof(*gbl), GFP_KERNEL);
+ if (gbl == NULL)
+ return -ENOMEM;
+
+ gbl->dev = &pdev->dev;
+
+ ret = ocp8178_probe_dt(pdev, gbl);
+ if (ret)
+ return ret;
+
+ gbl->current_value = gbl->def_value;
+
+ memset(&props, 0, sizeof(props));
+ props.type = BACKLIGHT_RAW;
+ props.max_brightness = MAX_BRIGHTNESS_VALUE;
+ bl = devm_backlight_device_register(&pdev->dev, dev_name(&pdev->dev),
+ &pdev->dev, gbl, &ocp8178_backlight_ops,
+ &props);
+ if (IS_ERR(bl)) {
+ dev_err(&pdev->dev, "failed to register backlight\n");
+ return PTR_ERR(bl);
+ }
+
+// entry_1wire_mode(gbl);
+
+ bl->props.brightness = gbl->def_value;
+ backlight_update_status(bl);
+
+ platform_set_drvdata(pdev, bl);
+
+ backlight = bl;
+ return 0;
+}
+
+static int ocp8178_suspend(struct platform_device *pdev, pm_message_t state)
+{
+ return 0;
+}
+
+static int ocp8178_resume(struct platform_device *pdev)
+{
+ return 0;
+}
+
+static struct of_device_id ocp8178_of_match[] = {
+ { .compatible = "ocp8178-backlight" },
+ { /* sentinel */ }
+};
+
+MODULE_DEVICE_TABLE(of, ocp8178_of_match);
+
+static struct platform_driver ocp8178_driver = {
+ .driver = {
+ .name = "ocp8178-backlight",
+ .of_match_table = of_match_ptr(ocp8178_of_match),
+ },
+ .probe = ocp8178_probe,
+ .suspend = ocp8178_suspend,
+ .resume = ocp8178_resume,
+};
+
+module_platform_driver(ocp8178_driver);
+
+MODULE_DESCRIPTION("OCP8178 Driver");
+MODULE_LICENSE("GPL");
--
2.53.0

View file

@ -0,0 +1,530 @@
From 3034db8bfb94b1e4793c99d777c2f6d6e8efb525 Mon Sep 17 00:00:00 2001
From: ayakael <antoine@ayakael.net>
Date: Sun, 8 Feb 2026 09:17:29 -0500
Subject: [PATCH 2/3] drm: panel: add clockwork cwu50
set `power_off_case` to 2(other than 1) to enable power off by
DCS command
---
drivers/gpu/drm/panel/Kconfig | 12 +
drivers/gpu/drm/panel/Makefile | 1 +
drivers/gpu/drm/panel/panel-cwu50.c | 477 ++++++++++++++++++++++++++++
3 files changed, 490 insertions(+)
create mode 100644 drivers/gpu/drm/panel/panel-cwu50.c
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 0c2e06c01840..b2e2eff3aa03 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -761,4 +761,16 @@ config DRM_PANEL_XINPENG_XPP055C272
Say Y here if you want to enable support for the Xinpeng
XPP055C272 controller for 720x1280 LCD panels with MIPI/RGB/SPI
system interfaces.
+
+config DRM_PANEL_CWU50
+ tristate "CWU50 panel"
+ depends on OF
+ depends on DRM_MIPI_DSI
+ depends on BACKLIGHT_CLASS_DEVICE
+ help
+ Say Y here if you want to enable support for CWU50 panel.
+ The panel has a 720x1280 resolution and uses 24 bit RGB per pixel.
+
+ To compile this driver as a module, choose M here: the module
+ will be called panel-cwu50.
endmenu
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index f0db434747a1..05754c6e38e1 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -78,3 +78,4 @@ obj-$(CONFIG_DRM_PANEL_TRULY_NT35597_WQXGA) += panel-truly-nt35597.o
obj-$(CONFIG_DRM_PANEL_VISIONOX_RM69299) += panel-visionox-rm69299.o
obj-$(CONFIG_DRM_PANEL_WIDECHIPS_WS2401) += panel-widechips-ws2401.o
obj-$(CONFIG_DRM_PANEL_XINPENG_XPP055C272) += panel-xinpeng-xpp055c272.o
+obj-$(CONFIG_DRM_PANEL_CWU50) += panel-cwu50.o
diff --git a/drivers/gpu/drm/panel/panel-cwu50.c b/drivers/gpu/drm/panel/panel-cwu50.c
new file mode 100644
index 000000000000..203fa28d6652
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-cwu50.c
@@ -0,0 +1,477 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <drm/drm_modes.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_panel.h>
+#include <linux/backlight.h>
+#include <linux/gpio/consumer.h>
+#include <linux/regulator/consumer.h>
+#include <linux/delay.h>
+#include <linux/of_device.h>
+#include <linux/module.h>
+
+struct cwu50 {
+ struct device *dev;
+ struct drm_panel panel;
+ struct regulator *supply;
+ struct gpio_desc *reset_gpio;
+ struct backlight_device *backlight;
+ bool prepared;
+ bool enabled;
+ enum drm_panel_orientation orientation;
+};
+
+static const struct drm_display_mode default_mode = {
+ .clock = 62500,
+ .hdisplay = 720,
+ .hsync_start = 720 + 43,
+ .hsync_end = 720+ 43 + 20,
+ .htotal = 720 + 43 + 20 + 20,
+ .vdisplay = 1280,
+ .vsync_start = 1280 + 8,
+ .vsync_end = 1280 + 8+ 2,
+ .vtotal = 1280 + 8 + 2 + 16,
+};
+
+static inline struct cwu50 *panel_to_cwu50(struct drm_panel *panel)
+{
+ return container_of(panel, struct cwu50, panel);
+}
+
+#define dcs_write_seq(seq...) \
+({ \
+ static const u8 d[] = { seq }; \
+ mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
+})
+
+static void cwu50_init_sequence(struct cwu50 *ctx)
+{
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+
+ dcs_write_seq(0xE1,0x93);
+ dcs_write_seq(0xE2,0x65);
+ dcs_write_seq(0xE3,0xF8);
+ dcs_write_seq(0x70,0x20);
+ dcs_write_seq(0x71,0x13);
+ dcs_write_seq(0x72,0x06);
+ dcs_write_seq(0x75,0x03);
+ dcs_write_seq(0xE0,0x01);
+ dcs_write_seq(0x00,0x00);
+ dcs_write_seq(0x01,0x47);//VCOM0x47
+ dcs_write_seq(0x03,0x00);
+ dcs_write_seq(0x04,0x4D);
+ dcs_write_seq(0x0C,0x64);
+ dcs_write_seq(0x17,0x00);
+ dcs_write_seq(0x18,0xBF);
+ dcs_write_seq(0x19,0x00);
+ dcs_write_seq(0x1A,0x00);
+ dcs_write_seq(0x1B,0xBF);
+ dcs_write_seq(0x1C,0x00);
+ dcs_write_seq(0x1F,0x7E);
+ dcs_write_seq(0x20,0x24);
+ dcs_write_seq(0x21,0x24);
+ dcs_write_seq(0x22,0x4E);
+ dcs_write_seq(0x24,0xFE);
+ dcs_write_seq(0x37,0x09);
+ dcs_write_seq(0x38,0x04);
+ dcs_write_seq(0x3C,0x76);
+ dcs_write_seq(0x3D,0xFF);
+ dcs_write_seq(0x3E,0xFF);
+ dcs_write_seq(0x3F,0x7F);
+ dcs_write_seq(0x40,0x04);//Dot inversion type
+ dcs_write_seq(0x41,0xA0);
+ dcs_write_seq(0x44,0x11);
+ dcs_write_seq(0x55,0x02);
+ dcs_write_seq(0x56,0x01);
+ dcs_write_seq(0x57,0x49);
+ dcs_write_seq(0x58,0x09);
+ dcs_write_seq(0x59,0x2A);
+ dcs_write_seq(0x5A,0x1A);
+ dcs_write_seq(0x5B,0x1A);
+ dcs_write_seq(0x5D,0x78);
+ dcs_write_seq(0x5E,0x6E);
+ dcs_write_seq(0x5F,0x66);
+ dcs_write_seq(0x60,0x5E);
+ dcs_write_seq(0x61,0x60);
+ dcs_write_seq(0x62,0x54);
+ dcs_write_seq(0x63,0x5C);
+ dcs_write_seq(0x64,0x47);
+ dcs_write_seq(0x65,0x5F);
+ dcs_write_seq(0x66,0x5D);
+ dcs_write_seq(0x67,0x5B);
+ dcs_write_seq(0x68,0x76);
+ dcs_write_seq(0x69,0x61);
+ dcs_write_seq(0x6A,0x63);
+ dcs_write_seq(0x6B,0x50);
+ dcs_write_seq(0x6C,0x45);
+ dcs_write_seq(0x6D,0x34);
+ dcs_write_seq(0x6E,0x1C);
+ dcs_write_seq(0x6F,0x07);
+ dcs_write_seq(0x70,0x78);
+ dcs_write_seq(0x71,0x6E);
+ dcs_write_seq(0x72,0x66);
+ dcs_write_seq(0x73,0x5E);
+ dcs_write_seq(0x74,0x60);
+ dcs_write_seq(0x75,0x54);
+ dcs_write_seq(0x76,0x5C);
+ dcs_write_seq(0x77,0x47);
+ dcs_write_seq(0x78,0x5F);
+ dcs_write_seq(0x79,0x5D);
+ dcs_write_seq(0x7A,0x5B);
+ dcs_write_seq(0x7B,0x76);
+ dcs_write_seq(0x7C,0x61);
+ dcs_write_seq(0x7D,0x63);
+ dcs_write_seq(0x7E,0x50);
+ dcs_write_seq(0x7F,0x45);
+ dcs_write_seq(0x80,0x34);
+ dcs_write_seq(0x81,0x1C);
+ dcs_write_seq(0x82,0x07);
+ dcs_write_seq(0xE0,0x02);
+ dcs_write_seq(0x00,0x44);
+ dcs_write_seq(0x01,0x46);
+ dcs_write_seq(0x02,0x48);
+ dcs_write_seq(0x03,0x4A);
+ dcs_write_seq(0x04,0x40);
+ dcs_write_seq(0x05,0x42);
+ dcs_write_seq(0x06,0x1F);
+ dcs_write_seq(0x07,0x1F);
+ dcs_write_seq(0x08,0x1F);
+ dcs_write_seq(0x09,0x1F);
+ dcs_write_seq(0x0A,0x1F);
+ dcs_write_seq(0x0B,0x1F);
+ dcs_write_seq(0x0C,0x1F);
+ dcs_write_seq(0x0D,0x1F);
+ dcs_write_seq(0x0E,0x1F);
+ dcs_write_seq(0x0F,0x1F);
+ dcs_write_seq(0x10,0x1F);
+ dcs_write_seq(0x11,0x1F);
+ dcs_write_seq(0x12,0x1F);
+ dcs_write_seq(0x13,0x1F);
+ dcs_write_seq(0x14,0x1E);
+ dcs_write_seq(0x15,0x1F);
+ dcs_write_seq(0x16,0x45);
+ dcs_write_seq(0x17,0x47);
+ dcs_write_seq(0x18,0x49);
+ dcs_write_seq(0x19,0x4B);
+ dcs_write_seq(0x1A,0x41);
+ dcs_write_seq(0x1B,0x43);
+ dcs_write_seq(0x1C,0x1F);
+ dcs_write_seq(0x1D,0x1F);
+ dcs_write_seq(0x1E,0x1F);
+ dcs_write_seq(0x1F,0x1F);
+ dcs_write_seq(0x20,0x1F);
+ dcs_write_seq(0x21,0x1F);
+ dcs_write_seq(0x22,0x1F);
+ dcs_write_seq(0x23,0x1F);
+ dcs_write_seq(0x24,0x1F);
+ dcs_write_seq(0x25,0x1F);
+ dcs_write_seq(0x26,0x1F);
+ dcs_write_seq(0x27,0x1F);
+ dcs_write_seq(0x28,0x1F);
+ dcs_write_seq(0x29,0x1F);
+ dcs_write_seq(0x2A,0x1E);
+ dcs_write_seq(0x2B,0x1F);
+ dcs_write_seq(0x2C,0x0B);
+ dcs_write_seq(0x2D,0x09);
+ dcs_write_seq(0x2E,0x07);
+ dcs_write_seq(0x2F,0x05);
+ dcs_write_seq(0x30,0x03);
+ dcs_write_seq(0x31,0x01);
+ dcs_write_seq(0x32,0x1F);
+ dcs_write_seq(0x33,0x1F);
+ dcs_write_seq(0x34,0x1F);
+ dcs_write_seq(0x35,0x1F);
+ dcs_write_seq(0x36,0x1F);
+ dcs_write_seq(0x37,0x1F);
+ dcs_write_seq(0x38,0x1F);
+ dcs_write_seq(0x39,0x1F);
+ dcs_write_seq(0x3A,0x1F);
+ dcs_write_seq(0x3B,0x1F);
+ dcs_write_seq(0x3C,0x1F);
+ dcs_write_seq(0x3D,0x1F);
+ dcs_write_seq(0x3E,0x1F);
+ dcs_write_seq(0x3F,0x1F);
+ dcs_write_seq(0x40,0x1F);
+ dcs_write_seq(0x41,0x1E);
+ dcs_write_seq(0x42,0x0A);
+ dcs_write_seq(0x43,0x08);
+ dcs_write_seq(0x44,0x06);
+ dcs_write_seq(0x45,0x04);
+ dcs_write_seq(0x46,0x02);
+ dcs_write_seq(0x47,0x00);
+ dcs_write_seq(0x48,0x1F);
+ dcs_write_seq(0x49,0x1F);
+ dcs_write_seq(0x4A,0x1F);
+ dcs_write_seq(0x4B,0x1F);
+ dcs_write_seq(0x4C,0x1F);
+ dcs_write_seq(0x4D,0x1F);
+ dcs_write_seq(0x4E,0x1F);
+ dcs_write_seq(0x4F,0x1F);
+ dcs_write_seq(0x50,0x1F);
+ dcs_write_seq(0x51,0x1F);
+ dcs_write_seq(0x52,0x1F);
+ dcs_write_seq(0x53,0x1F);
+ dcs_write_seq(0x54,0x1F);
+ dcs_write_seq(0x55,0x1F);
+ dcs_write_seq(0x56,0x1F);
+ dcs_write_seq(0x57,0x1E);
+ dcs_write_seq(0x58,0x40);
+ dcs_write_seq(0x59,0x00);
+ dcs_write_seq(0x5A,0x00);
+ dcs_write_seq(0x5B,0x30);
+ dcs_write_seq(0x5C,0x02);
+ dcs_write_seq(0x5D,0x40);
+ dcs_write_seq(0x5E,0x01);
+ dcs_write_seq(0x5F,0x02);
+ dcs_write_seq(0x60,0x00);
+ dcs_write_seq(0x61,0x01);
+ dcs_write_seq(0x62,0x02);
+ dcs_write_seq(0x63,0x65);
+ dcs_write_seq(0x64,0x66);
+ dcs_write_seq(0x65,0x00);
+ dcs_write_seq(0x66,0x00);
+ dcs_write_seq(0x67,0x74);
+ dcs_write_seq(0x68,0x06);
+ dcs_write_seq(0x69,0x65);
+ dcs_write_seq(0x6A,0x66);
+ dcs_write_seq(0x6B,0x10);
+ dcs_write_seq(0x6C,0x00);
+ dcs_write_seq(0x6D,0x04);
+ dcs_write_seq(0x6E,0x04);
+ dcs_write_seq(0x6F,0x88);
+ dcs_write_seq(0x70,0x00);
+ dcs_write_seq(0x71,0x00);
+ dcs_write_seq(0x72,0x06);
+ dcs_write_seq(0x73,0x7B);
+ dcs_write_seq(0x74,0x00);
+ dcs_write_seq(0x75,0x87);
+ dcs_write_seq(0x76,0x00);
+ dcs_write_seq(0x77,0x5D);
+ dcs_write_seq(0x78,0x17);
+ dcs_write_seq(0x79,0x1F);
+ dcs_write_seq(0x7A,0x00);
+ dcs_write_seq(0x7B,0x00);
+ dcs_write_seq(0x7C,0x00);
+ dcs_write_seq(0x7D,0x03);
+ dcs_write_seq(0x7E,0x7B);
+ dcs_write_seq(0xE0,0x04);
+ dcs_write_seq(0x09,0x10);
+ dcs_write_seq(0xE0,0x00);
+ dcs_write_seq(0xE6,0x02);
+ dcs_write_seq(0xE7,0x02);
+ dcs_write_seq(0x11);// SLPOUT
+ msleep (120);
+ dcs_write_seq(0x29);// DSPON
+ msleep (20);
+ dcs_write_seq(0x35,0x00);
+}
+
+static int cwu50_disable(struct drm_panel *panel)
+{
+ struct cwu50 *ctx = panel_to_cwu50(panel);
+
+ if (!ctx->enabled)
+ return 0;
+
+ backlight_disable(ctx->backlight);
+
+ ctx->enabled = false;
+
+ return 0;
+}
+
+static int cwu50_unprepare(struct drm_panel *panel)
+{
+
+#if 0
+ if (!ctx->prepared)
+ return 0;
+
+ ret = mipi_dsi_dcs_set_display_off(dsi);
+ if (ret) {
+ dev_err(ctx->dev, "failed to turn display off (%d)\n", ret);
+ return ret;
+ }
+
+ ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
+ if (ret) {
+ dev_err(ctx->dev, "failed to enter sleep mode (%d)\n", ret);
+ return ret;
+ }
+ msleep(120);
+
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ msleep(5);
+
+ ctx->prepared = false;
+#endif
+
+ return 0;
+}
+
+static int cwu50_prepare(struct drm_panel *panel)
+{
+ struct cwu50 *ctx = panel_to_cwu50(panel);
+ struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev);
+ int ret;
+
+ if (ctx->prepared)
+ return 0;
+
+ gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+ msleep(10);
+ gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+ msleep(120);
+
+ /* Enabe tearing mode: send TE (tearing effect) at VBLANK */
+ ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+ if (ret) {
+ dev_err(ctx->dev, "failed to enable vblank TE (%d)\n", ret);
+ return ret;
+ }
+ /* Exit sleep mode and power on */
+
+ cwu50_init_sequence(ctx);
+
+ ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+ if (ret) {
+ dev_err(ctx->dev, "failed to exit sleep mode (%d)\n", ret);
+ return ret;
+ }
+ msleep(120);
+
+ ret = mipi_dsi_dcs_set_display_on(dsi);
+ if (ret) {
+ dev_err(ctx->dev, "failed to turn display on (%d)\n", ret);
+ return ret;
+ }
+ msleep(20);
+
+ ctx->prepared = true;
+
+ return 0;
+}
+
+static int cwu50_enable(struct drm_panel *panel)
+{
+ struct cwu50 *ctx = panel_to_cwu50(panel);
+
+ if (ctx->enabled)
+ return 0;
+
+ backlight_enable(ctx->backlight);
+
+ ctx->enabled = true;
+
+ return 0;
+}
+
+static int cwu50_get_modes(struct drm_panel *panel, struct drm_connector *connector)
+{
+ struct cwu50 *ctx = panel_to_cwu50(panel);
+ struct drm_display_mode *mode;
+
+ mode = drm_mode_duplicate(connector->dev, &default_mode);
+ if (!mode) {
+ dev_err(panel->dev, "bad mode or failed to add mode\n");
+ return -EINVAL;
+ }
+ drm_mode_set_name(mode);
+ mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+
+ connector->display_info.width_mm = mode->width_mm;
+ connector->display_info.height_mm = mode->height_mm;
+
+ /* set up connector's "panel orientation" property */
+ drm_connector_set_panel_orientation(connector, ctx->orientation);
+
+ drm_mode_probed_add(connector, mode);
+
+ return 1; /* Number of modes */
+}
+
+static const struct drm_panel_funcs cwu50_drm_funcs = {
+ .disable = cwu50_disable,
+ .unprepare = cwu50_unprepare,
+ .prepare = cwu50_prepare,
+ .enable = cwu50_enable,
+ .get_modes = cwu50_get_modes,
+};
+
+static int cwu50_probe(struct mipi_dsi_device *dsi)
+{
+ struct device *dev = &dsi->dev;
+ struct cwu50 *ctx;
+ int ret;
+
+ ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
+ if (!ctx)
+ return -ENOMEM;
+
+ mipi_dsi_set_drvdata(dsi, ctx);
+ ctx->dev = dev;
+
+ dsi->lanes = 4;
+ dsi->format = MIPI_DSI_FMT_RGB888;
+ dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | MIPI_DSI_MODE_VIDEO_SYNC_PULSE;
+
+ ctx->reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
+ if (IS_ERR(ctx->reset_gpio)) {
+ ret = PTR_ERR(ctx->reset_gpio);
+ if (ret != -EPROBE_DEFER)
+ dev_err(dev, "failed to request GPIO (%d)\n", ret);
+ return ret;
+ }
+
+ ctx->backlight = devm_of_find_backlight(dev);
+ if (IS_ERR(ctx->backlight)) {
+ dev_err(ctx->dev, "devm_of_find_backlight");
+ return PTR_ERR(ctx->backlight);
+ }
+
+ ret = of_drm_get_panel_orientation(dev->of_node, &ctx->orientation);
+ if (ret) {
+ dev_err(dev, "%pOF: failed to get orientation %d\n", dev->of_node, ret);
+ return ret;
+ }
+
+ drm_panel_init(&ctx->panel, dev, &cwu50_drm_funcs, DRM_MODE_CONNECTOR_DSI);
+
+ drm_panel_add(&ctx->panel);
+
+ ret = mipi_dsi_attach(dsi);
+ if (ret < 0) {
+ dev_err(dev, "mipi_dsi_attach() failed: %d\n", ret);
+ drm_panel_remove(&ctx->panel);
+ return ret;
+ }
+
+ return 0;
+}
+
+static void cwu50_remove(struct mipi_dsi_device *dsi)
+{
+ struct cwu50 *ctx = mipi_dsi_get_drvdata(dsi);
+
+ mipi_dsi_detach(dsi);
+ drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id cwu50_of_match[] = {
+ { .compatible = "cw,cwu50" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, cwu50_of_match);
+
+static struct mipi_dsi_driver cwu50_driver = {
+ .probe = cwu50_probe,
+ .remove = cwu50_remove,
+ .driver = {
+ .name = "panel-cwu50",
+ .of_match_table = cwu50_of_match,
+ },
+};
+module_mipi_dsi_driver(cwu50_driver);
+
+MODULE_DESCRIPTION("DRM Driver for cwu50 MIPI DSI panel");
+MODULE_LICENSE("GPL v2");
--
2.53.0

View file

@ -0,0 +1,247 @@
From adc1869bbc73b30f346846f6c083cb130aca5147 Mon Sep 17 00:00:00 2001
From: ayakael <antoine@ayakael.net>
Date: Sun, 8 Feb 2026 09:18:08 -0500
Subject: [PATCH 3/3] power: axp20x_battery: implement calibration
---
drivers/power/supply/axp20x_ac_power.c | 6 +-
drivers/power/supply/axp20x_battery.c | 106 ++++++++++++++++++++++++-
2 files changed, 106 insertions(+), 6 deletions(-)
diff --git a/drivers/power/supply/axp20x_ac_power.c b/drivers/power/supply/axp20x_ac_power.c
index 57e50208d537..5d7c0d7ea16b 100644
--- a/drivers/power/supply/axp20x_ac_power.c
+++ b/drivers/power/supply/axp20x_ac_power.c
@@ -13,7 +13,6 @@
#include <linux/mfd/axp20x.h>
#include <linux/module.h>
#include <linux/of.h>
-#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/power_supply.h>
@@ -53,6 +52,9 @@ static irqreturn_t axp20x_ac_power_irq(int irq, void *devid)
{
struct axp20x_ac_power *power = devid;
+ regmap_update_bits(power->regmap, AXP20X_VBUS_IPSOUT_MGMT, 0x03, 0x00);
+ regmap_update_bits(power->regmap, AXP20X_VBUS_IPSOUT_MGMT, 0x03, 0x03);
+
power_supply_changed(power->supply);
return IRQ_HANDLED;
@@ -335,7 +337,7 @@ static int axp20x_ac_power_probe(struct platform_device *pdev)
return -EINVAL;
}
- axp_data = of_device_get_match_data(&pdev->dev);
+ axp_data = device_get_match_data(&pdev->dev);
power = devm_kzalloc(&pdev->dev,
struct_size(power, irqs, axp_data->num_irq_names),
diff --git a/drivers/power/supply/axp20x_battery.c b/drivers/power/supply/axp20x_battery.c
index 9106077c0dbb..7f9a7059f17d 100644
--- a/drivers/power/supply/axp20x_battery.c
+++ b/drivers/power/supply/axp20x_battery.c
@@ -22,7 +22,6 @@
#include <linux/irq.h>
#include <linux/module.h>
#include <linux/of.h>
-#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/power_supply.h>
#include <linux/regmap.h>
@@ -56,6 +55,10 @@
#define AXP20X_V_OFF_MASK GENMASK(2, 0)
+#define AXP228_FULL_CAPACITY_CALIBRATE_EN BIT(5)
+#define AXP228_CAPACITY_CALIBRATE BIT(4)
+#define AXP228_CALIBRATE_MASK (BIT(4) | BIT(5))
+
struct axp20x_batt_ps;
struct axp_data {
@@ -75,6 +78,9 @@ struct axp20x_batt_ps {
struct iio_channel *batt_v;
/* Maximum constant charge current */
unsigned int max_ccc;
+ int energy_full_design;
+ int current_now;
+ int voltage_now;
const struct axp_data *data;
};
@@ -276,6 +282,7 @@ static int axp20x_battery_get_prop(struct power_supply *psy,
/* IIO framework gives mA but Power Supply framework gives uA */
val->intval *= 1000;
+ axp20x_batt->current_now = val->intval;
break;
case POWER_SUPPLY_PROP_CAPACITY:
@@ -324,8 +331,60 @@ static int axp20x_battery_get_prop(struct power_supply *psy,
/* IIO framework gives mV but Power Supply framework gives uV */
val->intval *= 1000;
+ axp20x_batt->current_now = val->intval;
break;
+ case POWER_SUPPLY_PROP_ENERGY_FULL:
+ case POWER_SUPPLY_PROP_ENERGY_NOW:
+ case POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN:
+ /* When no battery is present, return 0 */
+ ret = regmap_read(axp20x_batt->regmap, AXP20X_PWR_OP_MODE,
+ &reg);
+ if (ret)
+ return ret;
+
+ if (!(reg & AXP20X_PWR_OP_BATT_PRESENT)) {
+ val->intval = 0;
+ return 0;
+ }
+
+ if(psp == POWER_SUPPLY_PROP_ENERGY_FULL) {
+ // TODO
+ val->intval = axp20x_batt->energy_full_design;
+ return 0;
+ }
+
+ if(psp == POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN) {
+ val->intval = axp20x_batt->energy_full_design;
+ return 0;
+ }
+
+ ret = regmap_read(axp20x_batt->regmap, AXP20X_FG_RES, &reg);
+ if (ret)
+ return ret;
+
+ if (axp20x_batt->data->has_fg_valid && !(reg & AXP22X_FG_VALID))
+ return -EINVAL;
+
+ val1 = reg & AXP209_FG_PERCENT;
+ val1 = max(min(val1, 100), 0);
+ val->intval = (val1 * ((long long int)axp20x_batt->energy_full_design)) / 100;
+ break;
+
+ case POWER_SUPPLY_PROP_CALIBRATE:
+ // report both calibrate enable flag and calibration status
+ ret = regmap_read(axp20x_batt->regmap, AXP20X_CC_CTRL, &reg);
+ if (ret)
+ return ret;
+ val1 = reg & AXP228_CALIBRATE_MASK;
+ val->intval = val1;
+ break;
+
+ case POWER_SUPPLY_PROP_POWER_NOW:
+ val->intval = (axp20x_batt->voltage_now / 10000) * axp20x_batt->current_now;
+ val->intval = val->intval / 100; // uW
+ break;
+
default:
return -EINVAL;
}
@@ -454,6 +513,7 @@ static int axp20x_battery_set_prop(struct power_supply *psy,
const union power_supply_propval *val)
{
struct axp20x_batt_ps *axp20x_batt = power_supply_get_drvdata(psy);
+ int val1;
switch (psp) {
case POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN:
@@ -468,6 +528,16 @@ static int axp20x_battery_set_prop(struct power_supply *psy,
case POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX:
return axp20x_set_max_constant_charge_current(axp20x_batt,
val->intval);
+
+ case POWER_SUPPLY_PROP_CALIBRATE:
+ if (val->intval) {
+ // enable calibrate
+ val1 = AXP228_FULL_CAPACITY_CALIBRATE_EN | AXP228_CAPACITY_CALIBRATE;
+ } else {
+ // disable calibrate
+ val1 = 0;
+ }
+ return regmap_update_bits(axp20x_batt->regmap, AXP20X_CC_CTRL, AXP228_CALIBRATE_MASK, val1);
case POWER_SUPPLY_PROP_STATUS:
switch (val->intval) {
case POWER_SUPPLY_STATUS_CHARGING:
@@ -497,6 +567,11 @@ static enum power_supply_property axp20x_battery_props[] = {
POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN,
POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN,
POWER_SUPPLY_PROP_CAPACITY,
+ POWER_SUPPLY_PROP_ENERGY_FULL,
+ POWER_SUPPLY_PROP_ENERGY_NOW,
+ POWER_SUPPLY_PROP_ENERGY_FULL_DESIGN,
+ POWER_SUPPLY_PROP_CALIBRATE,
+ POWER_SUPPLY_PROP_POWER_NOW,
};
static int axp20x_battery_prop_writeable(struct power_supply *psy,
@@ -506,7 +581,8 @@ static int axp20x_battery_prop_writeable(struct power_supply *psy,
psp == POWER_SUPPLY_PROP_VOLTAGE_MIN_DESIGN ||
psp == POWER_SUPPLY_PROP_VOLTAGE_MAX_DESIGN ||
psp == POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT ||
- psp == POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX;
+ psp == POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX ||
+ psp == POWER_SUPPLY_PROP_CALIBRATE;
}
static const struct power_supply_desc axp20x_batt_ps_desc = {
@@ -602,7 +678,7 @@ static int axp20x_power_probe(struct platform_device *pdev)
psy_cfg.drv_data = axp20x_batt;
psy_cfg.of_node = pdev->dev.of_node;
- axp20x_batt->data = (struct axp_data *)of_device_get_match_data(dev);
+ axp20x_batt->data = (struct axp_data *)device_get_match_data(dev);
axp20x_batt->batt = devm_power_supply_register(&pdev->dev,
&axp20x_batt_ps_desc,
@@ -616,6 +692,7 @@ static int axp20x_power_probe(struct platform_device *pdev)
if (!power_supply_get_battery_info(axp20x_batt->batt, &info)) {
int vmin = info->voltage_min_design_uv;
int ccc = info->constant_charge_current_max_ua;
+ int cfd = info->charge_full_design_uah;
if (vmin > 0 && axp20x_set_voltage_min_design(axp20x_batt,
vmin))
@@ -633,7 +710,22 @@ static int axp20x_power_probe(struct platform_device *pdev)
axp20x_batt->max_ccc = ccc;
axp20x_set_constant_charge_current(axp20x_batt, ccc);
}
- }
+
+
+ axp20x_batt->energy_full_design = info->energy_full_design_uwh;
+ // tell pmic about our battery
+ if (cfd) {
+ // [14:8], [7:0], cfd = Value * 1.456mAh
+ cfd = cfd / 1456;
+ regmap_update_bits(axp20x_batt->regmap, AXP288_FG_DES_CAP0_REG, 0xff, cfd & 0xff);
+ regmap_update_bits(axp20x_batt->regmap, AXP288_FG_DES_CAP1_REG, 0xff, BIT(7) | ((cfd >> 8) & 0xff));
+ } else {
+ dev_warn(axp20x_batt->dev, "charge full design is not set");
+ }
+ } else {
+ axp20x_batt->energy_full_design = 8000000;
+ dev_warn(axp20x_batt->dev, "energy full design is not set, default to %d\n", axp20x_batt->energy_full_design);
+ }
/*
* Update max CCC to a valid value if battery info is present or set it
@@ -642,6 +734,12 @@ static int axp20x_power_probe(struct platform_device *pdev)
axp20x_get_constant_charge_current(axp20x_batt,
&axp20x_batt->max_ccc);
+ regmap_update_bits(axp20x_batt->regmap, AXP20X_VBUS_IPSOUT_MGMT, 0x03, 0x03);
+ regmap_update_bits(axp20x_batt->regmap, AXP20X_OFF_CTRL, 0x08, 0x08);
+ regmap_update_bits(axp20x_batt->regmap, AXP20X_CHRG_CTRL2, 0x30, 0x20);
+ regmap_update_bits(axp20x_batt->regmap, AXP20X_PEK_KEY, 0x0f, 0x0b);
+ regmap_update_bits(axp20x_batt->regmap, AXP20X_GPIO0_CTRL, 0x07, 0x00);
+
return 0;
}
--
2.53.0

View file

@ -1,17 +1,17 @@
# Archived: -dev packages x86_64 binaries in aarch64 package which makes akms part of device-clockworkpi-uconsole-radxa-cm5 fail when built on aarch64
# Reference: <https://postmarketos.org/vendorkernel>
# Kernel config based on: arch/arm64/configs/rockchip_linux_defconfig
maintainer="Antoine Martin (ayakael) <dev@ayakael.net>"
pkgname=linux-clockworkpi-uconsole-radxa-cm5
pkgver=6.1.115
pkgrel=2
pkgdesc="Radxa kernel fork"
pkgdesc="Radxa kernel fork with uConsole drivers"
arch="aarch64"
_carch="arm64"
_flavor="radxa"
_flavor="clockworkpi-uconsole-radxa-cm5"
url="https://kernel.org"
license="GPL-2.0-only"
options="!strip !check !tracedeps pmb:cross-native"
subpackages="$pkgname-dev:_dev:$CBUILD_ARCH"
makedepends="
bash
bc
@ -26,57 +26,49 @@ makedepends="
openssl-dev
perl
xz
zstd
"
# Source
_repository="kernel"
_commit="74729d7c051026f99138b6e0e60d580c0bf226db"
# from linux-6.1-stan-rkr5.1
_commit="8582469f117fdfd5d1ab88fa7e4e15c3b714bf24"
_dtso_commit="c2204834e1d7d0acfd64e1b7874d432bc142f1a4"
_config="config-$_flavor.$arch"
source="
$pkgname-$_commit.tar.gz::https://github.com/radxa/$_repository/archive/$_commit.tar.gz
radxa-cm5-uconsole-$_dtso_commit.tar.gz::https://github.com/dev-null2019/radxa-cm5-uconsole/archive/$_dtso_commit.tar.gz
$_config
0001-video-backlight-Add-OCP8178-backlight-driver.patch
0002-drm-panel-add-clockwork-cwu50.patch
0003-power-axp20x_battery-implement-calibration.patch
postmarketos-defconfig.patch
"
replaces="linux-radxa=$pkgver-r$pkgrel"
builddir="$srcdir/$_repository-$_commit"
_builddir="$srcdir"/build-$_flavor.$CARCH
_dtsodir="$srcdir"/radxa-cm5-uconsole-$_dtso_commit/devicetree_overlays
prepare() {
default_prepare
mkdir -p "$_builddir"
cp "$srcdir/config-$_flavor.$CARCH" "$_builddir"/.config
# copies missing library
mkdir -p "$_builddir"/drivers/gpu/arm/bifrost/
cp "$builddir"/drivers/gpu/arm/bifrost/mali_csffw.bin "$_builddir"/drivers/gpu/arm/bifrost/mali_csffw.bin
# remove and regenerate localversion
rm -f localversion*
echo "-$pkgrel-$_flavor" > "$_builddir"/localversion-postmarketos
make -C "$builddir" \
O="$_builddir" \
ARCH="$_carch" \
olddefconfig
cp "$srcdir/config-$_flavor.$CARCH" .config
}
build() {
unset LDFLAGS
cd "$_builddir"
local _kver=$(make kernelversion)
if [ "$_kver" != "$pkgver" ]; then
error "Version in Makefile ($_kver) does not correspond with pkgver ($pkgver)"
return 1
fi
make ARCH="$_carch" CC="${CC:-gcc}" \
KBUILD_BUILD_VERSION="$((pkgrel + 1))-postmarketOS"
# generate dtbo for uconsole
for dts in "$_dtsodir"/*.dts; do
cpp -nostdinc -I "$_dtsodir" -I arch -undef -x assembler-with-cpp $dts $dts.preprocessed
dtc -O dtb -o ${dts/.dts/.dtbo} $dts.preprocessed
done
}
package() {
downstreamkernel_package "$_builddir" "$pkgdir" "$_carch" "$_flavor"
downstreamkernel_package "$builddir" "$pkgdir" "$_carch" "$_flavor"
cd "$_builddir"
mkdir -p "$pkgdir"/boot
make modules_install dtbs_install \
ARCH="$_carch" \
INSTALL_PATH="$pkgdir"/boot \
@ -84,61 +76,16 @@ package() {
INSTALL_MOD_STRIP=1 \
INSTALL_DTBS_PATH="$pkgdir"/boot/dtbs
rm -f "$pkgdir"/lib/modules/*/build "$pkgdir"/lib/modules/*/source
# merge dtbos with soc dtb for uconsole
fdtoverlay -i "$builddir"/arch/arm64/boot/dts/rockchip/rk3588s-radxa-cm5-rpi-cm4-io.dtb "$_dtsodir"/*.dtbo -o "$pkgdir"/boot/dtbs/rockchip/rk3588s-radxa-cm5-uconsole.dtb
}
_dev() {
cd "$_builddir"
local _abi_release="$(make -s kernelrelease)"
# copy the only the parts that we really need for build 3rd party
# kernel modules and install those as /usr/src/linux-headers,
# simlar to what ubuntu does
#
# this way you dont need to install the 300-400 kernel sources to
# build a tiny kernel module
#
pkgdesc="Headers and script for third party modules for $_flavor kernel"
depends="$_depends_dev"
local dir="$subpkgdir"/usr/src/linux-headers-$_abi_release
# first we import config, run prepare to set up for building
# external modules, and create the scripts
mkdir -p "$dir"
cp "$_builddir"/.config "$dir"/.config
echo "-$pkgrel-$_flavor" > "$dir"/localversion-postmarketos
make -j1 -C "$builddir" ARCH="$_carch" O="$dir" \
syncconfig prepare modules_prepare scripts
# remove the stuff that points to real sources. we want 3rd party
# modules to believe this is the sources
rm "$dir"/Makefile "$dir"/source
# copy the needed stuff from real sources
#
# this is taken from ubuntu kernel build script
# http://kernel.ubuntu.com/git/ubuntu/ubuntu-zesty.git/tree/debian/rules.d/3-binary-indep.mk
cd "$builddir"
find . -path './include/*' -prune \
-o -path './scripts/*' -prune -o -type f \
\( -name 'Makefile*' -o -name 'Kconfig*' -o -name 'Kbuild*' -o \
-name '*.sh' -o -name '*.pl' -o -name '*.lds' \) \
-print | cpio -pdm "$dir"
cp -a scripts include "$dir"
find $(find arch -name include -type d -print) -type f \
| cpio -pdm "$dir"
install -Dm644 "$_builddir"/Module.symvers \
"$dir"/Module.symvers
mkdir -p "$subpkgdir"/lib/modules/$_abi_release
ln -sf /usr/src/linux-headers-$_abi_release \
"$subpkgdir"/lib/modules/$_abi_release/build
}
sha512sums="
3c268ca3eaaa6bbffce9759f963ec6030a4a4d2c3b8ed5e130ca5c29d25bad78e43faa575fbc6c1f90ffdbffea39db6a569f073d1917547a4bfbe7b8bf506578 linux-radxa-74729d7c051026f99138b6e0e60d580c0bf226db.tar.gz
e23a8fb644bca3e18c399112b1f0f569ddcda37d1cceb2fdef82ef97993071ee085c16c35898a22222988876af5456bc422bb247d501ff6725aa7c6cc7367522 config-radxa.aarch64
a9ec1018a798ee26cb864933dd3aa1d460e6e40a30c55cb0fdd56806031f3b2755d3823d6c30f7bcc1d2bb71d3cabe7a409f46a2e5ff78dc9ff5a31108709758 postmarketos-defconfig.patch
c59852f84aa505f85fd1bd30e36583aad506ae641072b2b8c69f5bb889e80d7fc6612411a912be07ae4d81b031aa3a2ede6b63121c69e0872807f8f6903abde9 linux-clockworkpi-uconsole-radxa-cm5-8582469f117fdfd5d1ab88fa7e4e15c3b714bf24.tar.gz
a15eb74d9db9114022e96ba04542d18350cf6d637c5efa49f4a5a65c33c5fd20a7997095a049a561fb7aac767a299f367489c5a342138a5259cc32ebb6152384 radxa-cm5-uconsole-c2204834e1d7d0acfd64e1b7874d432bc142f1a4.tar.gz
51da11849ccc66a133a51ea40157e22b8beb9e4e4f2bab7eb8aa6afd859b7bd4638c332dacc97e66671e1a78e7ffd497300ccc53627e0c47af50b6e34f3be8b5 config-clockworkpi-uconsole-radxa-cm5.aarch64
41ee267962fc9f5580997bfaabaafd782f42995599b127df30794a7b5147b5b7bf787de6206642480c07c7716fe494bc135f24a9bcf406ab57a73af6292fc915 0001-video-backlight-Add-OCP8178-backlight-driver.patch
e9402b88083cc2d3af6c471e36e00e65e97d88cde447ce2f59c07bf29fc712bfdeae6d6d3b503115763b57ba2ac00e827654bc24a91b1cb85b575fdd0db8f5be 0002-drm-panel-add-clockwork-cwu50.patch
f3ce23b013ed7bfbf51849ec683fad2f53ea5e7e5907bbd7f60f56c630dc3ec7d4c595fbb217019e100a053dcdbb731da1f376db5fc841562afa2059b24d7d0a 0003-power-axp20x_battery-implement-calibration.patch
2c9c3649e621841ea067dba5df1deca721c0800ee465356d4f1d71825af081cdbfaa6e88e463a2c48682ac0f3e7ed3e9b8373ee87f5f00d6aa9484be0ab82a87 postmarketos-defconfig.patch
"

View file

@ -2,14 +2,14 @@
# Automatically generated file; DO NOT EDIT.
# Linux/arm64 6.1.115 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="aarch64-alpine-linux-musl-gcc (Alpine 14.3.0) 14.3.0"
CONFIG_CC_VERSION_TEXT="aarch64-alpine-linux-musl-gcc (Alpine 15.2.0) 15.2.0"
CONFIG_CC_IS_GCC=y
CONFIG_GCC_VERSION=140300
CONFIG_GCC_VERSION=150200
CONFIG_CLANG_VERSION=0
CONFIG_AS_IS_GNU=y
CONFIG_AS_VERSION=24200
CONFIG_AS_VERSION=24501
CONFIG_LD_IS_BFD=y
CONFIG_LD_VERSION=24200
CONFIG_LD_VERSION=24501
CONFIG_LLD_VERSION=0
CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y
CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y
@ -739,10 +739,11 @@ CONFIG_MODVERSIONS=y
CONFIG_ASM_MODVERSIONS=y
CONFIG_MODULE_SRCVERSION_ALL=y
# CONFIG_MODULE_SIG is not set
CONFIG_MODULE_COMPRESS_NONE=y
# CONFIG_MODULE_COMPRESS_NONE is not set
# CONFIG_MODULE_COMPRESS_GZIP is not set
# CONFIG_MODULE_COMPRESS_XZ is not set
# CONFIG_MODULE_COMPRESS_ZSTD is not set
CONFIG_MODULE_COMPRESS=y
CONFIG_MODULE_COMPRESS_ZSTD=y
# CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS is not set
CONFIG_MODPROBE_PATH="/sbin/modprobe"
# CONFIG_TRIM_UNUSED_KSYMS is not set
@ -2398,7 +2399,7 @@ CONFIG_BCACHE=m
# CONFIG_BCACHE_CLOSURES_DEBUG is not set
# CONFIG_BCACHE_ASYNC_REGISTRATION is not set
CONFIG_BLK_DEV_DM_BUILTIN=y
CONFIG_BLK_DEV_DM=m
CONFIG_BLK_DEV_DM=y
# CONFIG_DM_DEBUG is not set
CONFIG_DM_BUFIO=m
# CONFIG_DM_DEBUG_BLOCK_MANAGER_LOCKING is not set
@ -2425,6 +2426,7 @@ CONFIG_DM_MULTIPATH_ST=m
# CONFIG_DM_MULTIPATH_IOA is not set
CONFIG_DM_DELAY=m
# CONFIG_DM_DUST is not set
# CONFIG_DM_INIT is not set
# CONFIG_DM_UEVENT is not set
CONFIG_DM_FLAKEY=m
CONFIG_DM_VERITY=m
@ -2883,8 +2885,11 @@ CONFIG_BRCMFMAC_PROTO_BCDC=y
CONFIG_BRCMFMAC_SDIO=y
# CONFIG_BRCMFMAC_USB is not set
# CONFIG_BRCMFMAC_PCIE is not set
# CONFIG_BRCMFMAC_BT_SHARED_SDIO is not set
# CONFIG_INFFMAC_BT_SHARED_SDIO is not set
# CONFIG_BRCM_TRACING is not set
# CONFIG_BRCMDBG is not set
# CONFIG_BRCMFMAC_PCIE_BARWIN_SZ is not set
CONFIG_WLAN_VENDOR_CISCO=y
CONFIG_WLAN_VENDOR_INTEL=y
# CONFIG_IPW2100 is not set
@ -3067,7 +3072,7 @@ CONFIG_INPUT_FF_MEMLESS=y
#
# CONFIG_INPUT_MOUSEDEV is not set
# CONFIG_INPUT_JOYDEV is not set
CONFIG_INPUT_EVDEV=y
CONFIG_INPUT_EVDEV=m
# CONFIG_INPUT_EVBUG is not set
#
@ -3281,6 +3286,7 @@ CONFIG_INPUT_MISC=y
# CONFIG_INPUT_YEALINK is not set
# CONFIG_INPUT_CM109 is not set
# CONFIG_INPUT_REGULATOR_HAPTIC is not set
CONFIG_INPUT_AXP20X_PEK=m
CONFIG_INPUT_UINPUT=y
# CONFIG_INPUT_PCF8574 is not set
# CONFIG_INPUT_PWM_BEEPER is not set
@ -3383,7 +3389,7 @@ CONFIG_SERIAL_MCTRL_GPIO=y
# CONFIG_SERIAL_NONSTANDARD is not set
# CONFIG_N_GSM is not set
# CONFIG_NOZOMI is not set
CONFIG_NULL_TTY=y
CONFIG_NULL_TTY=m
# CONFIG_HVC_DCC is not set
# CONFIG_RPMSG_TTY is not set
CONFIG_SERIAL_DEV_BUS=y
@ -3606,6 +3612,7 @@ CONFIG_PINMUX=y
CONFIG_PINCONF=y
CONFIG_GENERIC_PINCONF=y
# CONFIG_DEBUG_PINCTRL is not set
CONFIG_PINCTRL_AXP209=m
# CONFIG_PINCTRL_CY8C95X0 is not set
# CONFIG_PINCTRL_MCP23S08 is not set
# CONFIG_PINCTRL_MICROCHIP_SGPIO is not set
@ -3780,6 +3787,9 @@ CONFIG_BATTERY_SBS=y
# CONFIG_CHARGER_SBS is not set
# CONFIG_MANAGER_SBS is not set
# CONFIG_BATTERY_BQ27XXX is not set
CONFIG_CHARGER_AXP20X=m
CONFIG_BATTERY_AXP20X=m
CONFIG_AXP20X_POWER=m
# CONFIG_BATTERY_MAX17040 is not set
# CONFIG_BATTERY_MAX17042 is not set
# CONFIG_BATTERY_MAX1721X is not set
@ -4064,7 +4074,8 @@ CONFIG_MFD_CORE=y
# CONFIG_MFD_ATMEL_HLCDC is not set
# CONFIG_MFD_BCM590XX is not set
# CONFIG_MFD_BD9571MWV is not set
# CONFIG_MFD_AXP20X_I2C is not set
CONFIG_MFD_AXP20X=y
CONFIG_MFD_AXP20X_I2C=y
# CONFIG_MFD_MADERA is not set
# CONFIG_PMIC_DA903X is not set
# CONFIG_MFD_DA9052_SPI is not set
@ -4199,6 +4210,7 @@ CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_ACT8865=y
# CONFIG_REGULATOR_AD5398 is not set
# CONFIG_REGULATOR_ARM_SCMI is not set
CONFIG_REGULATOR_AXP20X=y
# CONFIG_REGULATOR_DA9121 is not set
# CONFIG_REGULATOR_DA9210 is not set
# CONFIG_REGULATOR_DA9211 is not set
@ -5260,6 +5272,7 @@ CONFIG_DRM_PANEL_RASPITS_TC358762=y
# CONFIG_DRM_PANEL_VISIONOX_RM69299 is not set
# CONFIG_DRM_PANEL_WIDECHIPS_WS2401 is not set
# CONFIG_DRM_PANEL_XINPENG_XPP055C272 is not set
CONFIG_DRM_PANEL_CWU50=m
# end of Display Panels
CONFIG_DRM_BRIDGE=y
@ -5312,7 +5325,7 @@ CONFIG_DRM_ANALOGIX_DP=y
# CONFIG_DRM_CDNS_MHDP8546 is not set
CONFIG_DRM_DW_HDMI=y
# CONFIG_DRM_DW_HDMI_AHB_AUDIO is not set
CONFIG_DRM_DW_HDMI_I2S_AUDIO=y
CONFIG_DRM_DW_HDMI_I2S_AUDIO=m
# CONFIG_DRM_DW_HDMI_GP_AUDIO is not set
CONFIG_DRM_DW_HDMI_CEC=y
CONFIG_DRM_DW_MIPI_DSI=y
@ -5505,6 +5518,7 @@ CONFIG_BACKLIGHT_PWM=y
# CONFIG_BACKLIGHT_BD6107 is not set
# CONFIG_BACKLIGHT_ARCXCNN is not set
# CONFIG_BACKLIGHT_LED is not set
CONFIG_BACKLIGHT_OCP8178=m
# end of Backlight & LCD device support
#
@ -5574,21 +5588,21 @@ CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
# CONFIG_LOGO is not set
# end of Graphics support
CONFIG_SOUND=y
CONFIG_SND=y
CONFIG_SND_TIMER=y
CONFIG_SND_PCM=y
CONFIG_SOUND=m
CONFIG_SND=m
CONFIG_SND_TIMER=m
CONFIG_SND_PCM=m
CONFIG_SND_PCM_ELD=y
CONFIG_SND_PCM_IEC958=y
CONFIG_SND_DMAENGINE_PCM=y
CONFIG_SND_HWDEP=y
CONFIG_SND_SEQ_DEVICE=y
CONFIG_SND_RAWMIDI=y
CONFIG_SND_DMAENGINE_PCM=m
CONFIG_SND_HWDEP=m
CONFIG_SND_SEQ_DEVICE=m
CONFIG_SND_RAWMIDI=m
CONFIG_SND_JACK=y
CONFIG_SND_JACK_INPUT_DEV=y
# CONFIG_SND_OSSEMUL is not set
CONFIG_SND_PCM_TIMER=y
CONFIG_SND_HRTIMER=y
CONFIG_SND_HRTIMER=m
CONFIG_SND_DYNAMIC_MINORS=y
CONFIG_SND_MAX_CARDS=32
# CONFIG_SND_SUPPORT_OLD_API is not set
@ -5598,11 +5612,11 @@ CONFIG_SND_VERBOSE_PROCFS=y
CONFIG_SND_CTL_FAST_LOOKUP=y
# CONFIG_SND_DEBUG is not set
# CONFIG_SND_CTL_INPUT_VALIDATION is not set
CONFIG_SND_SEQUENCER=y
CONFIG_SND_SEQ_DUMMY=y
CONFIG_SND_SEQUENCER=m
CONFIG_SND_SEQ_DUMMY=m
CONFIG_SND_SEQ_HRTIMER_DEFAULT=y
CONFIG_SND_SEQ_MIDI_EVENT=y
CONFIG_SND_SEQ_MIDI=y
CONFIG_SND_SEQ_MIDI_EVENT=m
CONFIG_SND_SEQ_MIDI=m
CONFIG_SND_DRIVERS=y
# CONFIG_SND_DUMMY is not set
# CONFIG_SND_ALOOP is not set
@ -5621,7 +5635,7 @@ CONFIG_SND_DRIVERS=y
CONFIG_SND_HDA_PREALLOC_SIZE=64
# CONFIG_SND_SPI is not set
CONFIG_SND_USB=y
CONFIG_SND_USB_AUDIO=y
CONFIG_SND_USB_AUDIO=m
CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y
# CONFIG_SND_USB_UA101 is not set
# CONFIG_SND_USB_CAIAQ is not set
@ -5632,7 +5646,7 @@ CONFIG_SND_USB_AUDIO_USE_MEDIA_CONTROLLER=y
# CONFIG_SND_USB_PODHD is not set
# CONFIG_SND_USB_TONEPORT is not set
# CONFIG_SND_USB_VARIAX is not set
CONFIG_SND_SOC=y
CONFIG_SND_SOC=m
CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_SOC_DYNAMIC_DMA_CHAN is not set
# CONFIG_SND_SOC_ADI is not set
@ -5664,27 +5678,27 @@ CONFIG_SND_SOC_GENERIC_DMAENGINE_PCM=y
# CONFIG_SND_I2S_HI6210_I2S is not set
# CONFIG_SND_SOC_IMG is not set
# CONFIG_SND_SOC_MTK_BTCVSD is not set
CONFIG_SND_SOC_ROCKCHIP=y
CONFIG_SND_SOC_ROCKCHIP_ASRC=y
CONFIG_SND_SOC_ROCKCHIP_DLP=y
CONFIG_SND_SOC_ROCKCHIP_DLP_PCM=y
CONFIG_SND_SOC_ROCKCHIP=m
CONFIG_SND_SOC_ROCKCHIP_ASRC=m
CONFIG_SND_SOC_ROCKCHIP_DLP=m
CONFIG_SND_SOC_ROCKCHIP_DLP_PCM=m
# CONFIG_SND_SOC_ROCKCHIP_DUMMY_DAI is not set
CONFIG_SND_SOC_ROCKCHIP_I2S=y
CONFIG_SND_SOC_ROCKCHIP_I2S_TDM=y
CONFIG_SND_SOC_ROCKCHIP_I2S=m
CONFIG_SND_SOC_ROCKCHIP_I2S_TDM=m
# CONFIG_SND_SOC_ROCKCHIP_I2S_TDM_MULTI_LANES is not set
CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS=y
CONFIG_SND_SOC_ROCKCHIP_PDM=y
CONFIG_SND_SOC_ROCKCHIP_PDM_V2=y
CONFIG_SND_SOC_ROCKCHIP_SAI=y
CONFIG_SND_SOC_ROCKCHIP_MULTI_DAIS=m
CONFIG_SND_SOC_ROCKCHIP_PDM=m
CONFIG_SND_SOC_ROCKCHIP_PDM_V2=m
CONFIG_SND_SOC_ROCKCHIP_SAI=m
# CONFIG_SND_SOC_ROCKCHIP_SAI_VERBOSE is not set
CONFIG_SND_SOC_ROCKCHIP_SPDIF=y
CONFIG_SND_SOC_ROCKCHIP_SPDIFRX=y
CONFIG_SND_SOC_ROCKCHIP_TRCM=y
CONFIG_SND_SOC_ROCKCHIP_SPDIF=m
CONFIG_SND_SOC_ROCKCHIP_SPDIFRX=m
CONFIG_SND_SOC_ROCKCHIP_TRCM=m
# CONFIG_SND_SOC_ROCKCHIP_VAD is not set
CONFIG_SND_SOC_ROCKCHIP_MAX98090=y
CONFIG_SND_SOC_ROCKCHIP_MULTICODECS=y
CONFIG_SND_SOC_ROCKCHIP_RT5645=y
CONFIG_SND_SOC_ROCKCHIP_HDMI=y
CONFIG_SND_SOC_ROCKCHIP_MAX98090=m
CONFIG_SND_SOC_ROCKCHIP_MULTICODECS=m
CONFIG_SND_SOC_ROCKCHIP_RT5645=m
CONFIG_SND_SOC_ROCKCHIP_HDMI=m
# CONFIG_SND_SOC_RK3288_HDMI_ANALOG is not set
# CONFIG_SND_SOC_RK3399_GRU_SOUND is not set
# CONFIG_SND_SOC_SOF_TOPLEVEL is not set
@ -5698,7 +5712,7 @@ CONFIG_SND_SOC_ROCKCHIP_HDMI=y
# CONFIG_SND_SOC_XILINX_AUDIO_FORMATTER is not set
# CONFIG_SND_SOC_XILINX_SPDIF is not set
# CONFIG_SND_SOC_XTFPGA_I2S is not set
CONFIG_SND_SOC_I2C_AND_SPI=y
CONFIG_SND_SOC_I2C_AND_SPI=m
#
# CODEC drivers
@ -5753,19 +5767,19 @@ CONFIG_SND_SOC_I2C_AND_SPI=y
# CONFIG_SND_SOC_CX2072X is not set
# CONFIG_SND_SOC_DA7213 is not set
# CONFIG_SND_SOC_DMIC is not set
CONFIG_SND_SOC_DUMMY_CODEC=y
CONFIG_SND_SOC_HDMI_CODEC=y
CONFIG_SND_SOC_DUMMY_CODEC=m
CONFIG_SND_SOC_HDMI_CODEC=m
# CONFIG_SND_SOC_ES7134 is not set
CONFIG_SND_SOC_ES7202=y
CONFIG_SND_SOC_ES7202=m
CONFIG_SND_SOC_ES7202_MIC_MAX_CHANNELS=2
CONFIG_SND_SOC_ES7202_I2C_BUS=1
# CONFIG_SND_SOC_ES7210 is not set
# CONFIG_SND_SOC_ES7241 is not set
CONFIG_SND_SOC_ES7243E=y
CONFIG_SND_SOC_ES8311=y
CONFIG_SND_SOC_ES8316=y
CONFIG_SND_SOC_ES8323=y
CONFIG_SND_SOC_ES8326=y
CONFIG_SND_SOC_ES7243E=m
CONFIG_SND_SOC_ES8311=m
CONFIG_SND_SOC_ES8316=m
CONFIG_SND_SOC_ES8323=m
CONFIG_SND_SOC_ES8326=m
# CONFIG_SND_SOC_ES8328_I2C is not set
# CONFIG_SND_SOC_ES8328_SPI is not set
# CONFIG_SND_SOC_ES8396 is not set
@ -5774,7 +5788,7 @@ CONFIG_SND_SOC_ES8326=y
# CONFIG_SND_SOC_ICS43432 is not set
# CONFIG_SND_SOC_INNO_RK3036 is not set
# CONFIG_SND_SOC_MAX98088 is not set
CONFIG_SND_SOC_MAX98090=y
CONFIG_SND_SOC_MAX98090=m
# CONFIG_SND_SOC_MAX98357A is not set
# CONFIG_SND_SOC_MAX98504 is not set
# CONFIG_SND_SOC_MAX9867 is not set
@ -5800,28 +5814,28 @@ CONFIG_SND_SOC_MAX98090=y
# CONFIG_SND_SOC_PCM512x_SPI is not set
# CONFIG_SND_SOC_RK312X is not set
# CONFIG_SND_SOC_RK3228 is not set
CONFIG_SND_SOC_RK3308=y
CONFIG_SND_SOC_RK3328=y
CONFIG_SND_SOC_RK3308=m
CONFIG_SND_SOC_RK3328=m
# CONFIG_SND_SOC_RK3506 is not set
CONFIG_SND_SOC_RK3528=y
CONFIG_SND_SOC_RK3528=m
# CONFIG_SND_SOC_RK730 is not set
CONFIG_SND_SOC_RK817=y
CONFIG_SND_SOC_RK_CODEC_DIGITAL=y
CONFIG_SND_SOC_RK_DSM=y
CONFIG_SND_SOC_RL6231=y
CONFIG_SND_SOC_RK817=m
CONFIG_SND_SOC_RK_CODEC_DIGITAL=m
CONFIG_SND_SOC_RK_DSM=m
CONFIG_SND_SOC_RL6231=m
# CONFIG_SND_SOC_ROCKCHIP_SPI_CODEC is not set
CONFIG_SND_SOC_RT5616=y
CONFIG_SND_SOC_RT5616=m
# CONFIG_SND_SOC_RT5631 is not set
CONFIG_SND_SOC_RT5640=y
CONFIG_SND_SOC_RT5645=y
CONFIG_SND_SOC_RT5651=y
CONFIG_SND_SOC_RT5640=m
CONFIG_SND_SOC_RT5645=m
CONFIG_SND_SOC_RT5651=m
# CONFIG_SND_SOC_RT5659 is not set
# CONFIG_SND_SOC_RT9120 is not set
# CONFIG_SND_SOC_RV1106 is not set
# CONFIG_SND_SOC_SGTL5000 is not set
# CONFIG_SND_SOC_SIMPLE_AMPLIFIER is not set
# CONFIG_SND_SOC_SIMPLE_MUX is not set
CONFIG_SND_SOC_SPDIF=y
CONFIG_SND_SOC_SPDIF=m
# CONFIG_SND_SOC_SRC4XXX_I2C is not set
# CONFIG_SND_SOC_SSM2305 is not set
# CONFIG_SND_SOC_SSM2518 is not set
@ -5854,7 +5868,7 @@ CONFIG_SND_SOC_SPDIF=y
# CONFIG_SND_SOC_TLV320AIC3X_I2C is not set
# CONFIG_SND_SOC_TLV320AIC3X_SPI is not set
# CONFIG_SND_SOC_TLV320ADCX140 is not set
CONFIG_SND_SOC_TS3A227E=y
CONFIG_SND_SOC_TS3A227E=m
# CONFIG_SND_SOC_TSCS42XX is not set
# CONFIG_SND_SOC_TSCS454 is not set
# CONFIG_SND_SOC_UDA1334 is not set
@ -5905,8 +5919,8 @@ CONFIG_SND_SOC_TS3A227E=y
# CONFIG_SND_SOC_IT6621 is not set
# end of CODEC drivers
CONFIG_SND_SIMPLE_CARD_UTILS=y
CONFIG_SND_SIMPLE_CARD=y
CONFIG_SND_SIMPLE_CARD_UTILS=m
CONFIG_SND_SIMPLE_CARD=m
# CONFIG_SND_AUDIO_GRAPH_CARD is not set
# CONFIG_SND_AUDIO_GRAPH_CARD2 is not set
# CONFIG_SND_TEST_COMPONENT is not set
@ -7200,6 +7214,8 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2
# CONFIG_AD7949 is not set
# CONFIG_AD799X is not set
# CONFIG_ADI_AXI_ADC is not set
CONFIG_AXP20X_ADC=m
# CONFIG_AXP288_ADC is not set
# CONFIG_CC10001_ADC is not set
# CONFIG_ENVELOPE_DETECTOR is not set
# CONFIG_HI8435 is not set
@ -7225,7 +7241,7 @@ CONFIG_ROCKCHIP_SARADC=y
# CONFIG_ROCKCHIP_SARADC_TEST_CHN is not set
# CONFIG_RICHTEK_RTQ6056 is not set
# CONFIG_SD_ADC_MODULATOR is not set
# CONFIG_TI_ADC081C is not set
CONFIG_TI_ADC081C=y
# CONFIG_TI_ADC0832 is not set
# CONFIG_TI_ADC084S021 is not set
# CONFIG_TI_ADC12138 is not set
@ -8024,7 +8040,7 @@ CONFIG_NFS_SWAP=y
CONFIG_NFS_V4_1=y
CONFIG_NFS_V4_2=y
CONFIG_PNFS_FILE_LAYOUT=y
CONFIG_PNFS_BLOCK=m
CONFIG_PNFS_BLOCK=y
CONFIG_PNFS_FLEXFILE_LAYOUT=y
CONFIG_NFS_V4_1_IMPLEMENTATION_ID_DOMAIN="kernel.org"
CONFIG_NFS_V4_1_MIGRATION=y

View file

@ -2,11 +2,16 @@ diff --git a/./arch/arm64/configs/rockchip_linux_defconfig.orig b/./arch/arm64/c
index 0a870e6c7a..7ce0610aec 100644
--- a/./arch/arm64/configs/rockchip_linux_defconfig.orig
+++ b/./arch/arm64/configs/rockchip_linux_defconfig
@@ -1,3 +1,14 @@
@@ -1,3 +1,29 @@
+CONFIG_MODULE_COMPRESS=y
+CONFIG_MODULE_COMPRESS_ZSTD=y
+CONFIG_BLK_DEV_DM=y
+CONFIG_INPUT_EVDEV=m
+CONFIG_PNFS_BLOCK=y
+CONFIG_UDMABUF=y
+CONFIG_UEVENT_HELPER=y
+CONFIG_UEVENT_HELPER_PATH=""
+CONFIG_NULL_TTY=y
+CONFIG_NULL_TTY=m
+CONFIG_PSI=y
+CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_FW_LOADER_COMPRESS=y
@ -14,6 +19,16 @@ index 0a870e6c7a..7ce0610aec 100644
+CONFIG_FW_LOADER_COMPRESS_ZSTD=y
+CONFIG_RT2800USB=m
+CONFIG_RT2800USB_RT53XX=y
+CONFIG_BACKLIGHT_OCP8178=m
+CONFIG_DRM_PANEL_CWU50=m
+CONFIG_INPUT_AXP20X_PEK=y
+CONFIG_PINCTRL_AXP209=y
+CONFIG_CHARGER_AXP20X=y
+CONFIG_BATTERY_AXP20X=y
+CONFIG_AXP20X_POWER=y
+CONFIG_MFD_AXP20X=y
+CONFIG_MFD_AXP20X_I2C=y
+CONFIG_REGULATOR_AXP20X=y
CONFIG_WERROR=y
CONFIG_DEFAULT_HOSTNAME="localhost"
CONFIG_SYSVIPC=y