From 9c8ccba14249a00549e01df8034a2db3487819bf Mon Sep 17 00:00:00 2001 From: Anton Bambura Date: Wed, 17 May 2023 01:17:01 +0300 Subject: [PATCH] linux-postmarketos-mediatek-mt8183: upgrade to 6.1.28 (MR 4089) [ci:skip-build]: Already built successfully in CI --- ...t8183-Add-kukui-jacuzzi-makomo-board.patch | 92 --- ...4-dts-mediatek-Add-mt8183-kukui-jacu.patch | 41 - ...imax8279d-MIPI-DSI-LCD-panel-driver.patch} | 26 +- ...-4-arm64-dts-mt8183-Add-katsu-board.patch} | 36 +- ...t8183-Add-kukui-jacuzzi-makomo-board.patch | 62 ++ ...dts-mediatek-Add-mt8183-kukui-katsu.patch} | 19 +- ...atek-Add-mt8183-kukui-jacuzzi-makomo.patch | 25 + ...t8183-Add-kukui-jacuzzi-cerise-board.patch | 161 ++++ ...atek-Add-mt8183-kukui-jacuzzi-cerise.patch | 22 + .../09-add-new-dtbs-to-makefile.patch | 30 + .../APKBUILD | 82 +- ...onfig-postmarketos-mediatek-mt8183.aarch64 | 707 +++++++++++------- .../mt8183-cadmium-improved-kukui.gpu.patch | 39 - ...m-improved-kukui.opp-multi-regulator.patch | 162 ---- .../mt8183-cadmium-kukui.cci-1.patch | 457 ----------- .../mt8183-cadmium-kukui.cci-2.patch | 76 -- .../mt8183-cadmium-kukui.cci-3.patch | 57 -- .../mt8183-cadmium-kukui.cci-4.patch | 237 ------ .../mt8183-cadmium-kukui.cci-5.patch | 43 -- .../mt8183-cadmium-kukui.cci-6.patch | 147 ---- .../mt8183-cadmium-kukui.cci-7.patch | 65 -- .../mt8183-cadmium-kukui.cci-8.patch | 406 ---------- .../mt8183-cadmium-kukui.enable-ite.patch | 153 ++++ .../mt8183-cadmium-kukui.gpu-vsram.patch | 10 - ...8183-cadmium-kukui.move-gpu-opp-to-3.patch | 11 - ...183-cadmium-kukui.panel-dts-rotation.patch | 8 - ...admium-kukui.panel-dts-rotation_sku0.patch | 8 - .../mt8183-fix-audio-module-loading.patch | 110 +++ .../mt8183-kukui-jacuzzi-fix-anx7625-01.patch | 72 -- .../mt8183-kukui-jacuzzi-fix-anx7625-04.patch | 48 -- ...183-kukui-jacuzzi-fix-display-resume.patch | 41 - .../mt8183-panel-orientation.patch | 312 -------- .../mt81xx-fix-low-speed-usb-devices.patch | 43 ++ .../mt81xx-usb-02.patch | 155 ++++ 34 files changed, 1247 insertions(+), 2716 deletions(-) delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/0003-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/0005-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacu.patch rename device/testing/linux-postmarketos-mediatek-mt8183/{0001-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driv.patch => 01-RESEND-v2-1-2-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driver.patch} (94%) rename device/testing/linux-postmarketos-mediatek-mt8183/{0002-arm64-dts-mt8183-Add-katsu-board.patch => 03-v2-1-4-arm64-dts-mt8183-Add-katsu-board.patch} (57%) create mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/04-v2-2-4-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch rename device/testing/linux-postmarketos-mediatek-mt8183/{0004-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-kats.patch => 05-v2-3-4-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-katsu.patch} (56%) create mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/06-v2-4-4-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacuzzi-makomo.patch create mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/07-1-2-arm64-dts-mt8183-Add-kukui-jacuzzi-cerise-board.patch create mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/08-2-2-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacuzzi-cerise.patch create mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/09-add-new-dtbs-to-makefile.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-improved-kukui.gpu.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-improved-kukui.opp-multi-regulator.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-1.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-2.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-3.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-4.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-5.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-6.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-7.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-8.patch create mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.enable-ite.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.gpu-vsram.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.move-gpu-opp-to-3.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.panel-dts-rotation.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.panel-dts-rotation_sku0.patch create mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-fix-audio-module-loading.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-kukui-jacuzzi-fix-anx7625-01.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-kukui-jacuzzi-fix-anx7625-04.patch delete mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt8183-panel-orientation.patch create mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt81xx-fix-low-speed-usb-devices.patch create mode 100644 device/testing/linux-postmarketos-mediatek-mt8183/mt81xx-usb-02.patch diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/0003-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch b/device/testing/linux-postmarketos-mediatek-mt8183/0003-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch deleted file mode 100644 index b892c7559..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/0003-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch +++ /dev/null @@ -1,92 +0,0 @@ -From 873c0534790f2f367c5a1851d16c37c3368bcd7f Mon Sep 17 00:00:00 2001 -From: Hsin-Yi Wang -Date: Mon, 13 Dec 2021 15:23:53 +0800 -Subject: [PATCH 3/5] arm64: dts: mt8183: Add kukui-jacuzzi-makomo board - -Makomo is known as Lenovo 100e Gen 2. - -Signed-off-by: Hsin-Yi Wang ---- - arch/arm64/boot/dts/mediatek/Makefile | 2 ++ - .../mt8183-kukui-jacuzzi-makomo-sku0.dts | 24 +++++++++++++++++++ - .../mt8183-kukui-jacuzzi-makomo-sku1.dts | 24 +++++++++++++++++++ - 3 files changed, 50 insertions(+) - create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts - create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts - -diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile -index cb8d563d079f..57b33de22981 100644 ---- a/arch/arm64/boot/dts/mediatek/Makefile -+++ b/arch/arm64/boot/dts/mediatek/Makefile -@@ -26,6 +26,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-fennel14-sku2.dtb - dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb - dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kappa.dtb - dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kenzo.dtb -+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-makomo-sku0.dtb -+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-makomo-sku1.dtb - dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku0.dtb - dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku1.dtb - dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb -diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts -new file mode 100644 -index 000000000000..51bf2893ec03 ---- /dev/null -+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts -@@ -0,0 +1,24 @@ -+// SPDX-License-Identifier: (GPL-2.0 OR MIT) -+/* -+ * Copyright 2021 Google LLC -+ */ -+ -+/dts-v1/; -+#include "mt8183-kukui-jacuzzi-fennel.dtsi" -+#include "mt8183-kukui-audio-da7219-rt1015p.dtsi" -+ -+/ { -+ model = "Google makomo sku0 board"; -+ compatible = "google,makomo-rev4-sku0", "google,makomo-rev5-sku0", -+ "google,makomo", "mediatek,mt8183"; -+}; -+ -+&qca_wifi { -+ qcom,ath10k-calibration-variant = "GO_FENNEL14"; -+}; -+ -+&mmc1_pins_uhs { -+ pins_clk { -+ drive-strength = ; -+ }; -+}; -diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts -new file mode 100644 -index 000000000000..c3b7e9bb0c89 ---- /dev/null -+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts -@@ -0,0 +1,24 @@ -+// SPDX-License-Identifier: (GPL-2.0 OR MIT) -+/* -+ * Copyright 2021 Google LLC -+ */ -+ -+/dts-v1/; -+#include "mt8183-kukui-jacuzzi-fennel.dtsi" -+#include "mt8183-kukui-audio-ts3a227e-rt1015p.dtsi" -+ -+/ { -+ model = "Google makomo sku1 board"; -+ compatible = "google,makomo-rev4-sku1", "google,makomo-rev5-sku1", -+ "google,makomo", "mediatek,mt8183"; -+}; -+ -+&qca_wifi { -+ qcom,ath10k-calibration-variant = "GO_FENNEL14"; -+}; -+ -+&mmc1_pins_uhs { -+ pins_clk { -+ drive-strength = ; -+ }; -+}; --- -2.39.1 - diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/0005-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacu.patch b/device/testing/linux-postmarketos-mediatek-mt8183/0005-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacu.patch deleted file mode 100644 index b271659fd..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/0005-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacu.patch +++ /dev/null @@ -1,41 +0,0 @@ -From 01a91263c79ec7730e3c6eb4ed71436f2e14639d Mon Sep 17 00:00:00 2001 -From: Hsin-Yi Wang -Date: Mon, 13 Dec 2021 15:23:55 +0800 -Subject: [PATCH 5/5] dt-bindings: arm64: dts: mediatek: Add - mt8183-kukui-jacuzzi-makomo - -Makomo is known as Lenovo 100e Gen 2 Chromebook. - -Signed-off-by: Hsin-Yi Wang ---- - .../devicetree/bindings/arm/mediatek.yaml | 14 ++++++++++++++ - 1 file changed, 14 insertions(+) - -diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml -index 1fdb9a91635d..f13c7c66cfbb 100644 ---- a/Documentation/devicetree/bindings/arm/mediatek.yaml -+++ b/Documentation/devicetree/bindings/arm/mediatek.yaml -@@ -203,6 +203,20 @@ properties: - - google,kodama-sku32 - - const: google,kodama - - const: mediatek,mt8183 -+ - description: Google Makomo (Lenovo 100e Gen 2) -+ items: -+ - enum: -+ - const: google,makomo-rev4-sku0 -+ - const: google,makomo-rev5-sku0 -+ - const: google,makomo -+ - const: mediatek,mt8183 -+ - description: Google Makomo (Lenovo 100e Gen 2) -+ items: -+ - enum: -+ - const: google,makomo-rev4-sku1 -+ - const: google,makomo-rev5-sku1 -+ - const: google,makomo -+ - const: mediatek,mt8183 - - description: Google Willow (Acer Chromebook 311 C722/C722T) - items: - - enum: --- -2.39.1 - diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/0001-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driv.patch b/device/testing/linux-postmarketos-mediatek-mt8183/01-RESEND-v2-1-2-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driver.patch similarity index 94% rename from device/testing/linux-postmarketos-mediatek-mt8183/0001-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driv.patch rename to device/testing/linux-postmarketos-mediatek-mt8183/01-RESEND-v2-1-2-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driver.patch index 29b2a0ca0..84fb85a19 100644 --- a/device/testing/linux-postmarketos-mediatek-mt8183/0001-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driv.patch +++ b/device/testing/linux-postmarketos-mediatek-mt8183/01-RESEND-v2-1-2-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driver.patch @@ -1,18 +1,5 @@ -From ae92d9b9f1bd0b7c26fb49bc8256356ae3734e97 Mon Sep 17 00:00:00 2001 -From: xiazhengqiao -Date: Mon, 8 Nov 2021 18:06:08 +0800 -Subject: [PATCH 1/5] drm/panel: Add inx Himax8279d MIPI-DSI LCD panel driver - -Add STARRY 2081101QFH032011-53G 10.1" WUXGA TFT LCD panel - -Signed-off-by: xiazhengqiao -Tested-by: Hsin-Yi Wang ---- - drivers/gpu/drm/panel/Kconfig | 9 + - drivers/gpu/drm/panel/Makefile | 1 + - .../gpu/drm/panel/panel-innolux-himax8279d.c | 515 ++++++++++++++++++ - 3 files changed, 525 insertions(+) - create mode 100644 drivers/gpu/drm/panel/panel-innolux-himax8279d.c +based on: https://patchwork.freedesktop.org/patch/482097/ +adjusted for v6.1: inx_panel_remove returns void now in drivers/gpu/drm/panel/panel-innolux-himax8279d.c diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index ddf5f38e8731..375a67f69230 100644 @@ -51,7 +38,7 @@ new file mode 100644 index 000000000000..6840449548e4 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-innolux-himax8279d.c -@@ -0,0 +1,515 @@ +@@ -0,0 +1,513 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021, Huaqin Telecom Technology Co., Ltd @@ -528,7 +515,7 @@ index 000000000000..6840449548e4 + drm_panel_unprepare(&inx->base); +} + -+static int inx_panel_remove(struct mipi_dsi_device *dsi) ++static void inx_panel_remove(struct mipi_dsi_device *dsi) +{ + struct inx_panel *inx = mipi_dsi_get_drvdata(dsi); + int ret; @@ -541,8 +528,6 @@ index 000000000000..6840449548e4 + + if (inx->base.dev) + drm_panel_remove(&inx->base); -+ -+ return 0; +} + +static const struct of_device_id inx_of_match[] = { @@ -567,6 +552,3 @@ index 000000000000..6840449548e4 +MODULE_AUTHOR("Zhengqiao Xia "); +MODULE_DESCRIPTION("INNOLUX HIMAX8279D 1200x1920 video mode panel driver"); +MODULE_LICENSE("GPL v2"); --- -2.39.1 - diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/0002-arm64-dts-mt8183-Add-katsu-board.patch b/device/testing/linux-postmarketos-mediatek-mt8183/03-v2-1-4-arm64-dts-mt8183-Add-katsu-board.patch similarity index 57% rename from device/testing/linux-postmarketos-mediatek-mt8183/0002-arm64-dts-mt8183-Add-katsu-board.patch rename to device/testing/linux-postmarketos-mediatek-mt8183/03-v2-1-4-arm64-dts-mt8183-Add-katsu-board.patch index 3ee7d40ea..0f392784f 100644 --- a/device/testing/linux-postmarketos-mediatek-mt8183/0002-arm64-dts-mt8183-Add-katsu-board.patch +++ b/device/testing/linux-postmarketos-mediatek-mt8183/03-v2-1-4-arm64-dts-mt8183-Add-katsu-board.patch @@ -1,35 +1,8 @@ -From 61ddff1482c49b9720849647937a22e47b225c4f Mon Sep 17 00:00:00 2001 -From: Hsin-Yi Wang -Date: Mon, 13 Dec 2021 15:23:52 +0800 -Subject: [PATCH 2/5] arm64: dts: mt8183: Add katsu board +based on: https://patchwork.kernel.org/project/linux-mediatek/patch/20211213162856.235130-1-hsinyi@chromium.org/ -Katsu is known as ASUS Chromebook Detachable CZ1. - -Signed-off-by: Hsin-Yi Wang ---- - arch/arm64/boot/dts/mediatek/Makefile | 2 + - .../dts/mediatek/mt8183-kukui-katsu-sku32.dts | 38 +++++++++++++++++ - .../dts/mediatek/mt8183-kukui-katsu-sku38.dts | 42 +++++++++++++++++++ - 3 files changed, 82 insertions(+) - create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts - create mode 100644 arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts - -diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile -index 8c1e18032f9f..cb8d563d079f 100644 ---- a/arch/arm64/boot/dts/mediatek/Makefile -+++ b/arch/arm64/boot/dts/mediatek/Makefile -@@ -30,6 +30,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku0.dtb - dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku1.dtb - dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb - dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu-sku22.dtb -+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-katsu-sku32.dtb -+dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-katsu-sku38.dtb - dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku16.dtb - dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku272.dtb - dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku288.dtb diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts new file mode 100644 -index 000000000000..f923b8c3c49c +index 00000000000000..f923b8c3c49c36 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku32.dts @@ -0,0 +1,38 @@ @@ -73,7 +46,7 @@ index 000000000000..f923b8c3c49c +}; diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts new file mode 100644 -index 000000000000..1ab14096a279 +index 00000000000000..1ab14096a279c6 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-katsu-sku38.dts @@ -0,0 +1,42 @@ @@ -119,6 +92,3 @@ index 000000000000..1ab14096a279 +&sound { + compatible = "mediatek,mt8183_mt6358_ts3a227_rt1015p"; +}; --- -2.39.1 - diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/04-v2-2-4-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch b/device/testing/linux-postmarketos-mediatek-mt8183/04-v2-2-4-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch new file mode 100644 index 000000000..ff5a3d78a --- /dev/null +++ b/device/testing/linux-postmarketos-mediatek-mt8183/04-v2-2-4-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch @@ -0,0 +1,62 @@ +based on: https://patchwork.kernel.org/project/linux-mediatek/patch/20211213162856.235130-2-hsinyi@chromium.org/ + +diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts +new file mode 100644 +index 00000000000000..51bf2893ec03b1 +--- /dev/null ++++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku0.dts +@@ -0,0 +1,24 @@ ++// SPDX-License-Identifier: (GPL-2.0 OR MIT) ++/* ++ * Copyright 2021 Google LLC ++ */ ++ ++/dts-v1/; ++#include "mt8183-kukui-jacuzzi-fennel.dtsi" ++#include "mt8183-kukui-audio-da7219-rt1015p.dtsi" ++ ++/ { ++ model = "Google makomo sku0 board"; ++ compatible = "google,makomo-rev4-sku0", "google,makomo-rev5-sku0", ++ "google,makomo", "mediatek,mt8183"; ++}; ++ ++&qca_wifi { ++ qcom,ath10k-calibration-variant = "GO_FENNEL14"; ++}; ++ ++&mmc1_pins_uhs { ++ pins_clk { ++ drive-strength = ; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts +new file mode 100644 +index 00000000000000..c3b7e9bb0c8960 +--- /dev/null ++++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-makomo-sku1.dts +@@ -0,0 +1,24 @@ ++// SPDX-License-Identifier: (GPL-2.0 OR MIT) ++/* ++ * Copyright 2021 Google LLC ++ */ ++ ++/dts-v1/; ++#include "mt8183-kukui-jacuzzi-fennel.dtsi" ++#include "mt8183-kukui-audio-ts3a227e-rt1015p.dtsi" ++ ++/ { ++ model = "Google makomo sku1 board"; ++ compatible = "google,makomo-rev4-sku1", "google,makomo-rev5-sku1", ++ "google,makomo", "mediatek,mt8183"; ++}; ++ ++&qca_wifi { ++ qcom,ath10k-calibration-variant = "GO_FENNEL14"; ++}; ++ ++&mmc1_pins_uhs { ++ pins_clk { ++ drive-strength = ; ++ }; ++}; diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/0004-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-kats.patch b/device/testing/linux-postmarketos-mediatek-mt8183/05-v2-3-4-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-katsu.patch similarity index 56% rename from device/testing/linux-postmarketos-mediatek-mt8183/0004-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-kats.patch rename to device/testing/linux-postmarketos-mediatek-mt8183/05-v2-3-4-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-katsu.patch index c2c8a3bd6..c4b6bfce9 100644 --- a/device/testing/linux-postmarketos-mediatek-mt8183/0004-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-kats.patch +++ b/device/testing/linux-postmarketos-mediatek-mt8183/05-v2-3-4-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-katsu.patch @@ -1,20 +1,10 @@ -From 2201a9e503a183c00c46b68313583539f82c377a Mon Sep 17 00:00:00 2001 -From: Hsin-Yi Wang -Date: Mon, 13 Dec 2021 15:23:54 +0800 -Subject: [PATCH 4/5] dt-bindings: arm64: dts: mediatek: Add mt8183-kukui-katsu - -Katsu is known as ASUS Chromebook Detachable CZ1. - -Signed-off-by: Hsin-Yi Wang ---- - Documentation/devicetree/bindings/arm/mediatek.yaml | 7 +++++++ - 1 file changed, 7 insertions(+) +based on: https://patchwork.kernel.org/project/linux-mediatek/patch/20211213162856.235130-3-hsinyi@chromium.org/ diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml -index ab0593c77321..1fdb9a91635d 100644 +index 723810cffce2e7..75bb06d1802a08 100644 --- a/Documentation/devicetree/bindings/arm/mediatek.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek.yaml -@@ -187,6 +187,13 @@ properties: +@@ -175,6 +175,13 @@ properties: items: - const: google,kappa - const: mediatek,mt8183 @@ -28,6 +18,3 @@ index ab0593c77321..1fdb9a91635d 100644 - description: Google Kodama (Lenovo 10e Chromebook Tablet) items: - enum: --- -2.39.1 - diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/06-v2-4-4-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacuzzi-makomo.patch b/device/testing/linux-postmarketos-mediatek-mt8183/06-v2-4-4-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacuzzi-makomo.patch new file mode 100644 index 000000000..b9e9fb128 --- /dev/null +++ b/device/testing/linux-postmarketos-mediatek-mt8183/06-v2-4-4-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacuzzi-makomo.patch @@ -0,0 +1,25 @@ +based on: https://patchwork.kernel.org/project/linux-mediatek/patch/20211213162856.235130-4-hsinyi@chromium.org/ + +diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml +index 75bb06d1802a08..828f5f3fde4e20 100644 +--- a/Documentation/devicetree/bindings/arm/mediatek.yaml ++++ b/Documentation/devicetree/bindings/arm/mediatek.yaml +@@ -191,6 +191,18 @@ properties: + - google,kodama-sku32 + - const: google,kodama + - const: mediatek,mt8183 ++ - description: Google Makomo (Lenovo 100e Gen 2) ++ items: ++ - const: google,makomo-rev4-sku0 ++ - const: google,makomo-rev5-sku0 ++ - const: google,makomo ++ - const: mediatek,mt8183 ++ - description: Google Makomo (Lenovo 100e Gen 2) ++ items: ++ - const: google,makomo-rev4-sku1 ++ - const: google,makomo-rev5-sku1 ++ - const: google,makomo ++ - const: mediatek,mt8183 + - description: Google Willow (Acer Chromebook 311 C722/C722T) + items: + - enum: diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/07-1-2-arm64-dts-mt8183-Add-kukui-jacuzzi-cerise-board.patch b/device/testing/linux-postmarketos-mediatek-mt8183/07-1-2-arm64-dts-mt8183-Add-kukui-jacuzzi-cerise-board.patch new file mode 100644 index 000000000..b7778d25a --- /dev/null +++ b/device/testing/linux-postmarketos-mediatek-mt8183/07-1-2-arm64-dts-mt8183-Add-kukui-jacuzzi-cerise-board.patch @@ -0,0 +1,161 @@ +based on: https://patchwork.kernel.org/project/linux-mediatek/patch/20210604052312.1040707-1-hsinyi@chromium.org/ + +diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cerise-rev3.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cerise-rev3.dts +new file mode 100644 +index 0000000000000..2776d93561c96 +--- /dev/null ++++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cerise-rev3.dts +@@ -0,0 +1,24 @@ ++// SPDX-License-Identifier: (GPL-2.0 OR MIT) ++/* ++ * Copyright 2021 Google LLC ++ */ ++ ++/dts-v1/; ++#include "mt8183-kukui-jacuzzi-cerise.dtsi" ++ ++/ { ++ model = "Google cerise board"; ++ compatible = "google,cerise-rev3-sku0", "google,cerise", "mediatek,mt8183"; ++}; ++ ++&mt6358codec { ++ mediatek,dmic-mode = <1>; /* one-wire */ ++}; ++ ++&touchscreen { ++ status = "disabled"; ++}; ++ ++&qca_wifi { ++ qcom,ath10k-calibration-variant = "GO_CERISE"; ++}; +diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cerise.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cerise.dts +new file mode 100644 +index 0000000000000..418b5024d1a7c +--- /dev/null ++++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cerise.dts +@@ -0,0 +1,24 @@ ++// SPDX-License-Identifier: (GPL-2.0 OR MIT) ++/* ++ * Copyright 2021 Google LLC ++ */ ++ ++/dts-v1/; ++#include "mt8183-kukui-jacuzzi-cerise.dtsi" ++ ++/ { ++ model = "Google cerise board"; ++ compatible = "google,cerise-sku0", "google,cerise", "mediatek,mt8183"; ++}; ++ ++&mt6358codec { ++ mediatek,dmic-mode = <1>; /* one-wire */ ++}; ++ ++&touchscreen { ++ status = "disabled"; ++}; ++ ++&qca_wifi { ++ qcom,ath10k-calibration-variant = "GO_CERISE"; ++}; +diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cerise.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cerise.dtsi +new file mode 100644 +index 0000000000000..ec1561ac395ba +--- /dev/null ++++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-cerise.dtsi +@@ -0,0 +1,13 @@ ++// SPDX-License-Identifier: (GPL-2.0 OR MIT) ++/* ++ * Copyright 2021 Google LLC ++ */ ++ ++/dts-v1/; ++#include "mt8183-kukui-jacuzzi.dtsi" ++ ++&mmc1_pins_uhs { ++ pins_clk { ++ drive-strength = ; ++ }; ++}; +diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-stern-rev3.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-stern-rev3.dts +new file mode 100644 +index 0000000000000..05303c4ed7511 +--- /dev/null ++++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-stern-rev3.dts +@@ -0,0 +1,34 @@ ++// SPDX-License-Identifier: (GPL-2.0 OR MIT) ++/* ++ * Copyright 2021 Google LLC ++ */ ++ ++/dts-v1/; ++#include "mt8183-kukui-jacuzzi-cerise.dtsi" ++ ++/ { ++ model = "Google stern board"; ++ compatible = "google,cerise-rev3-sku1", "google,cerise", "mediatek,mt8183"; ++}; ++ ++&mt6358codec { ++ mediatek,dmic-mode = <0>; /* two-wire */ ++}; ++ ++&touchscreen { ++ status = "okay"; ++ ++ compatible = "hid-over-i2c"; ++ reg = <0x10>; ++ interrupt-parent = <&pio>; ++ interrupts = <155 IRQ_TYPE_LEVEL_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&touchscreen_pins>; ++ ++ post-power-on-delay-ms = <10>; ++ hid-descr-addr = <0x0001>; ++}; ++ ++&qca_wifi { ++ qcom,ath10k-calibration-variant = "GO_STERN"; ++}; +diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-stern.dts b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-stern.dts +new file mode 100644 +index 0000000000000..5be767bc873b8 +--- /dev/null ++++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui-jacuzzi-stern.dts +@@ -0,0 +1,34 @@ ++// SPDX-License-Identifier: (GPL-2.0 OR MIT) ++/* ++ * Copyright 2021 Google LLC ++ */ ++ ++/dts-v1/; ++#include "mt8183-kukui-jacuzzi-cerise.dtsi" ++ ++/ { ++ model = "Google stern board"; ++ compatible = "google,cerise-sku1", "google,cerise", "mediatek,mt8183"; ++}; ++ ++&mt6358codec { ++ mediatek,dmic-mode = <0>; /* two-wire */ ++}; ++ ++&touchscreen { ++ status = "okay"; ++ ++ compatible = "hid-over-i2c"; ++ reg = <0x10>; ++ interrupt-parent = <&pio>; ++ interrupts = <155 IRQ_TYPE_LEVEL_LOW>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&touchscreen_pins>; ++ ++ post-power-on-delay-ms = <10>; ++ hid-descr-addr = <0x0001>; ++}; ++ ++&qca_wifi { ++ qcom,ath10k-calibration-variant = "GO_STERN"; ++}; diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/08-2-2-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacuzzi-cerise.patch b/device/testing/linux-postmarketos-mediatek-mt8183/08-2-2-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacuzzi-cerise.patch new file mode 100644 index 000000000..63c1d4e4b --- /dev/null +++ b/device/testing/linux-postmarketos-mediatek-mt8183/08-2-2-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacuzzi-cerise.patch @@ -0,0 +1,22 @@ +based on: https://patchwork.kernel.org/project/linux-mediatek/patch/20210604052312.1040707-2-hsinyi@chromium.org/ + +diff --git a/Documentation/devicetree/bindings/arm/mediatek.yaml b/Documentation/devicetree/bindings/arm/mediatek.yaml +index 80a05f6fee85b..02c0653737648 100644 +--- a/Documentation/devicetree/bindings/arm/mediatek.yaml ++++ b/Documentation/devicetree/bindings/arm/mediatek.yaml +@@ -126,6 +126,15 @@ properties: + items: + - const: google,burnet + - const: mediatek,mt8183 ++ - description: Google Cerise (ASUS Chromebook CZ1) / Stern (ASUS Chromebook Flip CZ1) ++ items: ++ - enum: ++ - google,cerise-sku0 ++ - google,cerise-sku1 ++ - google,cerise-rev3-sku0 ++ - google,cerise-rev3-sku1 ++ - const: google,cerise ++ - const: mediatek,mt8183 + - description: Google Krane (Lenovo IdeaPad Duet, 10e,...) + items: + - enum: diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/09-add-new-dtbs-to-makefile.patch b/device/testing/linux-postmarketos-mediatek-mt8183/09-add-new-dtbs-to-makefile.patch new file mode 100644 index 000000000..1814d3ab4 --- /dev/null +++ b/device/testing/linux-postmarketos-mediatek-mt8183/09-add-new-dtbs-to-makefile.patch @@ -0,0 +1,30 @@ +diff --git a/arch/arm64/boot/dts/mediatek/Makefile b/arch/arm64/boot/dts/mediatek/Makefile +index af362a085a02..52d291eeff53 100644 +--- a/arch/arm64/boot/dts/mediatek/Makefile ++++ b/arch/arm64/boot/dts/mediatek/Makefile +@@ -16,6 +16,8 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-elm-hana-rev7.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8173-evb.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-evb.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-burnet.dtb ++dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-cerise.dtb ++dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-cerise-rev3.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-cozmo.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-damu.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-fennel-sku1.dtb +@@ -26,10 +28,16 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-fennel14-sku2.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-juniper-sku16.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kappa.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-kenzo.dtb ++dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-makomo-sku0.dtb ++dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-makomo-sku1.dtb ++dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-stern.dtb ++dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-stern-rev3.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku0.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-jacuzzi-willow-sku1.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kakadu-sku22.dtb ++dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-katsu-sku32.dtb ++dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-katsu-sku38.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku16.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku272.dtb + dtb-$(CONFIG_ARCH_MEDIATEK) += mt8183-kukui-kodama-sku288.dtb diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/APKBUILD b/device/testing/linux-postmarketos-mediatek-mt8183/APKBUILD index b7b5a3cbe..5c3b0425e 100644 --- a/device/testing/linux-postmarketos-mediatek-mt8183/APKBUILD +++ b/device/testing/linux-postmarketos-mediatek-mt8183/APKBUILD @@ -1,8 +1,9 @@ # Maintainer: BinaryCraft # Co-Maintainer: Jenneron +# Based on https://github.com/hexdump0815/linux-mainline-mediatek-mt81xx-kernel pkgname=linux-postmarketos-mediatek-mt8183 -pkgver=5.18 -pkgrel=4 +pkgver=6.1.28 +pkgrel=0 pkgdesc="Mainline kernel for mediatek mt8183" arch="aarch64" _flavor="${pkgname#linux-}" @@ -42,33 +43,23 @@ esac source=" https://cdn.kernel.org/pub/linux/kernel/v${_kernver%%.*}.x/linux-$_kernver.tar.xz - 0001-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driv.patch - 0002-arm64-dts-mt8183-Add-katsu-board.patch - 0003-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch - 0004-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-kats.patch - 0005-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacu.patch - mt8183-cadmium-improved-kukui.gpu.patch - mt8183-cadmium-kukui.move-gpu-opp-to-3.patch - mt8183-cadmium-improved-kukui.opp-multi-regulator.patch - mt8183-cadmium-kukui.panel-dts-rotation.patch - mt8183-cadmium-kukui.cci-1.patch - mt8183-cadmium-kukui.panel-dts-rotation_sku0.patch - mt8183-cadmium-kukui.cci-2.patch + 01-RESEND-v2-1-2-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driver.patch + 03-v2-1-4-arm64-dts-mt8183-Add-katsu-board.patch + 04-v2-2-4-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch + 05-v2-3-4-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-katsu.patch + 06-v2-4-4-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacuzzi-makomo.patch + 07-1-2-arm64-dts-mt8183-Add-kukui-jacuzzi-cerise-board.patch + 08-2-2-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacuzzi-cerise.patch + 09-add-new-dtbs-to-makefile.patch + mt8183-cadmium-kukui.enable-ite.patch + mt8183-fix-audio-module-loading.patch mt8183-fix-bluetooth.patch - mt8183-cadmium-kukui.cci-3.patch mt8183-kukui-disable-unsupported-thermal-zones.patch - mt8183-cadmium-kukui.cci-4.patch mt8183-kukui-jacuzzi-fennel14-rt1015p-sound.patch - mt8183-cadmium-kukui.cci-5.patch - mt8183-kukui-jacuzzi-fix-anx7625-01.patch - mt8183-cadmium-kukui.cci-6.patch - mt8183-kukui-jacuzzi-fix-anx7625-04.patch - mt8183-cadmium-kukui.cci-7.patch mt8183-kukui-jacuzzi-fix-display-resume.patch - mt8183-cadmium-kukui.cci-8.patch mt8183-kukui-jacuzzi-hack-dpms-resume.patch - mt8183-cadmium-kukui.gpu-vsram.patch - mt8183-panel-orientation.patch + mt81xx-fix-low-speed-usb-devices.patch + mt81xx-usb-02.patch config-$_flavor.aarch64 " builddir="$srcdir/linux-$_kernver" @@ -80,9 +71,8 @@ prepare() { build() { unset LDFLAGS - # V=1: workaround for pma#1990 make ARCH="$_carch" \ - KBUILD_BUILD_VERSION="$((pkgrel + 1 ))-$_flavor" V=1 + KBUILD_BUILD_VERSION="$((pkgrel + 1 ))-$_flavor" } package() { @@ -102,33 +92,23 @@ package() { sha512sums=" -dbbc9d1395898a498fa4947fceda1781344fa5d360240f753810daa4fa88e519833e2186c4e582a8f1836e6413e9e85f6563c7770523b704e8702d67622f98b5 linux-5.18.tar.xz -3c2b433fc1e3514f4d32e2ddd811f5536958857da55ab22f98278b91733b8b1a06945665df0deadaf57a0458d248dc659e1dcdf5a196ce49d7a3c704cb313878 0001-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driv.patch -c0b38b2d4b827cf34b8474d78f588528e1aa665ed091301c0bd970ae10aba642551d7eff9fbea4b7accf0906b41c00f4e1108e1c7573041fea4f2fcd13045c65 0002-arm64-dts-mt8183-Add-katsu-board.patch -385fe4f278f16af63ad416c195366974d0fad6ca3eaa63e4ccf052175f183ec0da263d4b5964273420bd4e1e5d1a0761f170f38e7c941ee617a8ccab84d6cf21 0003-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch -2748f1f3ec84de63a2d4a7a254cefdd88ccd52d70193d268f55df8a0b51b4d288ffa3153e16d15a27d60eaa4552132090901633b49d0b062f8a3b11447efe8f9 0004-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-kats.patch -912519749bcdac4ee13178078e3bcef5a3a64d9527a368dd39e387224c21c01f3d54586728585f434147cbc507e5906c41e5f3597f2a975dca7468b0e7e96b90 0005-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacu.patch -efbb379c2c0e14116a4a941993fb4df243dde9d7477177e903b283356ebaa57ee78a685632effbb43208f25a5e490779385a36dcb1b19e96eadb46547b2c85db mt8183-cadmium-improved-kukui.gpu.patch -e79b5b652bfb44e7fc293d08c3b5355a8f6456389c05c29167cfaf5bf45cf19555f2b2e50aca8e93e8876f64ed09d63e0483f5b8c492a47d9d2e3e72413c4e45 mt8183-cadmium-kukui.move-gpu-opp-to-3.patch -0252db7a1e3b6b041b351aaa17323e45e286b41b369945be483b4ce2be2fa6600124d12b8871e3bea50ca07949e12e90e9cc7c8a3a37ad19cd02677eb7bebd89 mt8183-cadmium-improved-kukui.opp-multi-regulator.patch -ca3584808a2b27854d50d2c8cd3ba3306334302803e5684b19b338473011f7aa210f326232e2dbd364b2a9c5ad68db0b8443fe9c0b141cd8b596ba36db336595 mt8183-cadmium-kukui.panel-dts-rotation.patch -34f72f57e7b1a5b4800c514a4443e2815dee6d14566990a75a9389aa1bec2f42c3dd7e4992ea4733d57e0515756f1f79d3298fab1ac66a9628dc3f8236dedf07 mt8183-cadmium-kukui.cci-1.patch -de3968b5a4ab7e9b60a81ebc9845849a3b2fd23cfea8ca91d953322f3d0f64c978361217fe8327e16622fcc4f05f979b21c798b55eb1b6fe22cee531a5321a16 mt8183-cadmium-kukui.panel-dts-rotation_sku0.patch -558611e9bbe11c99c4b70cb4d4882bc9a7b796575a553d3659953146f8c45c3c72b8e9cccd2606cacf17ff6501388fde01488e8eeae0706da51e74a356010474 mt8183-cadmium-kukui.cci-2.patch +7215e62df10847e8bce432880e0756e8a5f56eb8b8abb54f9e1eb8871ce7bd56d765be0f9a40a8dae4d135b2f9a0dab7f6b3d2691d73b0c47f05811194dee8bd linux-6.1.28.tar.xz +06e901fd36d4c3a8b51673ed6682a51229856259a4a0c83e65ed10a234c24a4a8828e9f6ed3101713470a25db10af9d5bab29c480b7f5c87af6bd7e81d8c0fe7 01-RESEND-v2-1-2-drm-panel-Add-inx-Himax8279d-MIPI-DSI-LCD-panel-driver.patch +4c7a89fd1e3e7b4589fe3c2addc7c4963cec7ebabf49413b1d6db92386b4b2ba7bf25c961aaa53fc344a4684871b4132806aa4b8c1a63e091651e548bab750ef 03-v2-1-4-arm64-dts-mt8183-Add-katsu-board.patch +a0742fa788d13c836d9dc8827c55a14e804ce77234627f2689fd511b14e5fba17b00f5a8cebd9ae4fa4c644d87cc98d4f18eba385ec4f57bb6fe07d3aff057fd 04-v2-2-4-arm64-dts-mt8183-Add-kukui-jacuzzi-makomo-board.patch +7d29cefe1e338868c6f31516dcff73ef1fdb5e50353ffd0874018bee1c9c116dea65b0bea6e9a5d31f416958ff025a685234e684557705f4675ad4710709e197 05-v2-3-4-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-katsu.patch +53279b9019c4aa94488405a823c501734f536acc6f68c7d89f3f76fba04cde897c229ab59d22e97acd68f8ab9fc75ad39bb74fef777a1dbbdf1788bf19ae52c4 06-v2-4-4-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacuzzi-makomo.patch +20be60004e19068e652010f18353f93a289b109a4b13cfa85184401a13f02417aea644e29accf5c21d6cf511044f2024e3872b211512d15e301ca34613ee0077 07-1-2-arm64-dts-mt8183-Add-kukui-jacuzzi-cerise-board.patch +27e1e536f446dc278ce8a9dd9bd64e5ec6678589b2ca276be7bab5e0a80f119052e9109e6834357a57bbffe30fda48e03d24531f53ad0225f42ad075142f3a37 08-2-2-dt-bindings-arm64-dts-mediatek-Add-mt8183-kukui-jacuzzi-cerise.patch +604fb37887786a2919e93648fb3fd002ce4b948b35a915931e3f2bf3f3a1451fad4f6e042cd0fd9aa7f11bba5864f1b95c9be9ab6aed57a63652c49a7a145a3e 09-add-new-dtbs-to-makefile.patch +4216543acf0ffea0c91b2b7c112cd333be838414f2902cea9f07f5811b96ab5da0e09954086966359316fe0632ac0af65add154b9df0aa11d05962429954e362 mt8183-cadmium-kukui.enable-ite.patch +b9a9e2f620d229ca8acf2df764d6406a304fd51f435929f78c4dfd7f52cd6f1f298f031bb6d7bb7fc8ea360dd8bbd4584bb298f9351100dfb20707de50076244 mt8183-fix-audio-module-loading.patch d74da1231181835bec82015da1b3f5b08a1fe9c3c35dd712e285891094d94d9427ceac75d32f74be3a635e17d93ad82b37adf97db8176efc91aed17535023fc2 mt8183-fix-bluetooth.patch -0dab1f6e377de6f5593fe26078d8aaa65017fef405f99f33c172bc73f252138d0db394bec93bed4650aee74f57186f81b6c78fc408b345b47d80d3ea6acf95aa mt8183-cadmium-kukui.cci-3.patch a5e99ea30bbdde3a5f0f9745306c9f58876a60489c3cbeacd783cf7e47a013d47c9fb77e4a9dbbd34ec6307d40e64a3623e3cece2f254f734979987f5a22e700 mt8183-kukui-disable-unsupported-thermal-zones.patch -000e2f5a84a2fd436f100b4325812cadaba2c9fb820ce26ca26961fb16e2941b13ca14c272d8575d05f1e4541a5d324f78a17dc421b54a551ea73067dd7044a4 mt8183-cadmium-kukui.cci-4.patch 9b8707de42635734031495da055c5860addeb656051540f1a14404b10aa8b501168d8b0e274b37bce989db3bc050e9beef722189556f6d782b92cc907731488d mt8183-kukui-jacuzzi-fennel14-rt1015p-sound.patch -538672cfd0401b1da7751b101b02639dea9f27e81f7f537b2f4b7b05d13878f61213a4933e74f8d3102fa93f13eca0faad19699d79568552a1b54969ac66b243 mt8183-cadmium-kukui.cci-5.patch -7e73fd6ac2efa90f64dce5f631475b726c68a059805ab9ceba216eaae672db07f18c5f8e06a32f78d25153c5e4ce6a3dafc0d124c0994d3cae61f074f8e84f53 mt8183-kukui-jacuzzi-fix-anx7625-01.patch -ba8eeb470e55a279d0cb42608443c99056da7bfbf4b1ca022a6449703cea4be5640e71edf110eaae9839d0fda1a6ca242e4a152cb8014c6451b18968a1dbcf07 mt8183-cadmium-kukui.cci-6.patch -88560c512a328a7d142f62eb6b74a23d01741667bd731fce6b96a968595d641dcfd8aeb3b26c797d333a2eaeec218c033dc710eace4080d8324b99ff55dab47f mt8183-kukui-jacuzzi-fix-anx7625-04.patch -8e2bee598a6f7110d1e198e17ee5b8137f4029abdb651debb8a3e6204bb389485720b532fb07ab6075c432a68ffaacfd17f9c0b6c1bf9265e209dafb8a8d4982 mt8183-cadmium-kukui.cci-7.patch -cd629355bb9b172a7e68d7334dc2a97f040f8d5757c835e064a8706e9cf5a31b91023ca6e0ef23e56a9965e19ceca61332a5fcf2a0b1cce420a90bbbc0425531 mt8183-kukui-jacuzzi-fix-display-resume.patch -f0e78266b8d5db67476ca47fc115830d4296182486d88744d714b05bed35c4976b82a59a7aa4fb36144adb38980b8633e89830411ed073a2461dee63659b8652 mt8183-cadmium-kukui.cci-8.patch +519b6468bca78d0e315c826592ae40dddca9daeba7c2b451a20ca996494cca45721833b9138fefbb543f53e0b9257c78ec4fec54de2a160aa8df730daf3ac996 mt8183-kukui-jacuzzi-fix-display-resume.patch e9a128a8ddd98c6c8957ba45186afa2ea8ebeac83d4f2db3ff9ee8a5dd8027af90868c334a7b456bfe7dce793517f27ad63efa220bc933e3407f6362da6d7b2a mt8183-kukui-jacuzzi-hack-dpms-resume.patch -8ab89b0845d3aaee9ae5d244e7880601f21b85b159677464960c1e08cf20038db2a8ad1b57c9ed99d817735ad450d0e4d4fe9051cb1808dd08a00e2f68af5028 mt8183-cadmium-kukui.gpu-vsram.patch -863966b986c3680d013ba81e02e2d0a5f092d95ef6d3b60cb6991ca7acc3c4ce5323e528b3190b95e594f72c1b0ae26f7b8db20e118557850161777a90e2b45f mt8183-panel-orientation.patch -5dd10e26aa90b9610a3ac9fa643aed72b727860cfcc949e087bbd1a963256aeb51b8d9785f778c7a766df8d421442c767da9e9b7da0be67a4dc02ff98de7dd8c config-postmarketos-mediatek-mt8183.aarch64 +ca1eec5277c3cd8afc2e6079fd4ccfe2f3937cdc8296cafac1d61bb14ca7acdde6e97d561f5a80a919b01fbc06ec991767d3ea1ff4bc34c1d9033993f2689130 mt81xx-fix-low-speed-usb-devices.patch +5db854d3cb1bad58e93eba86014deb1e2cf3b79a1a74561e22832dccf5cd79f6f0c42cc6210926e0dfc4ca9c939b666018cb2ce5612eb49ad84a8b285dc63e07 mt81xx-usb-02.patch +d7ed719bcb8edd394d268a8a9989d8d0c37443ca79f48dc8a1d829cd22925ed1a19f3240089a998d22fa407e92984e66b33facce47463e0475a5d407c747139d config-postmarketos-mediatek-mt8183.aarch64 " diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/config-postmarketos-mediatek-mt8183.aarch64 b/device/testing/linux-postmarketos-mediatek-mt8183/config-postmarketos-mediatek-mt8183.aarch64 index 30946a9ae..264fb5f09 100644 --- a/device/testing/linux-postmarketos-mediatek-mt8183/config-postmarketos-mediatek-mt8183.aarch64 +++ b/device/testing/linux-postmarketos-mediatek-mt8183/config-postmarketos-mediatek-mt8183.aarch64 @@ -1,20 +1,18 @@ # # Automatically generated file; DO NOT EDIT. -# Linux/arm64 5.18.0 Kernel Configuration +# Linux/arm64 6.1.28 Kernel Configuration # -CONFIG_CC_VERSION_TEXT="gcc (Alpine 12.2.1_git20220924-r8) 12.2.1 20220924" +CONFIG_CC_VERSION_TEXT="aarch64-alpine-linux-musl-gcc (Alpine 13.1.1_git20230513) 13.1.1 20230513" CONFIG_CC_IS_GCC=y -CONFIG_GCC_VERSION=120201 +CONFIG_GCC_VERSION=130101 CONFIG_CLANG_VERSION=0 CONFIG_AS_IS_GNU=y CONFIG_AS_VERSION=24000 CONFIG_LD_IS_BFD=y CONFIG_LD_VERSION=24000 CONFIG_LLD_VERSION=0 -CONFIG_CC_CAN_LINK=y -CONFIG_CC_CAN_LINK_STATIC=y -CONFIG_CC_HAS_ASM_GOTO=y CONFIG_CC_HAS_ASM_GOTO_OUTPUT=y +CONFIG_CC_HAS_ASM_GOTO_TIED_OUTPUT=y CONFIG_CC_HAS_ASM_INLINE=y CONFIG_CC_HAS_NO_PROFILE_FN_ATTR=y CONFIG_PAHOLE_VERSION=0 @@ -33,9 +31,9 @@ CONFIG_LOCALVERSION="-mt8183" CONFIG_BUILD_SALT="" CONFIG_DEFAULT_INIT="" CONFIG_DEFAULT_HOSTNAME="(none)" -CONFIG_SWAP=y CONFIG_SYSVIPC=y CONFIG_SYSVIPC_SYSCTL=y +CONFIG_SYSVIPC_COMPAT=y CONFIG_POSIX_MQUEUE=y CONFIG_POSIX_MQUEUE_SYSCTL=y # CONFIG_WATCH_QUEUE is not set @@ -72,6 +70,8 @@ CONFIG_ARCH_HAS_TICK_BROADCAST=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_HAVE_POSIX_CPU_TIMERS_TASK_WORK=y CONFIG_POSIX_CPU_TIMERS_TASK_WORK=y +CONFIG_CONTEXT_TRACKING=y +CONFIG_CONTEXT_TRACKING_IDLE=y # # Timers subsystem @@ -161,13 +161,15 @@ CONFIG_GENERIC_SCHED_CLOCK=y CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y CONFIG_CC_HAS_INT128=y CONFIG_CC_IMPLICIT_FALLTHROUGH="-Wimplicit-fallthrough=5" +CONFIG_GCC11_NO_ARRAY_BOUNDS=y +CONFIG_CC_NO_ARRAY_BOUNDS=y CONFIG_ARCH_SUPPORTS_INT128=y CONFIG_NUMA_BALANCING=y CONFIG_NUMA_BALANCING_DEFAULT_ENABLED=y CONFIG_CGROUPS=y CONFIG_PAGE_COUNTER=y +# CONFIG_CGROUP_FAVOR_DYNMODS is not set CONFIG_MEMCG=y -CONFIG_MEMCG_SWAP=y CONFIG_MEMCG_KMEM=y CONFIG_BLK_CGROUP=y CONFIG_CGROUP_WRITEBACK=y @@ -209,6 +211,7 @@ CONFIG_RD_LZO=y CONFIG_RD_LZ4=y CONFIG_RD_ZSTD=y # CONFIG_BOOT_CONFIG is not set +CONFIG_INITRAMFS_PRESERVE_MTIME=y CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE=y # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set CONFIG_LD_ORPHAN_WARN=y @@ -239,7 +242,6 @@ CONFIG_MEMBARRIER=y CONFIG_KALLSYMS=y CONFIG_KALLSYMS_ALL=y CONFIG_KALLSYMS_BASE_RELATIVE=y -# CONFIG_USERFAULTFD is not set CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y CONFIG_KCMP=y CONFIG_RSEQ=y @@ -254,16 +256,6 @@ CONFIG_PERF_EVENTS=y # CONFIG_DEBUG_PERF_USE_VMALLOC is not set # end of Kernel Performance Events And Counters -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_SLUB_DEBUG=y -# CONFIG_COMPAT_BRK is not set -# CONFIG_SLAB is not set -CONFIG_SLUB=y -CONFIG_SLAB_MERGE_DEFAULT=y -# CONFIG_SLAB_FREELIST_RANDOM is not set -# CONFIG_SLAB_FREELIST_HARDENED is not set -# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set -CONFIG_SLUB_CPU_PARTIAL=y CONFIG_SYSTEM_DATA_VERIFICATION=y CONFIG_PROFILING=y # end of General setup @@ -302,28 +294,24 @@ CONFIG_ARCH_PROC_KCORE_TEXT=y # CONFIG_ARCH_SUNXI is not set # CONFIG_ARCH_ALPINE is not set # CONFIG_ARCH_APPLE is not set -# CONFIG_ARCH_BCM2835 is not set -# CONFIG_ARCH_BCM4908 is not set -# CONFIG_ARCH_BCM_IPROC is not set +# CONFIG_ARCH_BCM is not set # CONFIG_ARCH_BERLIN is not set # CONFIG_ARCH_BITMAIN is not set -# CONFIG_ARCH_BRCMSTB is not set # CONFIG_ARCH_EXYNOS is not set # CONFIG_ARCH_SPARX5 is not set # CONFIG_ARCH_K3 is not set -# CONFIG_ARCH_LAYERSCAPE is not set # CONFIG_ARCH_LG1K is not set # CONFIG_ARCH_HISI is not set # CONFIG_ARCH_KEEMBAY is not set CONFIG_ARCH_MEDIATEK=y # CONFIG_ARCH_MESON is not set # CONFIG_ARCH_MVEBU is not set -# CONFIG_ARCH_MXC is not set +# CONFIG_ARCH_NXP is not set +# CONFIG_ARCH_NPCM is not set # CONFIG_ARCH_QCOM is not set # CONFIG_ARCH_REALTEK is not set # CONFIG_ARCH_RENESAS is not set CONFIG_ARCH_ROCKCHIP=y -# CONFIG_ARCH_S32 is not set # CONFIG_ARCH_SEATTLE is not set # CONFIG_ARCH_INTEL_SOCFPGA is not set # CONFIG_ARCH_SYNQUACER is not set @@ -352,6 +340,7 @@ CONFIG_ARM64_ERRATUM_824069=y CONFIG_ARM64_ERRATUM_819472=y CONFIG_ARM64_ERRATUM_832075=y CONFIG_ARM64_ERRATUM_834220=y +CONFIG_ARM64_ERRATUM_1742098=y CONFIG_ARM64_ERRATUM_845719=y CONFIG_ARM64_ERRATUM_843419=y CONFIG_ARM64_LD_HAS_FIX_ERRATUM_843419=y @@ -362,15 +351,19 @@ CONFIG_ARM64_ERRATUM_1165522=y CONFIG_ARM64_ERRATUM_1319367=y CONFIG_ARM64_ERRATUM_1530923=y CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y +CONFIG_ARM64_ERRATUM_2441007=y CONFIG_ARM64_ERRATUM_1286807=y CONFIG_ARM64_ERRATUM_1463225=y CONFIG_ARM64_ERRATUM_1542419=y CONFIG_ARM64_ERRATUM_1508412=y CONFIG_ARM64_ERRATUM_2051678=y CONFIG_ARM64_ERRATUM_2077057=y +CONFIG_ARM64_ERRATUM_2658417=y CONFIG_ARM64_WORKAROUND_TSB_FLUSH_FAILURE=y CONFIG_ARM64_ERRATUM_2054223=y CONFIG_ARM64_ERRATUM_2067961=y +CONFIG_ARM64_ERRATUM_2441009=y +CONFIG_ARM64_ERRATUM_2457168=y CONFIG_CAVIUM_ERRATUM_22375=y CONFIG_CAVIUM_ERRATUM_23144=y CONFIG_CAVIUM_ERRATUM_23154=y @@ -422,7 +415,7 @@ CONFIG_CRASH_DUMP=y CONFIG_TRANS_TABLE=y CONFIG_XEN_DOM0=y CONFIG_XEN=y -CONFIG_FORCE_MAX_ZONEORDER=11 +CONFIG_ARCH_FORCE_MAX_ORDER=11 CONFIG_UNMAP_KERNEL_AT_EL0=y CONFIG_MITIGATE_SPECTRE_BRANCH_HISTORY=y CONFIG_RODATA_FULL_DEFAULT_ENABLED=y @@ -430,6 +423,7 @@ CONFIG_RODATA_FULL_DEFAULT_ENABLED=y CONFIG_ARM64_TAGGED_ADDR_ABI=y CONFIG_COMPAT=y CONFIG_KUSER_HELPERS=y +# CONFIG_COMPAT_ALIGNMENT_FIXUPS is not set # CONFIG_ARMV8_DEPRECATED is not set # @@ -477,10 +471,8 @@ CONFIG_ARM64_TLB_RANGE=y # CONFIG_AS_HAS_ARMV8_5=y CONFIG_ARM64_BTI=y -CONFIG_ARM64_BTI_KERNEL=y CONFIG_CC_HAS_BRANCH_PROT_PAC_RET_BTI=y CONFIG_ARM64_E0PD=y -# CONFIG_ARCH_RANDOM is not set CONFIG_ARM64_AS_HAS_MTE=y CONFIG_ARM64_MTE=y # end of ARMv8.5 architectural features @@ -492,6 +484,7 @@ CONFIG_ARM64_EPAN=y # end of ARMv8.7 architectural features CONFIG_ARM64_SVE=y +CONFIG_ARM64_SME=y CONFIG_ARM64_MODULE_PLTS=y # CONFIG_ARM64_PSEUDO_NMI is not set CONFIG_RELOCATABLE=y @@ -499,6 +492,7 @@ CONFIG_RANDOMIZE_BASE=y CONFIG_RANDOMIZE_MODULE_REGION_FULL=y CONFIG_CC_HAVE_STACKPROTECTOR_SYSREG=y CONFIG_STACKPROTECTOR_PER_TASK=y +CONFIG_ARCH_NR_GPIO=0 # end of Kernel Features # @@ -510,8 +504,6 @@ CONFIG_EFI=y CONFIG_DMI=y # end of Boot options -CONFIG_SYSVIPC_COMPAT=y - # # Power management options # @@ -524,6 +516,7 @@ CONFIG_PM_STD_PARTITION="" CONFIG_PM_SLEEP=y CONFIG_PM_SLEEP_SMP=y # CONFIG_PM_AUTOSLEEP is not set +# CONFIG_PM_USERSPACE_AUTOSLEEP is not set # CONFIG_PM_WAKELOCKS is not set CONFIG_PM=y # CONFIG_PM_DEBUG is not set @@ -557,7 +550,6 @@ CONFIG_DT_IDLE_GENPD=y # # ARM CPU Idle Drivers # -CONFIG_ARM_CPUIDLE=y CONFIG_ARM_PSCI_CPUIDLE=y CONFIG_ARM_PSCI_CPUIDLE_DOMAIN=y # end of ARM CPU Idle Drivers @@ -615,42 +607,25 @@ CONFIG_KVM_XFER_TO_GUEST_WORK=y CONFIG_VIRTUALIZATION=y CONFIG_KVM=y # CONFIG_NVHE_EL2_DEBUG is not set -CONFIG_ARM64_CRYPTO=y -CONFIG_CRYPTO_SHA256_ARM64=y -CONFIG_CRYPTO_SHA512_ARM64=m -CONFIG_CRYPTO_SHA1_ARM64_CE=y -CONFIG_CRYPTO_SHA2_ARM64_CE=y -CONFIG_CRYPTO_SHA512_ARM64_CE=m -CONFIG_CRYPTO_SHA3_ARM64=m -CONFIG_CRYPTO_SM3_ARM64_CE=m -# CONFIG_CRYPTO_SM4_ARM64_CE is not set -CONFIG_CRYPTO_GHASH_ARM64_CE=y -CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y -# CONFIG_CRYPTO_AES_ARM64 is not set -CONFIG_CRYPTO_AES_ARM64_CE=y -CONFIG_CRYPTO_AES_ARM64_CE_CCM=y -CONFIG_CRYPTO_AES_ARM64_CE_BLK=y -CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y -CONFIG_CRYPTO_CHACHA20_NEON=y -CONFIG_CRYPTO_POLY1305_NEON=m -CONFIG_CRYPTO_NHPOLY1305_NEON=y -CONFIG_CRYPTO_AES_ARM64_BS=y # # General architecture-dependent options # CONFIG_CRASH_CORE=y CONFIG_KEXEC_CORE=y +CONFIG_ARCH_HAS_SUBPAGE_FAULTS=y # CONFIG_KPROBES is not set CONFIG_JUMP_LABEL=y # CONFIG_STATIC_KEYS_SELFTEST is not set CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y +CONFIG_HAVE_IOREMAP_PROT=y CONFIG_HAVE_KPROBES=y CONFIG_HAVE_KRETPROBES=y CONFIG_ARCH_CORRECT_STACKTRACE_ON_KRETPROBE=y CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y CONFIG_HAVE_NMI=y CONFIG_TRACE_IRQFLAGS_SUPPORT=y +CONFIG_TRACE_IRQFLAGS_NMI_SUPPORT=y CONFIG_HAVE_ARCH_TRACEHOOK=y CONFIG_HAVE_DMA_CONTIGUOUS=y CONFIG_GENERIC_SMP_IDLE_THREAD=y @@ -692,16 +667,19 @@ CONFIG_ARCH_SUPPORTS_LTO_CLANG=y CONFIG_ARCH_SUPPORTS_LTO_CLANG_THIN=y CONFIG_LTO_NONE=y CONFIG_ARCH_SUPPORTS_CFI_CLANG=y -CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_CONTEXT_TRACKING_USER=y CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y CONFIG_HAVE_MOVE_PUD=y CONFIG_HAVE_MOVE_PMD=y CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y CONFIG_HAVE_ARCH_HUGE_VMAP=y +CONFIG_HAVE_ARCH_HUGE_VMALLOC=y CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y CONFIG_HAVE_MOD_ARCH_SPECIFIC=y CONFIG_MODULES_USE_ELF_RELA=y +CONFIG_HAVE_SOFTIRQ_ON_OWN_STACK=y +CONFIG_SOFTIRQ_ON_OWN_STACK=y CONFIG_ARCH_HAS_ELF_RANDOMIZE=y CONFIG_HAVE_ARCH_MMAP_RND_BITS=y CONFIG_ARCH_MMAP_RND_BITS=18 @@ -732,6 +710,8 @@ CONFIG_HAVE_PREEMPT_DYNAMIC=y CONFIG_HAVE_PREEMPT_DYNAMIC_KEY=y CONFIG_ARCH_WANT_LD_ORPHAN_WARN=y CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y +CONFIG_ARCH_SUPPORTS_PAGE_TABLE_CHECK=y +CONFIG_ARCH_HAVE_TRACE_MMIO_ACCESS=y # # GCOV-based kernel profiling @@ -743,7 +723,6 @@ CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y CONFIG_HAVE_GCC_PLUGINS=y CONFIG_GCC_PLUGINS=y # CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set -# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set # end of General architecture-dependent options CONFIG_RT_MUTEXES=y @@ -752,6 +731,7 @@ CONFIG_MODULES=y # CONFIG_MODULE_FORCE_LOAD is not set CONFIG_MODULE_UNLOAD=y # CONFIG_MODULE_FORCE_UNLOAD is not set +# CONFIG_MODULE_UNLOAD_TAINT_TRACKING is not set # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set # CONFIG_MODULE_SIG is not set @@ -837,6 +817,40 @@ CONFIG_COREDUMP=y # # Memory Management options # +CONFIG_ZPOOL=y +CONFIG_SWAP=y +CONFIG_ZSWAP=y +# CONFIG_ZSWAP_DEFAULT_ON is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set +CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO=y +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set +# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD is not set +CONFIG_ZSWAP_COMPRESSOR_DEFAULT="lzo" +CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y +# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set +# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set +CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" +CONFIG_ZBUD=y +CONFIG_Z3FOLD=y +CONFIG_ZSMALLOC=y +# CONFIG_ZSMALLOC_STAT is not set + +# +# SLAB allocator options +# +# CONFIG_SLAB is not set +CONFIG_SLUB=y +CONFIG_SLAB_MERGE_DEFAULT=y +# CONFIG_SLAB_FREELIST_RANDOM is not set +# CONFIG_SLAB_FREELIST_HARDENED is not set +# CONFIG_SLUB_STATS is not set +CONFIG_SLUB_CPU_PARTIAL=y +# end of SLAB allocator options + +# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set +# CONFIG_COMPAT_BRK is not set CONFIG_SPARSEMEM=y CONFIG_SPARSEMEM_EXTREME=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y @@ -846,13 +860,14 @@ CONFIG_ARCH_KEEP_MEMBLOCK=y CONFIG_MEMORY_ISOLATION=y CONFIG_EXCLUSIVE_SYSTEM_RAM=y CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -# CONFIG_MEMORY_HOTPLUG is not set CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y +# CONFIG_MEMORY_HOTPLUG is not set CONFIG_SPLIT_PTLOCK_CPUS=4 CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y CONFIG_MEMORY_BALLOON=y CONFIG_BALLOON_COMPACTION=y CONFIG_COMPACTION=y +CONFIG_COMPACT_UNEVICTABLE_DEFAULT=1 CONFIG_PAGE_REPORTING=y CONFIG_MIGRATION=y CONFIG_ARCH_ENABLE_HUGEPAGE_MIGRATION=y @@ -865,33 +880,18 @@ CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y CONFIG_MEMORY_FAILURE=y # CONFIG_HWPOISON_INJECT is not set +CONFIG_ARCH_WANTS_THP_SWAP=y CONFIG_TRANSPARENT_HUGEPAGE=y CONFIG_TRANSPARENT_HUGEPAGE_ALWAYS=y # CONFIG_TRANSPARENT_HUGEPAGE_MADVISE is not set +CONFIG_THP_SWAP=y +# CONFIG_READ_ONLY_THP_FOR_FS is not set CONFIG_NEED_PER_CPU_EMBED_FIRST_CHUNK=y CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_USE_PERCPU_NUMA_NODE_ID=y CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_FRONTSWAP=y # CONFIG_CMA is not set -CONFIG_ZSWAP=y -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_DEFLATE is not set -CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZO=y -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_842 is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4 is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_LZ4HC is not set -# CONFIG_ZSWAP_COMPRESSOR_DEFAULT_ZSTD is not set -CONFIG_ZSWAP_COMPRESSOR_DEFAULT="lzo" -CONFIG_ZSWAP_ZPOOL_DEFAULT_ZBUD=y -# CONFIG_ZSWAP_ZPOOL_DEFAULT_Z3FOLD is not set -# CONFIG_ZSWAP_ZPOOL_DEFAULT_ZSMALLOC is not set -CONFIG_ZSWAP_ZPOOL_DEFAULT="zbud" -# CONFIG_ZSWAP_DEFAULT_ON is not set -CONFIG_ZPOOL=y -CONFIG_ZBUD=y -CONFIG_Z3FOLD=y -CONFIG_ZSMALLOC=y -# CONFIG_ZSMALLOC_STAT is not set CONFIG_GENERIC_EARLY_IOREMAP=y # CONFIG_DEFERRED_STRUCT_PAGE_INIT is not set # CONFIG_IDLE_PAGE_TRACKING is not set @@ -901,12 +901,14 @@ CONFIG_ARCH_HAS_PTE_DEVMAP=y CONFIG_ZONE_DMA=y CONFIG_ZONE_DMA32=y CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y +CONFIG_VM_EVENT_COUNTERS=y # CONFIG_PERCPU_STATS is not set # CONFIG_GUP_TEST is not set -# CONFIG_READ_ONLY_THP_FOR_FS is not set CONFIG_ARCH_HAS_PTE_SPECIAL=y CONFIG_SECRETMEM=y # CONFIG_ANON_VMA_NAME is not set +# CONFIG_USERFAULTFD is not set +# CONFIG_LRU_GEN is not set # # Data Access Monitoring @@ -966,6 +968,7 @@ CONFIG_INET_ESP=m # CONFIG_INET_ESP_OFFLOAD is not set # CONFIG_INET_ESPINTCP is not set # CONFIG_INET_IPCOMP is not set +CONFIG_INET_TABLE_PERTURB_ORDER=16 CONFIG_INET_TUNNEL=m CONFIG_INET_DIAG=y CONFIG_INET_TCP_DIAG=y @@ -1081,6 +1084,7 @@ CONFIG_NFT_FIB_NETDEV=m CONFIG_NFT_REJECT_NETDEV=m CONFIG_NF_FLOW_TABLE_INET=m CONFIG_NF_FLOW_TABLE=m +# CONFIG_NF_FLOW_TABLE_PROCFS is not set CONFIG_NETFILTER_XTABLES=m CONFIG_NETFILTER_XTABLES_COMPAT=y @@ -1325,6 +1329,7 @@ CONFIG_NET_DSA_TAG_BRCM_PREPEND=m # CONFIG_NET_DSA_TAG_QCA is not set # CONFIG_NET_DSA_TAG_RTL4_A is not set # CONFIG_NET_DSA_TAG_RTL8_4 is not set +# CONFIG_NET_DSA_TAG_RZN1_A5PSW is not set # CONFIG_NET_DSA_TAG_LAN9303 is not set # CONFIG_NET_DSA_TAG_SJA1105 is not set # CONFIG_NET_DSA_TAG_TRAILER is not set @@ -1332,7 +1337,6 @@ CONFIG_NET_DSA_TAG_BRCM_PREPEND=m CONFIG_VLAN_8021Q=m CONFIG_VLAN_8021Q_GVRP=y CONFIG_VLAN_8021Q_MVRP=y -# CONFIG_DECNET is not set CONFIG_LLC=m # CONFIG_LLC2 is not set # CONFIG_ATALK is not set @@ -1383,7 +1387,6 @@ CONFIG_NET_SCH_INGRESS=m # CONFIG_NET_CLS=y CONFIG_NET_CLS_BASIC=m -# CONFIG_NET_CLS_TCINDEX is not set # CONFIG_NET_CLS_ROUTE4 is not set # CONFIG_NET_CLS_FW is not set # CONFIG_NET_CLS_U32 is not set @@ -1460,53 +1463,6 @@ CONFIG_CAN_BCM=m CONFIG_CAN_GW=m # CONFIG_CAN_J1939 is not set # CONFIG_CAN_ISOTP is not set - -# -# CAN Device Drivers -# -# CONFIG_CAN_VCAN is not set -# CONFIG_CAN_VXCAN is not set -# CONFIG_CAN_SLCAN is not set -CONFIG_CAN_DEV=m -CONFIG_CAN_CALC_BITTIMING=y -CONFIG_CAN_FLEXCAN=m -# CONFIG_CAN_GRCAN is not set -# CONFIG_CAN_KVASER_PCIEFD is not set -# CONFIG_CAN_XILINXCAN is not set -# CONFIG_CAN_C_CAN is not set -# CONFIG_CAN_CC770 is not set -# CONFIG_CAN_IFI_CANFD is not set -# CONFIG_CAN_M_CAN is not set -# CONFIG_CAN_PEAK_PCIEFD is not set -# CONFIG_CAN_SJA1000 is not set -# CONFIG_CAN_SOFTING is not set - -# -# CAN SPI interfaces -# -# CONFIG_CAN_HI311X is not set -# CONFIG_CAN_MCP251X is not set -CONFIG_CAN_MCP251XFD=m -# CONFIG_CAN_MCP251XFD_SANITY is not set -# end of CAN SPI interfaces - -# -# CAN USB interfaces -# -# CONFIG_CAN_8DEV_USB is not set -# CONFIG_CAN_EMS_USB is not set -# CONFIG_CAN_ESD_USB2 is not set -# CONFIG_CAN_ETAS_ES58X is not set -# CONFIG_CAN_GS_USB is not set -# CONFIG_CAN_KVASER_USB is not set -# CONFIG_CAN_MCBA_USB is not set -# CONFIG_CAN_PEAK_USB is not set -# CONFIG_CAN_UCAN is not set -# end of CAN USB interfaces - -# CONFIG_CAN_DEBUG_DEVICES is not set -# end of CAN Device Drivers - CONFIG_BT=m CONFIG_BT_BREDR=y CONFIG_BT_RFCOMM=m @@ -1769,11 +1725,13 @@ CONFIG_PREVENT_FIRMWARE_BUILD=y # CONFIG_FW_LOADER=y CONFIG_FW_LOADER_PAGED_BUF=y +CONFIG_FW_LOADER_SYSFS=y CONFIG_EXTRA_FIRMWARE="" CONFIG_FW_LOADER_USER_HELPER=y # CONFIG_FW_LOADER_USER_HELPER_FALLBACK is not set # CONFIG_FW_LOADER_COMPRESS is not set CONFIG_FW_CACHE=y +# CONFIG_FW_UPLOAD is not set # end of Firmware loader CONFIG_WANT_DEV_COREDUMP=y @@ -1808,6 +1766,7 @@ CONFIG_GENERIC_ARCH_NUMA=y # CONFIG_MOXTET is not set # CONFIG_VEXPRESS_CONFIG is not set # CONFIG_MHI_BUS is not set +# CONFIG_MHI_BUS_EP is not set # end of Bus devices # CONFIG_CONNECTOR is not set @@ -1822,12 +1781,14 @@ CONFIG_GENERIC_ARCH_NUMA=y CONFIG_ARM_SCMI_PROTOCOL=y CONFIG_ARM_SCMI_HAVE_TRANSPORT=y CONFIG_ARM_SCMI_HAVE_SHMEM=y +CONFIG_ARM_SCMI_HAVE_MSG=y CONFIG_ARM_SCMI_TRANSPORT_MAILBOX=y CONFIG_ARM_SCMI_TRANSPORT_OPTEE=y CONFIG_ARM_SCMI_TRANSPORT_SMC=y # CONFIG_ARM_SCMI_TRANSPORT_SMC_ATOMIC_ENABLE is not set # CONFIG_ARM_SCMI_TRANSPORT_VIRTIO is not set CONFIG_ARM_SCMI_POWER_DOMAIN=y +# CONFIG_ARM_SCMI_POWER_CONTROL is not set # end of ARM System Control and Management Interface Protocol CONFIG_ARM_SCPI_PROTOCOL=y @@ -1852,6 +1813,7 @@ CONFIG_EFI_ESRT=y CONFIG_EFI_PARAMS_FROM_FDT=y CONFIG_EFI_RUNTIME_WRAPPERS=y CONFIG_EFI_GENERIC_STUB=y +# CONFIG_EFI_ZBOOT is not set CONFIG_EFI_ARMSTUB_DTB_LOADER=y # CONFIG_EFI_GENERIC_STUB_INITRD_CMDLINE_LOADER is not set # CONFIG_EFI_BOOTLOADER_CONTROL is not set @@ -1859,9 +1821,11 @@ CONFIG_EFI_CAPSULE_LOADER=y # CONFIG_EFI_TEST is not set # CONFIG_RESET_ATTACK_MITIGATION is not set # CONFIG_EFI_DISABLE_PCI_DMA is not set +CONFIG_EFI_EARLYCON=y +# CONFIG_EFI_DISABLE_RUNTIME is not set +# CONFIG_EFI_COCO_SECRET is not set # end of EFI (Extensible Firmware Interface) Support -CONFIG_EFI_EARLYCON=y CONFIG_ARM_PSCI_FW=y # CONFIG_ARM_PSCI_CHECKER is not set CONFIG_HAVE_ARM_SMCCC=y @@ -1988,7 +1952,10 @@ CONFIG_MTD_NAND_DENALI=y CONFIG_MTD_NAND_DENALI_DT=y # CONFIG_MTD_NAND_CAFE is not set CONFIG_MTD_NAND_BRCMNAND=m -# CONFIG_MTD_NAND_MTK is not set +# CONFIG_MTD_NAND_BRCMNAND_BCM63XX is not set +# CONFIG_MTD_NAND_BRCMNAND_BCMBCA is not set +# CONFIG_MTD_NAND_BRCMNAND_BRCMSTB is not set +# CONFIG_MTD_NAND_BRCMNAND_IPROC is not set # CONFIG_MTD_NAND_MXIC is not set # CONFIG_MTD_NAND_GPIO is not set # CONFIG_MTD_NAND_PLATFORM is not set @@ -2013,6 +1980,7 @@ CONFIG_MTD_NAND_ECC_SW_HAMMING=y # CONFIG_MTD_NAND_ECC_SW_HAMMING_SMC is not set # CONFIG_MTD_NAND_ECC_SW_BCH is not set # CONFIG_MTD_NAND_ECC_MXIC is not set +# CONFIG_MTD_NAND_ECC_MEDIATEK is not set # end of ECC engine support # end of NAND @@ -2058,7 +2026,6 @@ CONFIG_BLK_DEV_LOOP=y CONFIG_BLK_DEV_LOOP_MIN_COUNT=8 # CONFIG_BLK_DEV_DRBD is not set CONFIG_BLK_DEV_NBD=m -# CONFIG_BLK_DEV_SX8 is not set # CONFIG_BLK_DEV_RAM is not set # CONFIG_CDROM_PKTCDVD is not set # CONFIG_ATA_OVER_ETH is not set @@ -2066,6 +2033,7 @@ CONFIG_XEN_BLKDEV_FRONTEND=y # CONFIG_XEN_BLKDEV_BACKEND is not set CONFIG_VIRTIO_BLK=y # CONFIG_BLK_DEV_RBD is not set +# CONFIG_BLK_DEV_UBLK is not set # # NVME Support @@ -2077,6 +2045,7 @@ CONFIG_BLK_DEV_NVME=m # CONFIG_NVME_HWMON is not set # CONFIG_NVME_FC is not set # CONFIG_NVME_TCP is not set +# CONFIG_NVME_AUTH is not set # CONFIG_NVME_TARGET is not set # end of NVME Support @@ -2106,6 +2075,7 @@ CONFIG_PCI_ENDPOINT_TEST=m # CONFIG_XILINX_SDFEC is not set # CONFIG_HISI_HIKEY_USB is not set # CONFIG_OPEN_DICE is not set +# CONFIG_VCPU_STALL_DETECTOR is not set # CONFIG_C2PORT is not set # @@ -2132,6 +2102,7 @@ CONFIG_EEPROM_93CX6=m # CONFIG_SENSORS_LIS3_SPI is not set # CONFIG_SENSORS_LIS3_I2C is not set # CONFIG_ALTERA_STAPL is not set +# CONFIG_VMWARE_VMCI is not set # CONFIG_GENWQE is not set # CONFIG_ECHO is not set # CONFIG_BCM_VK is not set @@ -2141,6 +2112,7 @@ CONFIG_EEPROM_93CX6=m # CONFIG_HABANA_AI is not set CONFIG_UACCE=m # CONFIG_PVPANIC is not set +# CONFIG_GP_PCI1XXXX is not set # end of Misc devices # @@ -2211,16 +2183,8 @@ CONFIG_SCSI_MPT3SAS_MAX_SGE=128 # CONFIG_SCSI_MPT2SAS is not set # CONFIG_SCSI_MPI3MR is not set # CONFIG_SCSI_SMARTPQI is not set -CONFIG_SCSI_UFSHCD=y -# CONFIG_SCSI_UFSHCD_PCI is not set -CONFIG_SCSI_UFSHCD_PLATFORM=y -# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set -# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set -# CONFIG_SCSI_UFS_MEDIATEK is not set -# CONFIG_SCSI_UFS_BSG is not set -# CONFIG_SCSI_UFS_HPB is not set -# CONFIG_SCSI_UFS_HWMON is not set # CONFIG_SCSI_HPTIOP is not set +# CONFIG_SCSI_BUSLOGIC is not set # CONFIG_SCSI_MYRB is not set # CONFIG_SCSI_MYRS is not set # CONFIG_XEN_SCSI_FRONTEND is not set @@ -2245,7 +2209,6 @@ CONFIG_SCSI_UFSHCD_PLATFORM=y # CONFIG_SCSI_DH is not set # end of SCSI device support -CONFIG_HAVE_PATA_PLATFORM=y CONFIG_ATA=y CONFIG_SATA_HOST=y CONFIG_ATA_VERBOSE_ERROR=y @@ -2258,6 +2221,7 @@ CONFIG_SATA_PMP=y CONFIG_SATA_AHCI=y CONFIG_SATA_MOBILE_LPM_POLICY=0 CONFIG_SATA_AHCI_PLATFORM=y +# CONFIG_AHCI_DWC is not set CONFIG_AHCI_CEVA=y # CONFIG_AHCI_MTK is not set CONFIG_AHCI_XGENE=y @@ -2441,14 +2405,13 @@ CONFIG_NET_DSA_BCM_SF2=m # CONFIG_NET_DSA_LANTIQ_GSWIP is not set # CONFIG_NET_DSA_MT7530 is not set # CONFIG_NET_DSA_MV88E6060 is not set -# CONFIG_NET_DSA_MICROCHIP_KSZ9477 is not set -# CONFIG_NET_DSA_MICROCHIP_KSZ8795 is not set +# CONFIG_NET_DSA_MICROCHIP_KSZ_COMMON is not set # CONFIG_NET_DSA_MV88E6XXX is not set # CONFIG_NET_DSA_AR9331 is not set +# CONFIG_NET_DSA_QCA8K is not set # CONFIG_NET_DSA_SJA1105 is not set # CONFIG_NET_DSA_XRS700X_I2C is not set # CONFIG_NET_DSA_XRS700X_MDIO is not set -# CONFIG_NET_DSA_QCA8K is not set # CONFIG_NET_DSA_REALTEK is not set # CONFIG_NET_DSA_SMSC_LAN9303_I2C is not set # CONFIG_NET_DSA_SMSC_LAN9303_MDIO is not set @@ -2521,7 +2484,12 @@ CONFIG_IGBVF=y # CONFIG_ICE is not set # CONFIG_FM10K is not set # CONFIG_IGC is not set +CONFIG_NET_VENDOR_WANGXUN=y +# CONFIG_NGBE is not set +# CONFIG_TXGBE is not set # CONFIG_JME is not set +CONFIG_NET_VENDOR_ADI=y +# CONFIG_ADIN1110 is not set CONFIG_NET_VENDOR_LITEX=y # CONFIG_LITEX_LITEETH is not set CONFIG_NET_VENDOR_MARVELL=y @@ -2531,6 +2499,7 @@ CONFIG_SKY2=y # CONFIG_SKY2_DEBUG is not set # CONFIG_OCTEONTX2_AF is not set # CONFIG_OCTEONTX2_PF is not set +# CONFIG_OCTEON_EP is not set # CONFIG_PRESTERA is not set # CONFIG_NET_VENDOR_MEDIATEK is not set # CONFIG_NET_VENDOR_MELLANOX is not set @@ -2587,6 +2556,7 @@ CONFIG_FIXED_PHY=m # # CONFIG_AMD_PHY is not set # CONFIG_ADIN_PHY is not set +# CONFIG_ADIN1100_PHY is not set CONFIG_AQUANTIA_PHY=m CONFIG_AX88796B_PHY=m # CONFIG_BROADCOM_PHY is not set @@ -2628,9 +2598,57 @@ CONFIG_SMSC_PHY=m # CONFIG_DP83848_PHY is not set CONFIG_DP83867_PHY=m # CONFIG_DP83869_PHY is not set +# CONFIG_DP83TD510_PHY is not set CONFIG_VITESSE_PHY=m # CONFIG_XILINX_GMII2RGMII is not set # CONFIG_MICREL_KS8995MA is not set +# CONFIG_PSE_CONTROLLER is not set +CONFIG_CAN_DEV=m +# CONFIG_CAN_VCAN is not set +# CONFIG_CAN_VXCAN is not set +CONFIG_CAN_NETLINK=y +CONFIG_CAN_CALC_BITTIMING=y +CONFIG_CAN_RX_OFFLOAD=y +# CONFIG_CAN_CAN327 is not set +CONFIG_CAN_FLEXCAN=m +# CONFIG_CAN_GRCAN is not set +# CONFIG_CAN_KVASER_PCIEFD is not set +# CONFIG_CAN_SLCAN is not set +# CONFIG_CAN_XILINXCAN is not set +# CONFIG_CAN_C_CAN is not set +# CONFIG_CAN_CC770 is not set +# CONFIG_CAN_CTUCANFD_PCI is not set +# CONFIG_CAN_CTUCANFD_PLATFORM is not set +# CONFIG_CAN_IFI_CANFD is not set +# CONFIG_CAN_M_CAN is not set +# CONFIG_CAN_PEAK_PCIEFD is not set +# CONFIG_CAN_SJA1000 is not set +# CONFIG_CAN_SOFTING is not set + +# +# CAN SPI interfaces +# +# CONFIG_CAN_HI311X is not set +# CONFIG_CAN_MCP251X is not set +CONFIG_CAN_MCP251XFD=m +# CONFIG_CAN_MCP251XFD_SANITY is not set +# end of CAN SPI interfaces + +# +# CAN USB interfaces +# +# CONFIG_CAN_8DEV_USB is not set +# CONFIG_CAN_EMS_USB is not set +# CONFIG_CAN_ESD_USB is not set +# CONFIG_CAN_ETAS_ES58X is not set +# CONFIG_CAN_GS_USB is not set +# CONFIG_CAN_KVASER_USB is not set +# CONFIG_CAN_MCBA_USB is not set +# CONFIG_CAN_PEAK_USB is not set +# CONFIG_CAN_UCAN is not set +# end of CAN USB interfaces + +# CONFIG_CAN_DEBUG_DEVICES is not set CONFIG_MDIO_DEVICE=m CONFIG_MDIO_BUS=m CONFIG_FWNODE_MDIO=m @@ -2657,7 +2675,6 @@ CONFIG_MDIO_BUS_MUX_MMIOREG=m # # PCS device drivers # -# CONFIG_PCS_XPCS is not set # end of PCS device drivers # CONFIG_PPP is not set @@ -2706,7 +2723,7 @@ CONFIG_USB_NET_ZAURUS=m # CONFIG_USB_VL600 is not set # CONFIG_USB_NET_CH9200 is not set # CONFIG_USB_NET_AQC111 is not set -# CONFIG_USB_RTL8153_ECM is not set +CONFIG_USB_RTL8153_ECM=m CONFIG_WLAN=y CONFIG_WLAN_VENDOR_ADMTEK=y # CONFIG_ADM8211 is not set @@ -2793,6 +2810,8 @@ CONFIG_MT7663U=m CONFIG_WLAN_VENDOR_MICROCHIP=y # CONFIG_WILC1000_SDIO is not set # CONFIG_WILC1000_SPI is not set +CONFIG_WLAN_VENDOR_PURELIFI=y +# CONFIG_PLFXLC is not set CONFIG_WLAN_VENDOR_RALINK=y # CONFIG_RT2X00 is not set CONFIG_WLAN_VENDOR_REALTEK=y @@ -2814,6 +2833,8 @@ CONFIG_RTL_CARDS=m # CONFIG_RTW89 is not set CONFIG_WLAN_VENDOR_RSI=y # CONFIG_RSI_91X is not set +CONFIG_WLAN_VENDOR_SILABS=y +# CONFIG_WFX is not set CONFIG_WLAN_VENDOR_ST=y # CONFIG_CW1200 is not set CONFIG_WLAN_VENDOR_TI=y @@ -2890,6 +2911,7 @@ CONFIG_KEYBOARD_GPIO=y # CONFIG_KEYBOARD_MPR121 is not set # CONFIG_KEYBOARD_NEWTON is not set # CONFIG_KEYBOARD_OPENCORES is not set +# CONFIG_KEYBOARD_PINEPHONE is not set # CONFIG_KEYBOARD_SAMSUNG is not set # CONFIG_KEYBOARD_STOWAWAY is not set # CONFIG_KEYBOARD_SUNKBD is not set @@ -2997,6 +3019,7 @@ CONFIG_TOUCHSCREEN_EDT_FT5X06=m # CONFIG_TOUCHSCREEN_TPS6507X is not set # CONFIG_TOUCHSCREEN_ZET6223 is not set # CONFIG_TOUCHSCREEN_ZFORCE is not set +# CONFIG_TOUCHSCREEN_COLIBRI_VF50 is not set # CONFIG_TOUCHSCREEN_ROHM_BU21023 is not set # CONFIG_TOUCHSCREEN_IQS5XX is not set # CONFIG_TOUCHSCREEN_ZINITIX is not set @@ -3028,6 +3051,7 @@ CONFIG_INPUT_PWM_VIBRA=m # CONFIG_INPUT_IMS_PCU is not set # CONFIG_INPUT_IQS269A is not set # CONFIG_INPUT_IQS626A is not set +# CONFIG_INPUT_IQS7222 is not set # CONFIG_INPUT_CMA3000 is not set CONFIG_INPUT_XEN_KBDDEV_FRONTEND=y # CONFIG_INPUT_DRV260X_HAPTICS is not set @@ -3098,7 +3122,6 @@ CONFIG_SERIAL_8250_NR_UARTS=4 CONFIG_SERIAL_8250_RUNTIME_UARTS=4 CONFIG_SERIAL_8250_EXTENDED=y # CONFIG_SERIAL_8250_MANY_PORTS is not set -# CONFIG_SERIAL_8250_ASPEED_VUART is not set CONFIG_SERIAL_8250_SHARE_IRQ=y # CONFIG_SERIAL_8250_DETECT_IRQ is not set # CONFIG_SERIAL_8250_RSA is not set @@ -3181,6 +3204,7 @@ CONFIG_TCG_TPM=y CONFIG_HW_RANDOM_TPM=y # CONFIG_TCG_TIS is not set # CONFIG_TCG_TIS_SPI is not set +# CONFIG_TCG_TIS_I2C is not set # CONFIG_TCG_TIS_I2C_CR50 is not set # CONFIG_TCG_TIS_I2C_ATMEL is not set CONFIG_TCG_TIS_I2C_INFINEON=y @@ -3193,6 +3217,7 @@ CONFIG_TCG_TIS_I2C_INFINEON=y # CONFIG_TCG_TIS_ST33ZP24_SPI is not set # CONFIG_XILLYBUS is not set # CONFIG_XILLYUSB is not set +CONFIG_RANDOM_TRUST_CPU=y # CONFIG_RANDOM_TRUST_BOOTLOADER is not set # end of Character devices @@ -3272,6 +3297,7 @@ CONFIG_I2C_RK3X=y # # CONFIG_I2C_DIOLAN_U2C is not set # CONFIG_I2C_CP2615 is not set +# CONFIG_I2C_PCI1XXXX is not set # CONFIG_I2C_ROBOTFUZZ_OSIF is not set # CONFIG_I2C_TAOS_EVM is not set # CONFIG_I2C_TINY_USB is not set @@ -3312,6 +3338,8 @@ CONFIG_SPI_DW_MMIO=m CONFIG_SPI_NXP_FLEXSPI=y # CONFIG_SPI_GPIO is not set # CONFIG_SPI_FSL_SPI is not set +# CONFIG_SPI_MICROCHIP_CORE is not set +# CONFIG_SPI_MICROCHIP_CORE_QSPI is not set CONFIG_SPI_MT65XX=y CONFIG_SPI_MTK_NOR=y # CONFIG_SPI_OC_TINY is not set @@ -3381,6 +3409,7 @@ CONFIG_PINCONF=y CONFIG_GENERIC_PINCONF=y # CONFIG_DEBUG_PINCTRL is not set # CONFIG_PINCTRL_AXP209 is not set +# CONFIG_PINCTRL_CY8C95X0 is not set CONFIG_PINCTRL_MAX77620=y # CONFIG_PINCTRL_MCP23S08 is not set # CONFIG_PINCTRL_MICROCHIP_SGPIO is not set @@ -3402,6 +3431,7 @@ CONFIG_PINCTRL_MTK_PARIS=y CONFIG_PINCTRL_MT2712=y CONFIG_PINCTRL_MT6765=y CONFIG_PINCTRL_MT6779=y +CONFIG_PINCTRL_MT6795=y CONFIG_PINCTRL_MT6797=y CONFIG_PINCTRL_MT7622=y CONFIG_PINCTRL_MT7986=y @@ -3409,6 +3439,7 @@ CONFIG_PINCTRL_MT8167=y CONFIG_PINCTRL_MT8173=y CONFIG_PINCTRL_MT8183=y CONFIG_PINCTRL_MT8186=y +CONFIG_PINCTRL_MT8188=y CONFIG_PINCTRL_MT8192=y # CONFIG_PINCTRL_MT8195 is not set CONFIG_PINCTRL_MT8365=y @@ -3446,7 +3477,6 @@ CONFIG_GPIO_DWAPB=y CONFIG_GPIO_MB86S7X=y CONFIG_GPIO_PL061=y CONFIG_GPIO_ROCKCHIP=y -# CONFIG_GPIO_SAMA5D2_PIOBU is not set # CONFIG_GPIO_SIFIVE is not set # CONFIG_GPIO_SYSCON is not set CONFIG_GPIO_WCD934X=m @@ -3458,7 +3488,6 @@ CONFIG_GPIO_XGENE=y # # I2C GPIO expanders # -# CONFIG_GPIO_ADP5588 is not set # CONFIG_GPIO_ADNP is not set # CONFIG_GPIO_GW_PLD is not set # CONFIG_GPIO_MAX7300 is not set @@ -3567,6 +3596,7 @@ CONFIG_BATTERY_MAX17042=m CONFIG_CHARGER_BQ25890=m CONFIG_CHARGER_BQ25980=m # CONFIG_CHARGER_BQ256XX is not set +# CONFIG_CHARGER_RK817 is not set # CONFIG_CHARGER_SMB347 is not set # CONFIG_BATTERY_GAUGE_LTC2941 is not set # CONFIG_BATTERY_GOLDFISH is not set @@ -3586,7 +3616,6 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AD7314 is not set # CONFIG_SENSORS_AD7414 is not set # CONFIG_SENSORS_AD7418 is not set -# CONFIG_SENSORS_ADM1021 is not set # CONFIG_SENSORS_ADM1025 is not set # CONFIG_SENSORS_ADM1026 is not set # CONFIG_SENSORS_ADM1029 is not set @@ -3606,7 +3635,6 @@ CONFIG_HWMON=y # CONFIG_SENSORS_AXI_FAN_CONTROL is not set CONFIG_SENSORS_ARM_SCMI=y CONFIG_SENSORS_ARM_SCPI=y -# CONFIG_SENSORS_ASPEED is not set # CONFIG_SENSORS_ATXP1 is not set # CONFIG_SENSORS_CORSAIR_CPRO is not set # CONFIG_SENSORS_CORSAIR_PSU is not set @@ -3650,10 +3678,10 @@ CONFIG_SENSORS_JC42=m # CONFIG_SENSORS_MAX197 is not set # CONFIG_SENSORS_MAX31722 is not set # CONFIG_SENSORS_MAX31730 is not set +# CONFIG_SENSORS_MAX31760 is not set # CONFIG_SENSORS_MAX6620 is not set # CONFIG_SENSORS_MAX6621 is not set # CONFIG_SENSORS_MAX6639 is not set -# CONFIG_SENSORS_MAX6642 is not set # CONFIG_SENSORS_MAX6650 is not set # CONFIG_SENSORS_MAX6697 is not set # CONFIG_SENSORS_MAX31790 is not set @@ -3683,6 +3711,7 @@ CONFIG_SENSORS_LM90=m # CONFIG_SENSORS_NTC_THERMISTOR is not set # CONFIG_SENSORS_NCT6683 is not set # CONFIG_SENSORS_NCT6775 is not set +# CONFIG_SENSORS_NCT6775_I2C is not set # CONFIG_SENSORS_NCT7802 is not set # CONFIG_SENSORS_NCT7904 is not set # CONFIG_SENSORS_NPCM7XX is not set @@ -3700,10 +3729,10 @@ CONFIG_SENSORS_PWM_FAN=m # CONFIG_SENSORS_SHT4x is not set # CONFIG_SENSORS_SHTC1 is not set # CONFIG_SENSORS_SIS5595 is not set -# CONFIG_SENSORS_SY7636A is not set # CONFIG_SENSORS_DME1737 is not set # CONFIG_SENSORS_EMC1403 is not set # CONFIG_SENSORS_EMC2103 is not set +# CONFIG_SENSORS_EMC2305 is not set # CONFIG_SENSORS_EMC6W201 is not set # CONFIG_SENSORS_SMSC47M1 is not set # CONFIG_SENSORS_SMSC47M192 is not set @@ -3797,6 +3826,7 @@ CONFIG_MEDIATEK_WATCHDOG=m CONFIG_ARM_SMC_WATCHDOG=y # CONFIG_ALIM7101_WDT is not set # CONFIG_I6300ESB_WDT is not set +# CONFIG_HP_WATCHDOG is not set # CONFIG_MEN_A21_WDT is not set # CONFIG_XEN_WDT is not set @@ -3868,23 +3898,26 @@ CONFIG_MFD_MAX77620=y # CONFIG_MFD_MAX8997 is not set # CONFIG_MFD_MAX8998 is not set CONFIG_MFD_MT6360=m +# CONFIG_MFD_MT6370 is not set CONFIG_MFD_MT6397=y # CONFIG_MFD_MENF21BMC is not set +# CONFIG_MFD_OCELOT is not set # CONFIG_EZX_PCAP is not set # CONFIG_MFD_CPCAP is not set # CONFIG_MFD_VIPERBOARD is not set # CONFIG_MFD_NTXEC is not set # CONFIG_MFD_RETU is not set # CONFIG_MFD_PCF50633 is not set +# CONFIG_MFD_SY7636A is not set # CONFIG_MFD_RDC321X is not set # CONFIG_MFD_RT4831 is not set # CONFIG_MFD_RT5033 is not set +# CONFIG_MFD_RT5120 is not set # CONFIG_MFD_RC5T583 is not set CONFIG_MFD_RK808=y # CONFIG_MFD_RN5T618 is not set CONFIG_MFD_SEC_CORE=y # CONFIG_MFD_SI476X_CORE is not set -# CONFIG_MFD_SIMPLE_MFD_I2C is not set # CONFIG_MFD_SM501 is not set # CONFIG_MFD_SKY81452 is not set # CONFIG_MFD_STMPE is not set @@ -3983,6 +4016,8 @@ CONFIG_REGULATOR_MP8859=y CONFIG_REGULATOR_MT6311=y # CONFIG_REGULATOR_MT6315 is not set CONFIG_REGULATOR_MT6323=y +# CONFIG_REGULATOR_MT6331 is not set +# CONFIG_REGULATOR_MT6332 is not set CONFIG_REGULATOR_MT6358=y # CONFIG_REGULATOR_MT6359 is not set CONFIG_REGULATOR_MT6360=m @@ -4002,6 +4037,7 @@ CONFIG_REGULATOR_RK808=y CONFIG_REGULATOR_ROHM=y # CONFIG_REGULATOR_RT4801 is not set # CONFIG_REGULATOR_RT5190A is not set +# CONFIG_REGULATOR_RT5759 is not set # CONFIG_REGULATOR_RT6160 is not set # CONFIG_REGULATOR_RT6245 is not set # CONFIG_REGULATOR_RTQ2134 is not set @@ -4011,7 +4047,6 @@ CONFIG_REGULATOR_ROHM=y CONFIG_REGULATOR_S2MPS11=y # CONFIG_REGULATOR_S5M8767 is not set # CONFIG_REGULATOR_SLG51000 is not set -# CONFIG_REGULATOR_SY7636A is not set # CONFIG_REGULATOR_SY8106A is not set # CONFIG_REGULATOR_SY8824X is not set # CONFIG_REGULATOR_SY8827N is not set @@ -4133,15 +4168,12 @@ CONFIG_MEDIA_USB_SUPPORT=y # # Webcam devices # -# CONFIG_VIDEO_CPIA2 is not set # CONFIG_USB_GSPCA is not set # CONFIG_USB_PWC is not set # CONFIG_USB_S2255 is not set -# CONFIG_USB_STKWEBCAM is not set # CONFIG_VIDEO_USBTV is not set CONFIG_USB_VIDEO_CLASS=m CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y -# CONFIG_USB_ZR364XX is not set # # Analog TV USB devices @@ -4156,7 +4188,6 @@ CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y # # CONFIG_VIDEO_AU0828 is not set # CONFIG_VIDEO_CX231XX is not set -# CONFIG_VIDEO_TM6000 is not set # # Digital TV USB devices @@ -4238,6 +4269,7 @@ CONFIG_VIDEO_MEDIATEK_VCODEC_SCP=y CONFIG_VIDEO_MEDIATEK_VCODEC_VPU=y CONFIG_VIDEO_MEDIATEK_VCODEC=m CONFIG_VIDEO_MEDIATEK_VPU=m +# CONFIG_VIDEO_MEDIATEK_MDP3 is not set # # NVidia media platform drivers @@ -4277,6 +4309,12 @@ CONFIG_VIDEO_MEDIATEK_VPU=m # Texas Instruments drivers # +# +# Verisilicon media platform drivers +# +CONFIG_VIDEO_HANTRO=m +CONFIG_VIDEO_HANTRO_ROCKCHIP=y + # # VIA media platform drivers # @@ -4312,6 +4350,7 @@ CONFIG_VIDEO_IR_I2C=m # # Camera sensor devices # +# CONFIG_VIDEO_AR0521 is not set # CONFIG_VIDEO_HI556 is not set # CONFIG_VIDEO_HI846 is not set # CONFIG_VIDEO_HI847 is not set @@ -4484,22 +4523,25 @@ CONFIG_MEDIA_TUNER_XC5000=m # # Graphics support # +CONFIG_APERTURE_HELPERS=y CONFIG_DRM=y CONFIG_DRM_MIPI_DSI=y -CONFIG_DRM_DP_AUX_BUS=y -CONFIG_DRM_DP_AUX_CHARDEV=y # CONFIG_DRM_DEBUG_MM is not set -# CONFIG_DRM_DEBUG_SELFTEST is not set -CONFIG_DRM_DP_HELPER=y CONFIG_DRM_KMS_HELPER=y CONFIG_DRM_FBDEV_EMULATION=y CONFIG_DRM_FBDEV_OVERALLOC=100 CONFIG_DRM_LOAD_EDID_FIRMWARE=y +CONFIG_DRM_DP_AUX_BUS=y +CONFIG_DRM_DISPLAY_HELPER=y +CONFIG_DRM_DISPLAY_DP_HELPER=y +CONFIG_DRM_DISPLAY_HDCP_HELPER=y +CONFIG_DRM_DISPLAY_HDMI_HELPER=y +CONFIG_DRM_DP_AUX_CHARDEV=y # CONFIG_DRM_DP_CEC is not set CONFIG_DRM_TTM=m CONFIG_DRM_VRAM_HELPER=m CONFIG_DRM_TTM_HELPER=m -CONFIG_DRM_GEM_CMA_HELPER=y +CONFIG_DRM_GEM_DMA_HELPER=y CONFIG_DRM_GEM_SHMEM_HELPER=y CONFIG_DRM_SCHED=y @@ -4526,6 +4568,8 @@ CONFIG_DRM_MALI_DISPLAY=m # CONFIG_DRM_VGEM is not set # CONFIG_DRM_VKMS is not set CONFIG_DRM_ROCKCHIP=m +CONFIG_ROCKCHIP_VOP=y +# CONFIG_ROCKCHIP_VOP2 is not set CONFIG_ROCKCHIP_ANALOGIX_DP=y CONFIG_ROCKCHIP_CDN_DP=y CONFIG_ROCKCHIP_DW_HDMI=y @@ -4540,7 +4584,7 @@ CONFIG_DRM_UDL=m # CONFIG_DRM_MGAG200 is not set CONFIG_DRM_RCAR_DW_HDMI=m # CONFIG_DRM_RCAR_USE_LVDS is not set -CONFIG_DRM_RCAR_MIPI_DSI=m +# CONFIG_DRM_RCAR_USE_MIPI_DSI is not set # CONFIG_DRM_QXL is not set CONFIG_DRM_VIRTIO_GPU=m CONFIG_DRM_PANEL=y @@ -4558,6 +4602,7 @@ CONFIG_DRM_PANEL_BOE_TV101WUM_NL6=y CONFIG_DRM_PANEL_LVDS=y CONFIG_DRM_PANEL_SIMPLE=y CONFIG_DRM_PANEL_EDP=y +# CONFIG_DRM_PANEL_EBBG_FT8719 is not set # CONFIG_DRM_PANEL_ELIDA_KD35T133 is not set # CONFIG_DRM_PANEL_FEIXIN_K101_IM2BA02 is not set # CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D is not set @@ -4577,6 +4622,7 @@ CONFIG_DRM_PANEL_KINGDISPLAY_KD097D04=y # CONFIG_DRM_PANEL_LG_LB035Q02 is not set # CONFIG_DRM_PANEL_LG_LG4573 is not set # CONFIG_DRM_PANEL_NEC_NL8048HL11 is not set +# CONFIG_DRM_PANEL_NEWVISION_NV3052C is not set # CONFIG_DRM_PANEL_NOVATEK_NT35510 is not set # CONFIG_DRM_PANEL_NOVATEK_NT35560 is not set # CONFIG_DRM_PANEL_NOVATEK_NT35950 is not set @@ -4634,6 +4680,7 @@ CONFIG_DRM_PANEL_BRIDGE=y CONFIG_DRM_DISPLAY_CONNECTOR=y CONFIG_DRM_ITE_IT6505=y CONFIG_DRM_LONTIUM_LT8912B=m +# CONFIG_DRM_LONTIUM_LT9211 is not set CONFIG_DRM_LONTIUM_LT9611=m CONFIG_DRM_LONTIUM_LT9611UXC=m # CONFIG_DRM_ITE_IT66121 is not set @@ -4653,6 +4700,7 @@ CONFIG_DRM_THINE_THC63LVD1024=m # CONFIG_DRM_TOSHIBA_TC358767 is not set # CONFIG_DRM_TOSHIBA_TC358768 is not set # CONFIG_DRM_TOSHIBA_TC358775 is not set +# CONFIG_DRM_TI_DLPC3433 is not set # CONFIG_DRM_TI_TFP410 is not set # CONFIG_DRM_TI_SN65DSI83 is not set CONFIG_DRM_TI_SN65DSI86=m @@ -4668,6 +4716,7 @@ CONFIG_DRM_I2C_ADV7511_CEC=y CONFIG_DRM_DW_HDMI=m CONFIG_DRM_DW_HDMI_AHB_AUDIO=m CONFIG_DRM_DW_HDMI_I2S_AUDIO=m +# CONFIG_DRM_DW_HDMI_GP_AUDIO is not set CONFIG_DRM_DW_HDMI_CEC=m CONFIG_DRM_DW_MIPI_DSI=m # end of Display Interface Bridges @@ -4675,10 +4724,10 @@ CONFIG_DRM_DW_MIPI_DSI=m # CONFIG_DRM_ETNAVIV is not set CONFIG_DRM_HISI_HIBMC=m CONFIG_DRM_HISI_KIRIN=m +# CONFIG_DRM_LOGICVC is not set CONFIG_DRM_MEDIATEK=y +# CONFIG_DRM_MEDIATEK_DP is not set CONFIG_DRM_MEDIATEK_HDMI=y -CONFIG_DRM_MXS=y -CONFIG_DRM_MXSFB=m # CONFIG_DRM_ARCPGU is not set # CONFIG_DRM_BOCHS is not set # CONFIG_DRM_CIRRUS_QEMU is not set @@ -4829,7 +4878,9 @@ CONFIG_SND_SUPPORT_OLD_API=y CONFIG_SND_PROC_FS=y CONFIG_SND_VERBOSE_PROCFS=y # CONFIG_SND_VERBOSE_PRINTK is not set +CONFIG_SND_CTL_FAST_LOOKUP=y # CONFIG_SND_DEBUG is not set +# CONFIG_SND_CTL_INPUT_VALIDATION is not set CONFIG_SND_SEQUENCER=m CONFIG_SND_SEQ_DUMMY=m CONFIG_SND_SEQ_MIDI_EVENT=m @@ -4841,6 +4892,7 @@ CONFIG_SND_DRIVERS=y CONFIG_SND_VIRMIDI=m # CONFIG_SND_MTPAV is not set # CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_SERIAL_GENERIC is not set # CONFIG_SND_MPU401 is not set CONFIG_SND_PCI=y # CONFIG_SND_AD1889 is not set @@ -4952,6 +5004,7 @@ CONFIG_SND_SOC_FSL_ASRC=m CONFIG_SND_SOC_FSL_MICFIL=m CONFIG_SND_SOC_FSL_EASRC=m # CONFIG_SND_SOC_FSL_XCVR is not set +CONFIG_SND_SOC_FSL_UTILS=m # CONFIG_SND_SOC_FSL_RPMSG is not set # CONFIG_SND_SOC_IMX_AUDMUX is not set # end of SoC Audio for Freescale CPUs @@ -4969,6 +5022,7 @@ CONFIG_SND_SOC_MT8173_RT5650_RT5676=m CONFIG_SND_SOC_MT8183=m CONFIG_SND_SOC_MT8183_MT6358_TS3A227E_MAX98357A=m CONFIG_SND_SOC_MT8183_DA7219_MAX98357A=m +# CONFIG_SND_SOC_MT8186 is not set # CONFIG_SND_SOC_MTK_BTCVSD is not set # CONFIG_SND_SOC_MT8192 is not set # CONFIG_SND_SOC_MT8195 is not set @@ -5027,11 +5081,14 @@ CONFIG_SND_SOC_CROS_EC_CODEC=m # CONFIG_SND_SOC_CS35L36 is not set # CONFIG_SND_SOC_CS35L41_SPI is not set # CONFIG_SND_SOC_CS35L41_I2C is not set +# CONFIG_SND_SOC_CS35L45_SPI is not set +# CONFIG_SND_SOC_CS35L45_I2C is not set # CONFIG_SND_SOC_CS42L42 is not set # CONFIG_SND_SOC_CS42L51_I2C is not set # CONFIG_SND_SOC_CS42L52 is not set # CONFIG_SND_SOC_CS42L56 is not set # CONFIG_SND_SOC_CS42L73 is not set +# CONFIG_SND_SOC_CS42L83 is not set # CONFIG_SND_SOC_CS4234 is not set # CONFIG_SND_SOC_CS4265 is not set # CONFIG_SND_SOC_CS4270 is not set @@ -5050,9 +5107,11 @@ CONFIG_SND_SOC_HDMI_CODEC=y CONFIG_SND_SOC_ES7134=m CONFIG_SND_SOC_ES7241=m # CONFIG_SND_SOC_ES8316 is not set +# CONFIG_SND_SOC_ES8326 is not set # CONFIG_SND_SOC_ES8328_I2C is not set # CONFIG_SND_SOC_ES8328_SPI is not set CONFIG_SND_SOC_GTM601=m +# CONFIG_SND_SOC_HDA is not set # CONFIG_SND_SOC_ICS43432 is not set # CONFIG_SND_SOC_INNO_RK3036 is not set # CONFIG_SND_SOC_MAX98088 is not set @@ -5064,6 +5123,7 @@ CONFIG_SND_SOC_MAX98357A=m # CONFIG_SND_SOC_MAX98373_I2C is not set # CONFIG_SND_SOC_MAX98373_SDW is not set # CONFIG_SND_SOC_MAX98390 is not set +# CONFIG_SND_SOC_MAX98396 is not set # CONFIG_SND_SOC_MAX9860 is not set CONFIG_SND_SOC_MSM8916_WCD_ANALOG=m CONFIG_SND_SOC_MSM8916_WCD_DIGITAL=m @@ -5108,6 +5168,7 @@ CONFIG_SND_SOC_RT5677_SPI=m CONFIG_SND_SOC_SIMPLE_AMPLIFIER=m CONFIG_SND_SOC_SIMPLE_MUX=m # CONFIG_SND_SOC_SPDIF is not set +# CONFIG_SND_SOC_SRC4XXX_I2C is not set # CONFIG_SND_SOC_SSM2305 is not set # CONFIG_SND_SOC_SSM2518 is not set # CONFIG_SND_SOC_SSM2602_SPI is not set @@ -5120,6 +5181,7 @@ CONFIG_SND_SOC_SIMPLE_MUX=m # CONFIG_SND_SOC_TAS2562 is not set # CONFIG_SND_SOC_TAS2764 is not set # CONFIG_SND_SOC_TAS2770 is not set +# CONFIG_SND_SOC_TAS2780 is not set # CONFIG_SND_SOC_TAS5086 is not set CONFIG_SND_SOC_TAS571X=m # CONFIG_SND_SOC_TAS5720 is not set @@ -5152,7 +5214,8 @@ CONFIG_SND_SOC_WCD934X=m # CONFIG_SND_SOC_WM8580 is not set # CONFIG_SND_SOC_WM8711 is not set # CONFIG_SND_SOC_WM8728 is not set -# CONFIG_SND_SOC_WM8731 is not set +# CONFIG_SND_SOC_WM8731_I2C is not set +# CONFIG_SND_SOC_WM8731_SPI is not set # CONFIG_SND_SOC_WM8737 is not set # CONFIG_SND_SOC_WM8741 is not set # CONFIG_SND_SOC_WM8750 is not set @@ -5164,12 +5227,14 @@ CONFIG_SND_SOC_WCD934X=m # CONFIG_SND_SOC_WM8804_SPI is not set # CONFIG_SND_SOC_WM8903 is not set CONFIG_SND_SOC_WM8904=m +# CONFIG_SND_SOC_WM8940 is not set CONFIG_SND_SOC_WM8960=m CONFIG_SND_SOC_WM8962=m # CONFIG_SND_SOC_WM8974 is not set CONFIG_SND_SOC_WM8978=m # CONFIG_SND_SOC_WM8985 is not set CONFIG_SND_SOC_WSA881X=m +# CONFIG_SND_SOC_WSA883X is not set # CONFIG_SND_SOC_ZL38060 is not set # CONFIG_SND_SOC_MAX9759 is not set CONFIG_SND_SOC_MT6351=m @@ -5250,6 +5315,7 @@ CONFIG_HID_GOOGLE_HAMMER=y # CONFIG_HID_UCLOGIC is not set # CONFIG_HID_WALTOP is not set # CONFIG_HID_VIEWSONIC is not set +# CONFIG_HID_VRC2 is not set # CONFIG_HID_XIAOMI is not set # CONFIG_HID_GYRATION is not set # CONFIG_HID_ICADE is not set @@ -5270,6 +5336,7 @@ CONFIG_HID_LOGITECH=y # CONFIG_HID_MAGICMOUSE is not set # CONFIG_HID_MALTRON is not set # CONFIG_HID_MAYFLASH is not set +# CONFIG_HID_MEGAWORLD_FF is not set CONFIG_HID_REDRAGON=y CONFIG_HID_MICROSOFT=y CONFIG_HID_MONTEREY=y @@ -5283,6 +5350,7 @@ CONFIG_HID_MULTITOUCH=m # CONFIG_HID_PETALYNX is not set # CONFIG_HID_PICOLCD is not set # CONFIG_HID_PLANTRONICS is not set +# CONFIG_HID_PXRC is not set # CONFIG_HID_RAZER is not set # CONFIG_HID_PRIMAX is not set # CONFIG_HID_RETRODE is not set @@ -5301,6 +5369,7 @@ CONFIG_HID_RMI=m # CONFIG_HID_SMARTJOYPLUS is not set # CONFIG_HID_TIVO is not set # CONFIG_HID_TOPSEED is not set +# CONFIG_HID_TOPRE is not set # CONFIG_HID_THINGM is not set # CONFIG_HID_THRUSTMASTER is not set # CONFIG_HID_UDRAW_PS3 is not set @@ -5327,6 +5396,7 @@ CONFIG_USB_HID=y # I2C HID support # CONFIG_I2C_HID_OF=m +# CONFIG_I2C_HID_OF_ELAN is not set CONFIG_I2C_HID_OF_GOODIX=m # end of I2C HID support @@ -5573,6 +5643,7 @@ CONFIG_USB_HSIC_USB3503=y # CONFIG_USB_HSIC_USB4604 is not set # CONFIG_USB_LINK_LAYER_TEST is not set # CONFIG_USB_CHAOSKEY is not set +# CONFIG_USB_ONBOARD_HUB is not set # # USB Physical Layer drivers @@ -5652,9 +5723,7 @@ CONFIG_USB_CONFIGFS_F_FS=y # # CONFIG_USB_ZERO is not set # CONFIG_USB_AUDIO is not set -CONFIG_USB_ETH=m -CONFIG_USB_ETH_RNDIS=y -# CONFIG_USB_ETH_EEM is not set +# CONFIG_USB_ETH is not set # CONFIG_USB_G_NCM is not set # CONFIG_USB_GADGETFS is not set # CONFIG_USB_FUNCTIONFS is not set @@ -5680,6 +5749,7 @@ CONFIG_TYPEC_MT6360=m CONFIG_TYPEC_FUSB302=m # CONFIG_TYPEC_UCSI is not set CONFIG_TYPEC_TPS6598X=m +# CONFIG_TYPEC_ANX7411 is not set # CONFIG_TYPEC_RT1719 is not set CONFIG_TYPEC_HD3SS3220=m # CONFIG_TYPEC_STUSB160X is not set @@ -5688,6 +5758,7 @@ CONFIG_TYPEC_HD3SS3220=m # # USB Type-C Multiplexer/DeMultiplexer Switch support # +# CONFIG_TYPEC_MUX_FSA4480 is not set # CONFIG_TYPEC_MUX_PI3USB30532 is not set # end of USB Type-C Multiplexer/DeMultiplexer Switch support @@ -5718,7 +5789,6 @@ CONFIG_MMC_SDHCI_IO_ACCESSORS=y # CONFIG_MMC_SDHCI_PCI is not set CONFIG_MMC_SDHCI_PLTFM=y CONFIG_MMC_SDHCI_OF_ARASAN=y -# CONFIG_MMC_SDHCI_OF_ASPEED is not set # CONFIG_MMC_SDHCI_OF_AT91 is not set # CONFIG_MMC_SDHCI_OF_DWCMSHC is not set CONFIG_MMC_SDHCI_CADENCE=y @@ -5746,6 +5816,15 @@ CONFIG_MMC_MTK=y CONFIG_MMC_SDHCI_XENON=y # CONFIG_MMC_SDHCI_OMAP is not set CONFIG_MMC_SDHCI_AM654=y +CONFIG_SCSI_UFSHCD=y +# CONFIG_SCSI_UFS_BSG is not set +# CONFIG_SCSI_UFS_HPB is not set +# CONFIG_SCSI_UFS_HWMON is not set +# CONFIG_SCSI_UFSHCD_PCI is not set +CONFIG_SCSI_UFSHCD_PLATFORM=y +# CONFIG_SCSI_UFS_CDNS_PLATFORM is not set +# CONFIG_SCSI_UFS_DWC_TC_PLATFORM is not set +# CONFIG_SCSI_UFS_MEDIATEK is not set # CONFIG_MEMSTICK is not set CONFIG_NEW_LEDS=y CONFIG_LEDS_CLASS=y @@ -5802,6 +5881,10 @@ CONFIG_LEDS_SYSCON=y # Flash and Torch LED drivers # +# +# RGB LED drivers +# + # # LED Triggers # @@ -5871,6 +5954,7 @@ CONFIG_RTC_DRV_DS1307=m CONFIG_RTC_DRV_HYM8563=m # CONFIG_RTC_DRV_MAX6900 is not set CONFIG_RTC_DRV_MAX77686=y +# CONFIG_RTC_DRV_NCT3018Y is not set CONFIG_RTC_DRV_RK808=m # CONFIG_RTC_DRV_RS5C372 is not set # CONFIG_RTC_DRV_ISL1208 is not set @@ -5979,7 +6063,6 @@ CONFIG_DMA_OF=y # CONFIG_DW_AXI_DMAC is not set CONFIG_FSL_EDMA=y # CONFIG_FSL_QDMA is not set -# CONFIG_HISI_DMA is not set # CONFIG_INTEL_IDMA64 is not set CONFIG_MV_XOR_V2=y CONFIG_PL330_DMA=y @@ -6031,6 +6114,7 @@ CONFIG_VFIO_PCI=y # CONFIG_VFIO_PLATFORM is not set # CONFIG_VFIO_MDEV is not set # CONFIG_VIRT_DRIVERS is not set +CONFIG_VIRTIO_ANCHOR=y CONFIG_VIRTIO=y CONFIG_VIRTIO_PCI_LIB=y CONFIG_VIRTIO_PCI_LIB_LEGACY=y @@ -6074,6 +6158,7 @@ CONFIG_XEN_PCIDEV_STUB=m CONFIG_XEN_PRIVCMD=y CONFIG_XEN_EFI=y CONFIG_XEN_AUTO_XLATE=y +# CONFIG_XEN_VIRTIO is not set # end of Xen driver support # CONFIG_GREYBUS is not set @@ -6112,12 +6197,6 @@ CONFIG_R8188EU=m # CONFIG_ADT7316 is not set # end of Analog digital bi-direction converters -# -# Capacitance to digital converters -# -# CONFIG_AD7746 is not set -# end of Capacitance to digital converters - # # Direct Digital Synthesis # @@ -6146,23 +6225,18 @@ CONFIG_R8188EU=m # CONFIG_FB_SM750 is not set CONFIG_STAGING_MEDIA=y -CONFIG_VIDEO_HANTRO=m -CONFIG_VIDEO_HANTRO_ROCKCHIP=y # CONFIG_VIDEO_MAX96712 is not set # CONFIG_VIDEO_ROCKCHIP_VDEC is not set -# CONFIG_VIDEO_ZORAN is not set -# CONFIG_DVB_AV7110 is not set +# CONFIG_STAGING_MEDIA_DEPRECATED is not set # CONFIG_STAGING_BOARD is not set # CONFIG_LTE_GDM724X is not set -# CONFIG_UNISYSSPAR is not set -# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set # CONFIG_FB_TFT is not set # CONFIG_KS7010 is not set # CONFIG_PI433 is not set # CONFIG_XIL_AXIS_FIFO is not set # CONFIG_FIELDBUS_DEV is not set # CONFIG_QLGE is not set -# CONFIG_WFX is not set +# CONFIG_VME_BUS is not set # CONFIG_GOLDFISH is not set CONFIG_CHROME_PLATFORMS=y CONFIG_CROS_EC=y @@ -6170,6 +6244,7 @@ CONFIG_CROS_EC_I2C=y CONFIG_CROS_EC_RPMSG=y CONFIG_CROS_EC_SPI=y CONFIG_CROS_EC_PROTO=y +# CONFIG_CROS_KBD_LED_BACKLIGHT is not set CONFIG_CROS_EC_CHARDEV=m CONFIG_CROS_EC_LIGHTBAR=y CONFIG_CROS_EC_VBC=y @@ -6212,6 +6287,7 @@ CONFIG_COMMON_CLK_S2MPS11=y CONFIG_COMMON_CLK_PWM=y # CONFIG_COMMON_CLK_RS9_PCIE is not set CONFIG_COMMON_CLK_VC5=y +# CONFIG_COMMON_CLK_VC7 is not set CONFIG_COMMON_CLK_BD718XX=m # CONFIG_COMMON_CLK_FIXED_MMIO is not set @@ -6242,6 +6318,11 @@ CONFIG_COMMON_CLK_MT6765_AUDIOSYS=y # CONFIG_COMMON_CLK_MT6765_MIPI2ASYS is not set # CONFIG_COMMON_CLK_MT6765_MIPI2BSYS is not set # CONFIG_COMMON_CLK_MT6779 is not set +CONFIG_COMMON_CLK_MT6795=y +CONFIG_COMMON_CLK_MT6795_MFGCFG=y +CONFIG_COMMON_CLK_MT6795_MMSYS=y +CONFIG_COMMON_CLK_MT6795_VDECSYS=y +CONFIG_COMMON_CLK_MT6795_VENCSYS=y CONFIG_COMMON_CLK_MT6797=y CONFIG_COMMON_CLK_MT6797_MMSYS=y CONFIG_COMMON_CLK_MT6797_IMGSYS=y @@ -6273,6 +6354,7 @@ CONFIG_COMMON_CLK_MT8183_MFGCFG=y CONFIG_COMMON_CLK_MT8183_MMSYS=y CONFIG_COMMON_CLK_MT8183_VDECSYS=y CONFIG_COMMON_CLK_MT8183_VENCSYS=y +CONFIG_COMMON_CLK_MT8186=y CONFIG_COMMON_CLK_MT8192=y # CONFIG_COMMON_CLK_MT8192_AUDSYS is not set # CONFIG_COMMON_CLK_MT8192_CAMSYS is not set @@ -6287,6 +6369,13 @@ CONFIG_COMMON_CLK_MT8192=y # CONFIG_COMMON_CLK_MT8192_VDECSYS is not set # CONFIG_COMMON_CLK_MT8192_VENCSYS is not set CONFIG_COMMON_CLK_MT8195=y +CONFIG_COMMON_CLK_MT8365=y +CONFIG_COMMON_CLK_MT8365_APU=y +CONFIG_COMMON_CLK_MT8365_CAM=y +CONFIG_COMMON_CLK_MT8365_MFG=y +CONFIG_COMMON_CLK_MT8365_MMSYS=y +CONFIG_COMMON_CLK_MT8365_VDEC=y +CONFIG_COMMON_CLK_MT8365_VENC=y CONFIG_COMMON_CLK_MT8516=y # CONFIG_COMMON_CLK_MT8516_AUDSYS is not set # end of Clock driver for MediaTek SoC @@ -6299,6 +6388,7 @@ CONFIG_CLK_RK3368=y CONFIG_CLK_RK3399=y CONFIG_CLK_RK3568=y # CONFIG_XILINX_VCU is not set +# CONFIG_COMMON_CLK_XLNX_CLKWZRD is not set CONFIG_HWSPINLOCK=y # @@ -6340,6 +6430,7 @@ CONFIG_IOMMU_IO_PGTABLE_LPAE=y # CONFIG_IOMMU_IO_PGTABLE_LPAE_SELFTEST is not set CONFIG_IOMMU_IO_PGTABLE_ARMV7S=y # CONFIG_IOMMU_IO_PGTABLE_ARMV7S_SELFTEST is not set +# CONFIG_IOMMU_IO_PGTABLE_DART is not set # end of Generic IOMMU Pagetable Support # CONFIG_IOMMU_DEBUGFS is not set @@ -6407,6 +6498,11 @@ CONFIG_SOUNDWIRE_QCOM=m CONFIG_FSL_RCPM=y # end of NXP/Freescale QorIQ SoC drivers +# +# fujitsu SoC drivers +# +# end of fujitsu SoC drivers + # # i.MX SoC drivers # @@ -6428,6 +6524,7 @@ CONFIG_MTK_PMIC_WRAP=y CONFIG_MTK_SCPSYS=y CONFIG_MTK_SCPSYS_PM_DOMAINS=y CONFIG_MTK_MMSYS=y +CONFIG_MTK_SVS=y # end of MediaTek SoC drivers # @@ -6460,7 +6557,7 @@ CONFIG_DEVFREQ_GOV_PASSIVE=y # # DEVFREQ Drivers # -CONFIG_ARM_MT8183_CCI_DEVFREQ=y +# CONFIG_ARM_MEDIATEK_CCI_DEVFREQ is not set CONFIG_ARM_RK3399_DMC_DEVFREQ=m CONFIG_PM_DEVFREQ_EVENT=y CONFIG_DEVFREQ_EVENT_ROCKCHIP_DFI=m @@ -6535,6 +6632,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_MMA8452 is not set # CONFIG_MMA9551 is not set # CONFIG_MMA9553 is not set +# CONFIG_MSA311 is not set # CONFIG_MXC4005 is not set # CONFIG_MXC6255 is not set # CONFIG_SCA3000 is not set @@ -6581,6 +6679,7 @@ CONFIG_IIO_CONSUMERS_PER_TRIGGER=2 # CONFIG_MAX1027 is not set # CONFIG_MAX11100 is not set # CONFIG_MAX1118 is not set +# CONFIG_MAX11205 is not set # CONFIG_MAX1241 is not set # CONFIG_MAX1363 is not set CONFIG_MAX9611=m @@ -6595,6 +6694,7 @@ CONFIG_QCOM_VADC_COMMON=m CONFIG_QCOM_SPMI_VADC=m CONFIG_QCOM_SPMI_ADC5=m CONFIG_ROCKCHIP_SARADC=m +# CONFIG_RICHTEK_RTQ6056 is not set # CONFIG_SD_ADC_MODULATOR is not set # CONFIG_TI_ADC081C is not set # CONFIG_TI_ADC0832 is not set @@ -6639,6 +6739,7 @@ CONFIG_TI_ADS1015=m # Capacitance to digital converters # # CONFIG_AD7150 is not set +# CONFIG_AD7746 is not set # end of Capacitance to digital converters # @@ -6813,6 +6914,8 @@ CONFIG_IIO_ST_SENSORS_CORE=m # CONFIG_ADIS16480 is not set # CONFIG_BMI160_I2C is not set # CONFIG_BMI160_SPI is not set +# CONFIG_BOSCH_BNO055_SERIAL is not set +# CONFIG_BOSCH_BNO055_I2C is not set # CONFIG_FXOS8700_I2C is not set # CONFIG_FXOS8700_SPI is not set # CONFIG_KMX61 is not set @@ -6852,6 +6955,7 @@ CONFIG_SENSORS_ISL29018=m # CONFIG_JSA1212 is not set # CONFIG_RPR0521 is not set # CONFIG_LTR501 is not set +# CONFIG_LTRF216A is not set # CONFIG_LV0104CS is not set # CONFIG_MAX44000 is not set # CONFIG_MAX44009 is not set @@ -7013,11 +7117,11 @@ CONFIG_MPL3115=m # end of Temperature sensors # CONFIG_NTB is not set -# CONFIG_VME_BUS is not set CONFIG_PWM=y CONFIG_PWM_SYSFS=y # CONFIG_PWM_DEBUG is not set # CONFIG_PWM_ATMEL_TCB is not set +# CONFIG_PWM_CLK is not set CONFIG_PWM_CROS_EC=y # CONFIG_PWM_DWC is not set # CONFIG_PWM_FSL_FTM is not set @@ -7025,6 +7129,7 @@ CONFIG_PWM_MTK_DISP=y CONFIG_PWM_MEDIATEK=y # CONFIG_PWM_PCA9685 is not set CONFIG_PWM_ROCKCHIP=y +# CONFIG_PWM_XILINX is not set # # IRQ chip support @@ -7037,6 +7142,7 @@ CONFIG_ARM_GIC_V3=y CONFIG_ARM_GIC_V3_ITS=y CONFIG_ARM_GIC_V3_ITS_PCI=y # CONFIG_AL_FIC is not set +# CONFIG_XILINX_INTC is not set CONFIG_PARTITION_PERCPU=y CONFIG_MST_IRQ=y # end of IRQ chip support @@ -7046,6 +7152,7 @@ CONFIG_ARCH_HAS_RESET_CONTROLLER=y CONFIG_RESET_CONTROLLER=y CONFIG_RESET_SCMI=y # CONFIG_RESET_TI_SYSCON is not set +# CONFIG_RESET_TI_TPS380X is not set # # PHY Subsystem @@ -7068,11 +7175,13 @@ CONFIG_PHY_CADENCE_SIERRA=m # CONFIG_PHY_CADENCE_SALVO is not set # CONFIG_PHY_PXA_28NM_HSIC is not set # CONFIG_PHY_PXA_28NM_USB2 is not set +# CONFIG_PHY_MTK_PCIE is not set CONFIG_PHY_MTK_TPHY=y # CONFIG_PHY_MTK_UFS is not set # CONFIG_PHY_MTK_XSPHY is not set CONFIG_PHY_MTK_HDMI=y CONFIG_PHY_MTK_MIPI_DSI=y +# CONFIG_PHY_MTK_DP is not set # CONFIG_PHY_LAN966X_SERDES is not set # CONFIG_PHY_CPCAP_USB is not set # CONFIG_PHY_MAPPHONE_MDM6600 is not set @@ -7088,6 +7197,7 @@ CONFIG_PHY_ROCKCHIP_INNO_USB2=y CONFIG_PHY_ROCKCHIP_INNO_DSIDPHY=m # CONFIG_PHY_ROCKCHIP_NANENG_COMBO_PHY is not set CONFIG_PHY_ROCKCHIP_PCIE=m +# CONFIG_PHY_ROCKCHIP_SNPS_PCIE3 is not set CONFIG_PHY_ROCKCHIP_TYPEC=y CONFIG_PHY_ROCKCHIP_USB=y # CONFIG_PHY_SAMSUNG_USB2 is not set @@ -7107,6 +7217,7 @@ CONFIG_ARM_PMU=y # CONFIG_ARM_DSU_PMU is not set # CONFIG_ARM_SPE_PMU is not set # CONFIG_HISI_PCIE_PMU is not set +# CONFIG_HNS3_PMU is not set # end of Performance monitor support CONFIG_RAS=y @@ -7115,7 +7226,6 @@ CONFIG_RAS=y # # Android # -CONFIG_ANDROID=y CONFIG_ANDROID_BINDER_IPC=y # CONFIG_ANDROID_BINDERFS is not set CONFIG_ANDROID_BINDER_DEVICES="binder,hwbinder,vndbinder" @@ -7127,17 +7237,19 @@ CONFIG_DAX=y # CONFIG_DEV_DAX is not set CONFIG_NVMEM=y CONFIG_NVMEM_SYSFS=y -CONFIG_MTK_EFUSE=y -# CONFIG_NVMEM_SPMI_SDAM is not set -CONFIG_ROCKCHIP_EFUSE=y -# CONFIG_ROCKCHIP_OTP is not set +CONFIG_NVMEM_MTK_EFUSE=y CONFIG_NVMEM_RMEM=m +# CONFIG_NVMEM_ROCKCHIP_EFUSE is not set +# CONFIG_NVMEM_ROCKCHIP_OTP is not set +# CONFIG_NVMEM_SPMI_SDAM is not set +# CONFIG_NVMEM_U_BOOT_ENV is not set # # HW tracing support # # CONFIG_STM is not set # CONFIG_INTEL_TH is not set +# CONFIG_HISI_PTT is not set # end of HW tracing support CONFIG_FPGA=y @@ -7153,15 +7265,10 @@ CONFIG_ALTERA_FREEZE_BRIDGE=m CONFIG_FPGA_REGION=m CONFIG_OF_FPGA_REGION=m # CONFIG_FPGA_DFL is not set +# CONFIG_FPGA_MGR_MICROCHIP_SPI is not set # CONFIG_FSI is not set CONFIG_TEE=y - -# -# TEE drivers -# CONFIG_OPTEE=y -# end of TEE drivers - CONFIG_MULTIPLEXER=m # @@ -7181,6 +7288,7 @@ CONFIG_INTERCONNECT=y # CONFIG_COUNTER is not set # CONFIG_MOST is not set # CONFIG_PECI is not set +# CONFIG_HTE is not set # end of Device Drivers # @@ -7484,6 +7592,7 @@ CONFIG_LSM="landlock,lockdown,yama,loadpin,safesetid,integrity,bpf" # Memory initialization # CONFIG_CC_HAS_AUTO_VAR_INIT_PATTERN=y +CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO_BARE=y CONFIG_CC_HAS_AUTO_VAR_INIT_ZERO=y CONFIG_INIT_STACK_NONE=y # CONFIG_INIT_STACK_ALL_PATTERN is not set @@ -7494,6 +7603,10 @@ CONFIG_INIT_STACK_NONE=y CONFIG_CC_HAS_ZERO_CALL_USED_REGS=y # CONFIG_ZERO_CALL_USED_REGS is not set # end of Memory initialization + +CONFIG_RANDSTRUCT_NONE=y +# CONFIG_RANDSTRUCT_FULL is not set +# CONFIG_RANDSTRUCT_PERFORMANCE is not set # end of Kernel hardening options # end of Security options @@ -7530,6 +7643,7 @@ CONFIG_CRYPTO_NULL2=y # CONFIG_CRYPTO_CRYPTD is not set CONFIG_CRYPTO_AUTHENC=y # CONFIG_CRYPTO_TEST is not set +# end of Crypto core or helper # # Public-key cryptography @@ -7543,73 +7657,15 @@ CONFIG_CRYPTO_ECDH=m # CONFIG_CRYPTO_ECRDSA is not set # CONFIG_CRYPTO_SM2 is not set # CONFIG_CRYPTO_CURVE25519 is not set +# end of Public-key cryptography # -# Authenticated Encryption with Associated Data -# -CONFIG_CRYPTO_CCM=m -CONFIG_CRYPTO_GCM=m -CONFIG_CRYPTO_CHACHA20POLY1305=y -# CONFIG_CRYPTO_AEGIS128 is not set -CONFIG_CRYPTO_SEQIV=m -CONFIG_CRYPTO_ECHAINIV=y - -# -# Block modes -# -CONFIG_CRYPTO_CBC=y -# CONFIG_CRYPTO_CFB is not set -CONFIG_CRYPTO_CTR=m -# CONFIG_CRYPTO_CTS is not set -CONFIG_CRYPTO_ECB=y -# CONFIG_CRYPTO_LRW is not set -# CONFIG_CRYPTO_OFB is not set -# CONFIG_CRYPTO_PCBC is not set -CONFIG_CRYPTO_XTS=y -# CONFIG_CRYPTO_KEYWRAP is not set -CONFIG_CRYPTO_NHPOLY1305=y -CONFIG_CRYPTO_ADIANTUM=y -CONFIG_CRYPTO_ESSIV=y - -# -# Hash modes -# -CONFIG_CRYPTO_CMAC=m -CONFIG_CRYPTO_HMAC=y -# CONFIG_CRYPTO_XCBC is not set -# CONFIG_CRYPTO_VMAC is not set - -# -# Digest -# -CONFIG_CRYPTO_CRC32C=y -CONFIG_CRYPTO_CRC32=y -CONFIG_CRYPTO_XXHASH=y -CONFIG_CRYPTO_BLAKE2B=y -# CONFIG_CRYPTO_BLAKE2S is not set -CONFIG_CRYPTO_CRCT10DIF=y -CONFIG_CRYPTO_CRC64_ROCKSOFT=y -CONFIG_CRYPTO_GHASH=m -CONFIG_CRYPTO_POLY1305=y -# CONFIG_CRYPTO_MD4 is not set -CONFIG_CRYPTO_MD5=y -# CONFIG_CRYPTO_MICHAEL_MIC is not set -# CONFIG_CRYPTO_RMD160 is not set -CONFIG_CRYPTO_SHA1=y -CONFIG_CRYPTO_SHA256=y -CONFIG_CRYPTO_SHA512=y -CONFIG_CRYPTO_SHA3=m -CONFIG_CRYPTO_SM3=m -# CONFIG_CRYPTO_STREEBOG is not set -# CONFIG_CRYPTO_WP512 is not set - -# -# Ciphers +# Block ciphers # CONFIG_CRYPTO_AES=y # CONFIG_CRYPTO_AES_TI is not set # CONFIG_CRYPTO_ANUBIS is not set -# CONFIG_CRYPTO_ARC4 is not set +# CONFIG_CRYPTO_ARIA is not set # CONFIG_CRYPTO_BLOWFISH is not set # CONFIG_CRYPTO_CAMELLIA is not set # CONFIG_CRYPTO_CAST5 is not set @@ -7617,12 +7673,79 @@ CONFIG_CRYPTO_AES=y CONFIG_CRYPTO_DES=m # CONFIG_CRYPTO_FCRYPT is not set # CONFIG_CRYPTO_KHAZAD is not set -CONFIG_CRYPTO_CHACHA20=y # CONFIG_CRYPTO_SEED is not set # CONFIG_CRYPTO_SERPENT is not set CONFIG_CRYPTO_SM4=m +CONFIG_CRYPTO_SM4_GENERIC=m # CONFIG_CRYPTO_TEA is not set # CONFIG_CRYPTO_TWOFISH is not set +# end of Block ciphers + +# +# Length-preserving ciphers and modes +# +CONFIG_CRYPTO_ADIANTUM=y +# CONFIG_CRYPTO_ARC4 is not set +CONFIG_CRYPTO_CHACHA20=y +CONFIG_CRYPTO_CBC=y +# CONFIG_CRYPTO_CFB is not set +CONFIG_CRYPTO_CTR=m +# CONFIG_CRYPTO_CTS is not set +CONFIG_CRYPTO_ECB=y +# CONFIG_CRYPTO_HCTR2 is not set +# CONFIG_CRYPTO_KEYWRAP is not set +# CONFIG_CRYPTO_LRW is not set +# CONFIG_CRYPTO_OFB is not set +# CONFIG_CRYPTO_PCBC is not set +CONFIG_CRYPTO_XTS=y +CONFIG_CRYPTO_NHPOLY1305=y +# end of Length-preserving ciphers and modes + +# +# AEAD (authenticated encryption with associated data) ciphers +# +# CONFIG_CRYPTO_AEGIS128 is not set +CONFIG_CRYPTO_CHACHA20POLY1305=y +CONFIG_CRYPTO_CCM=m +CONFIG_CRYPTO_GCM=m +CONFIG_CRYPTO_SEQIV=m +CONFIG_CRYPTO_ECHAINIV=y +CONFIG_CRYPTO_ESSIV=y +# end of AEAD (authenticated encryption with associated data) ciphers + +# +# Hashes, digests, and MACs +# +CONFIG_CRYPTO_BLAKE2B=y +CONFIG_CRYPTO_CMAC=m +CONFIG_CRYPTO_GHASH=m +CONFIG_CRYPTO_HMAC=y +# CONFIG_CRYPTO_MD4 is not set +CONFIG_CRYPTO_MD5=y +# CONFIG_CRYPTO_MICHAEL_MIC is not set +CONFIG_CRYPTO_POLY1305=y +# CONFIG_CRYPTO_RMD160 is not set +CONFIG_CRYPTO_SHA1=y +CONFIG_CRYPTO_SHA256=y +CONFIG_CRYPTO_SHA512=y +CONFIG_CRYPTO_SHA3=m +CONFIG_CRYPTO_SM3=m +CONFIG_CRYPTO_SM3_GENERIC=m +# CONFIG_CRYPTO_STREEBOG is not set +# CONFIG_CRYPTO_VMAC is not set +# CONFIG_CRYPTO_WP512 is not set +# CONFIG_CRYPTO_XCBC is not set +CONFIG_CRYPTO_XXHASH=y +# end of Hashes, digests, and MACs + +# +# CRCs (cyclic redundancy checks) +# +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRCT10DIF=y +CONFIG_CRYPTO_CRC64_ROCKSOFT=y +# end of CRCs (cyclic redundancy checks) # # Compression @@ -7633,9 +7756,10 @@ CONFIG_CRYPTO_842=y CONFIG_CRYPTO_LZ4=y CONFIG_CRYPTO_LZ4HC=y CONFIG_CRYPTO_ZSTD=y +# end of Compression # -# Random Number Generation +# Random number generation # CONFIG_CRYPTO_ANSI_CPRNG=y CONFIG_CRYPTO_DRBG_MENU=y @@ -7645,6 +7769,11 @@ CONFIG_CRYPTO_DRBG_HMAC=y CONFIG_CRYPTO_DRBG=y CONFIG_CRYPTO_JITTERENTROPY=y CONFIG_CRYPTO_KDF800108_CTR=y +# end of Random number generation + +# +# Userspace interface +# CONFIG_CRYPTO_USER_API=y CONFIG_CRYPTO_USER_API_HASH=y CONFIG_CRYPTO_USER_API_SKCIPHER=y @@ -7652,11 +7781,49 @@ CONFIG_CRYPTO_USER_API_RNG=m # CONFIG_CRYPTO_USER_API_RNG_CAVP is not set # CONFIG_CRYPTO_USER_API_AEAD is not set CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE=y +# end of Userspace interface + CONFIG_CRYPTO_HASH_INFO=y +CONFIG_CRYPTO_NHPOLY1305_NEON=y +CONFIG_CRYPTO_CHACHA20_NEON=y + +# +# Accelerated Cryptographic Algorithms for CPU (arm64) +# +CONFIG_CRYPTO_GHASH_ARM64_CE=y +CONFIG_CRYPTO_POLY1305_NEON=m +CONFIG_CRYPTO_SHA1_ARM64_CE=y +CONFIG_CRYPTO_SHA256_ARM64=y +CONFIG_CRYPTO_SHA2_ARM64_CE=y +CONFIG_CRYPTO_SHA512_ARM64=m +CONFIG_CRYPTO_SHA512_ARM64_CE=m +CONFIG_CRYPTO_SHA3_ARM64=m +# CONFIG_CRYPTO_SM3_NEON is not set +CONFIG_CRYPTO_SM3_ARM64_CE=m +# CONFIG_CRYPTO_POLYVAL_ARM64_CE is not set +# CONFIG_CRYPTO_AES_ARM64 is not set +CONFIG_CRYPTO_AES_ARM64_CE=y +CONFIG_CRYPTO_AES_ARM64_CE_BLK=y +CONFIG_CRYPTO_AES_ARM64_NEON_BLK=y +CONFIG_CRYPTO_AES_ARM64_BS=y +# CONFIG_CRYPTO_SM4_ARM64_CE is not set +# CONFIG_CRYPTO_SM4_ARM64_CE_BLK is not set +# CONFIG_CRYPTO_SM4_ARM64_NEON_BLK is not set +CONFIG_CRYPTO_AES_ARM64_CE_CCM=y +CONFIG_CRYPTO_CRCT10DIF_ARM64_CE=y +# end of Accelerated Cryptographic Algorithms for CPU (arm64) + CONFIG_CRYPTO_HW=y # CONFIG_CRYPTO_DEV_ATMEL_ECC is not set # CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set # CONFIG_CRYPTO_DEV_CCP is not set +# CONFIG_CRYPTO_DEV_QAT_DH895xCC is not set +# CONFIG_CRYPTO_DEV_QAT_C3XXX is not set +# CONFIG_CRYPTO_DEV_QAT_C62X is not set +# CONFIG_CRYPTO_DEV_QAT_4XXX is not set +# CONFIG_CRYPTO_DEV_QAT_DH895xCCVF is not set +# CONFIG_CRYPTO_DEV_QAT_C3XXXVF is not set +# CONFIG_CRYPTO_DEV_QAT_C62XVF is not set # CONFIG_CRYPTO_DEV_NITROX_CNN55XX is not set # CONFIG_CRYPTO_DEV_CAVIUM_ZIP is not set # CONFIG_CRYPTO_DEV_ROCKCHIP is not set @@ -7672,6 +7839,7 @@ CONFIG_PKCS8_PRIVATE_KEY_PARSER=m CONFIG_PKCS7_MESSAGE_PARSER=y # CONFIG_PKCS7_TEST_KEY is not set # CONFIG_SIGNED_PE_FILE_VERIFICATION is not set +# CONFIG_FIPS_SIGNATURE_SELFTEST is not set # # Certificates for signature checking @@ -7709,6 +7877,7 @@ CONFIG_ARCH_USE_SYM_ANNOTATIONS=y # # Crypto library routines # +CONFIG_CRYPTO_LIB_UTILS=y CONFIG_CRYPTO_LIB_AES=y CONFIG_CRYPTO_LIB_ARC4=m CONFIG_CRYPTO_LIB_BLAKE2S_GENERIC=y @@ -7723,9 +7892,8 @@ CONFIG_CRYPTO_ARCH_HAVE_LIB_POLY1305=m CONFIG_CRYPTO_LIB_POLY1305_GENERIC=y CONFIG_CRYPTO_LIB_POLY1305=m CONFIG_CRYPTO_LIB_CHACHA20POLY1305=m +CONFIG_CRYPTO_LIB_SHA1=y CONFIG_CRYPTO_LIB_SHA256=y -CONFIG_CRYPTO_LIB_SM3=m -CONFIG_CRYPTO_LIB_SM4=m # end of Crypto library routines # CONFIG_CRC_CCITT is not set @@ -7758,6 +7926,7 @@ CONFIG_LZO_DECOMPRESS=y CONFIG_LZ4_COMPRESS=y CONFIG_LZ4HC_COMPRESS=y CONFIG_LZ4_DECOMPRESS=y +CONFIG_ZSTD_COMMON=y CONFIG_ZSTD_COMPRESS=y CONFIG_ZSTD_DECOMPRESS=y CONFIG_XZ_DEC=y @@ -7802,6 +7971,7 @@ CONFIG_DMA_DIRECT_REMAP=y # CONFIG_DMA_API_DEBUG is not set # CONFIG_DMA_MAP_BENCHMARK is not set CONFIG_SGL_ALLOC=y +# CONFIG_FORCE_NR_CPUS is not set CONFIG_CPU_RMAP=y CONFIG_DQL=y CONFIG_GLOB=y @@ -7823,9 +7993,11 @@ CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y CONFIG_SG_POOL=y CONFIG_ARCH_STACKWALK=y +CONFIG_STACKDEPOT=y CONFIG_SBITMAP=y # end of Library routines +CONFIG_GENERIC_IOREMAP=y CONFIG_GENERIC_LIB_DEVMEM_IS_ALLOWED=y # @@ -7854,6 +8026,7 @@ CONFIG_DEBUG_MISC=y # # Compile-time checks and compiler options # +CONFIG_AS_HAS_NON_CONST_LEB128=y CONFIG_DEBUG_INFO_NONE=y # CONFIG_DEBUG_INFO_DWARF_TOOLCHAIN_DEFAULT is not set # CONFIG_DEBUG_INFO_DWARF4 is not set @@ -7892,6 +8065,7 @@ CONFIG_HAVE_KCSAN_COMPILER=y # # CONFIG_NET_DEV_REFCNT_TRACKER is not set # CONFIG_NET_NS_REFCNT_TRACKER is not set +# CONFIG_DEBUG_NET is not set # end of Networking Debugging # @@ -7899,7 +8073,10 @@ CONFIG_HAVE_KCSAN_COMPILER=y # # CONFIG_PAGE_EXTENSION is not set # CONFIG_DEBUG_PAGEALLOC is not set +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_DEBUG_ON is not set # CONFIG_PAGE_OWNER is not set +# CONFIG_PAGE_TABLE_CHECK is not set # CONFIG_PAGE_POISONING is not set # CONFIG_DEBUG_RODATA_TEST is not set CONFIG_ARCH_HAS_DEBUG_WX=y @@ -7907,8 +8084,7 @@ CONFIG_ARCH_HAS_DEBUG_WX=y CONFIG_GENERIC_PTDUMP=y # CONFIG_PTDUMP_DEBUGFS is not set # CONFIG_DEBUG_OBJECTS is not set -# CONFIG_SLUB_DEBUG_ON is not set -# CONFIG_SLUB_STATS is not set +# CONFIG_SHRINKER_DEBUG is not set CONFIG_HAVE_DEBUG_KMEMLEAK=y # CONFIG_DEBUG_KMEMLEAK is not set # CONFIG_DEBUG_STACK_USAGE is not set @@ -7978,7 +8154,7 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y # end of Lock Debugging (spinlocks, mutexes, etc...) # CONFIG_DEBUG_IRQFLAGS is not set -# CONFIG_STACKTRACE is not set +CONFIG_STACKTRACE=y # CONFIG_WARN_ALL_UNSEEDED_RANDOM is not set # CONFIG_DEBUG_KOBJECT is not set @@ -7990,6 +8166,7 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y # CONFIG_DEBUG_SG is not set # CONFIG_DEBUG_NOTIFIERS is not set # CONFIG_BUG_ON_DATA_CORRUPTION is not set +# CONFIG_DEBUG_MAPLE_TREE is not set # end of Debug kernel data structures # CONFIG_DEBUG_CREDENTIALS is not set @@ -8001,6 +8178,7 @@ CONFIG_LOCK_DEBUGGING_SUPPORT=y # CONFIG_RCU_TORTURE_TEST is not set # CONFIG_RCU_REF_SCALE_TEST is not set CONFIG_RCU_CPU_STALL_TIMEOUT=21 +CONFIG_RCU_EXP_CPU_STALL_TIMEOUT=0 CONFIG_RCU_TRACE=y # CONFIG_RCU_EQS_DEBUG is not set # end of RCU Debugging @@ -8043,4 +8221,9 @@ CONFIG_CC_HAS_SANCOV_TRACE_PC=y CONFIG_ARCH_USE_MEMTEST=y CONFIG_MEMTEST=y # end of Kernel Testing and Coverage + +# +# Rust hacking +# +# end of Rust hacking # end of Kernel hacking diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-improved-kukui.gpu.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-improved-kukui.gpu.patch deleted file mode 100644 index 2dd2f708d..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-improved-kukui.gpu.patch +++ /dev/null @@ -1,39 +0,0 @@ -this patch is based on: - -https://pastebin.com/kwNHAdhu -via: https://oftc.irclog.whitequark.org/panfrost/2022-05-09#30915485 - -as it is supposed to be an improved version of the older and known to -be broken gpu freq scaling code from cadmium - -diff -Nur linux-kukui/arch/arm64/boot/dts/mediatek/mt8183.dtsi linux-kukui-gud/arch/arm64/boot/dts/mediatek/mt8183.dtsi ---- linux-kukui/arch/arm64/boot/dts/mediatek/mt8183.dtsi 2021-07-13 17:16:13.752666183 +0200 -+++ linux-kukui-gud/arch/arm64/boot/dts/mediatek/mt8183.dtsi 2021-07-13 17:01:43.516154051 +0200 -@@ -1581,7 +1581,15 @@ - ; - interrupt-names = "job", "mmu", "gpu"; - -- clocks = <&topckgen CLK_TOP_MFGPLL_CK>; -+ clocks = <&topckgen CLK_TOP_MFGPLL_CK>, -+ <&topckgen CLK_TOP_MUX_MFG>, -+ <&clk26m>, -+ <&mfgcfg CLK_MFG_BG3D>; -+ clock-names = -+ "clk_main_parent", -+ "clk_mux", -+ "clk_sub_parent", -+ "subsys_mfg_cg"; - - power-domains = - <&spm MT8183_POWER_DOMAIN_MFG_CORE0>, -diff -Nur linux-kukui/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi linux-kukui-gud/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi ---- linux-kukui/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi 2021-07-13 17:16:13.756666129 +0200 -+++ linux-kukui-gud/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi 2021-07-13 16:53:12.906778709 +0200 -@@ -295,6 +295,7 @@ - }; - - &gpu { -+ supply-names = "mali", "sram"; - mali-supply = <&mt6358_vgpu_reg>; - sram-supply = <&mt6358_vsram_gpu_reg>; - }; diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-improved-kukui.opp-multi-regulator.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-improved-kukui.opp-multi-regulator.patch deleted file mode 100644 index 7d5692e43..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-improved-kukui.opp-multi-regulator.patch +++ /dev/null @@ -1,162 +0,0 @@ -this patch is based on: - -https://pastebin.com/kwNHAdhu -via: https://oftc.irclog.whitequark.org/panfrost/2022-05-09#30915485 - -as it is supposed to be an improved version of the older and known to -be broken gpu freq scaling code from cadmium - -diff --git a/drivers/gpu/drm/panfrost/panfrost_devfreq.c b/drivers/gpu/drm/panfrost/panfrost_devfreq.c -index acce9d02dba0..9641769c64d1 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_devfreq.c -+++ b/drivers/gpu/drm/panfrost/panfrost_devfreq.c -@@ -29,13 +29,34 @@ static int panfrost_devfreq_target(struct device *dev, unsigned long *freq, - u32 flags) - { - struct dev_pm_opp *opp; -+ struct panfrost_device *pfdev = dev_get_drvdata(dev); -+ int ret, err; -+ char needs_reparenting = pfdev->mtk_clk_mux != NULL; - - opp = devfreq_recommended_opp(dev, freq, flags); - if (IS_ERR(opp)) - return PTR_ERR(opp); - dev_pm_opp_put(opp); - -- return dev_pm_opp_set_rate(dev, *freq); -+ if (needs_reparenting) { -+ err = clk_set_parent(pfdev->mtk_clk_mux, pfdev->mtk_clk_sub); -+ if (err) { -+ DRM_DEV_ERROR(dev, "Failed to select sub clock source\n"); -+ return err; -+ } -+ } -+ -+ ret = dev_pm_opp_set_rate(dev, *freq); -+ -+ if (needs_reparenting) { -+ err = clk_set_parent(pfdev->mtk_clk_mux, pfdev->mtk_clk_parent); -+ if (err) { -+ DRM_DEV_ERROR(dev, "Failed to select main clock source\n"); -+ return err; -+ } -+ } -+ -+ return ret; - } - - static void panfrost_devfreq_reset(struct panfrost_devfreq *pfdevfreq) -@@ -91,16 +112,7 @@ int panfrost_devfreq_init(struct panfrost_device *pfdev) - struct devfreq *devfreq; - struct opp_table *opp_table; - struct thermal_cooling_device *cooling; -- struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; -- -- if (pfdev->comp->num_supplies > 1) { -- /* -- * GPUs with more than 1 supply require platform-specific handling: -- * continue without devfreq -- */ -- DRM_DEV_INFO(dev, "More than 1 supply is not supported yet\n"); -- return 0; -- } -+ struct panfrost_devfreq *pfdevfreq = &pfdev->pfdevfreq; - - opp_table = dev_pm_opp_set_regulators(dev, pfdev->comp->supply_names, - pfdev->comp->num_supplies); -diff --git a/drivers/gpu/drm/panfrost/panfrost_device.c b/drivers/gpu/drm/panfrost/panfrost_device.c -index a2a09c51eed7..b77d738c7fb8 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_device.c -+++ b/drivers/gpu/drm/panfrost/panfrost_device.c -@@ -67,6 +67,32 @@ static int panfrost_clk_init(struct panfrost_device *pfdev) - goto disable_clock; - } - -+ pfdev->mtk_clk_mux = devm_clk_get_optional(pfdev->dev, "clk_mux"); -+ if (pfdev->mtk_clk_mux) { -+ if (IS_ERR(pfdev->mtk_clk_mux)) { -+ dev_err(pfdev->dev, "get clk_mux failed %ld\n", -+ PTR_ERR(pfdev->mtk_clk_mux)); -+ err = PTR_ERR(pfdev->mtk_clk_mux); -+ goto disable_clock; -+ } -+ -+ pfdev->mtk_clk_parent = devm_clk_get(pfdev->dev, "clk_main_parent"); -+ if (IS_ERR(pfdev->mtk_clk_parent)) { -+ dev_err(pfdev->dev, "get clk_main_parent failed %ld\n", -+ PTR_ERR(pfdev->mtk_clk_parent)); -+ err = PTR_ERR(pfdev->mtk_clk_parent); -+ goto disable_clock; -+ } -+ -+ pfdev->mtk_clk_sub = devm_clk_get(pfdev->dev, "clk_sub_parent"); -+ if (IS_ERR(pfdev->mtk_clk_sub)) { -+ dev_err(pfdev->dev, "get clk_sub_parent failed %ld\n", -+ PTR_ERR(pfdev->mtk_clk_sub)); -+ err = PTR_ERR(pfdev->mtk_clk_sub); -+ goto disable_clock; -+ } -+ } -+ - return 0; - - disable_clock: -diff --git a/drivers/gpu/drm/panfrost/panfrost_device.h b/drivers/gpu/drm/panfrost/panfrost_device.h -index 8b2cdb8c701d..410b6099fea9 100644 ---- a/drivers/gpu/drm/panfrost/panfrost_device.h -+++ b/drivers/gpu/drm/panfrost/panfrost_device.h -@@ -84,6 +84,9 @@ struct panfrost_device { - void __iomem *iomem; - struct clk *clock; - struct clk *bus_clock; -+ struct clk *mtk_clk_mux; -+ struct clk *mtk_clk_parent; -+ struct clk *mtk_clk_sub; - struct regulator_bulk_data *regulators; - struct reset_control *rstc; - /* pm_domains for devices with more than one. */ -diff --git a/drivers/opp/core.c b/drivers/opp/core.c -index 65df3a106cf5..a3534dd83a00 100644 ---- a/drivers/opp/core.c -+++ b/drivers/opp/core.c -@@ -784,18 +784,15 @@ static int _generic_set_opp_regulator(struct opp_table *opp_table, - struct regulator *reg = opp_table->regulators[0]; - struct dev_pm_opp *old_opp = opp_table->current_opp; - int ret; -- -- /* This function only supports single regulator per device */ -- if (WARN_ON(opp_table->regulator_count > 1)) { -- dev_err(dev, "multiple regulators are not supported\n"); -- return -EINVAL; -- } -+ unsigned i; - - /* Scaling up? Scale voltage before frequency */ - if (!scaling_down) { -- ret = _set_opp_voltage(dev, reg, opp->supplies); -- if (ret) -- goto restore_voltage; -+ for (i = 0; i < opp_table->regulator_count; i++) { -+ ret = _set_opp_voltage(dev, opp_table->regulators[i], &opp->supplies[i]); -+ if (ret) -+ goto restore_voltage; -+ } - } - - /* Change frequency */ -@@ -805,9 +802,11 @@ static int _generic_set_opp_regulator(struct opp_table *opp_table, - - /* Scaling down? Scale voltage after frequency */ - if (scaling_down) { -- ret = _set_opp_voltage(dev, reg, opp->supplies); -- if (ret) -- goto restore_freq; -+ for (i = 0; i < opp_table->regulator_count; i++) { -+ ret = _set_opp_voltage(dev, opp_table->regulators[i], &opp->supplies[i]); -+ if (ret) -+ goto restore_freq; -+ } - } - - /* --- diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-1.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-1.patch deleted file mode 100644 index 9503bfb8e..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-1.patch +++ /dev/null @@ -1,457 +0,0 @@ -diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig -index 00704efe6398..f56132b0ae64 100644 ---- a/drivers/devfreq/Kconfig -+++ b/drivers/devfreq/Kconfig -@@ -73,6 +73,8 @@ config DEVFREQ_GOV_PASSIVE - device. This governor does not change the frequency by itself - through sysfs entries. The passive governor recommends that - devfreq device uses the OPP table to get the frequency/voltage. -+ Alternatively the governor can also be chosen to scale based on -+ the online CPUs current frequency. - - comment "DEVFREQ Drivers" - -diff --git a/drivers/devfreq/governor_passive.c b/drivers/devfreq/governor_passive.c -index b094132bd20b..9cc57b083839 100644 ---- a/drivers/devfreq/governor_passive.c -+++ b/drivers/devfreq/governor_passive.c -@@ -8,11 +8,103 @@ - */ - - #include -+#include -+#include -+#include - #include - #include -+#include - #include "governor.h" - --static int devfreq_passive_get_target_freq(struct devfreq *devfreq, -+struct devfreq_cpu_state { -+ unsigned int curr_freq; -+ unsigned int min_freq; -+ unsigned int max_freq; -+ unsigned int first_cpu; -+ struct device *cpu_dev; -+ struct opp_table *opp_table; -+}; -+ -+static unsigned long xlate_cpufreq_to_devfreq(struct devfreq_passive_data *data, -+ unsigned int cpu) -+{ -+ unsigned int cpu_min_freq, cpu_max_freq, cpu_curr_freq_khz, cpu_percent; -+ unsigned long dev_min_freq, dev_max_freq, dev_max_state; -+ -+ struct devfreq_cpu_state *cpu_state = data->cpu_state[cpu]; -+ struct devfreq *devfreq = (struct devfreq *)data->this; -+ unsigned long *dev_freq_table = devfreq->profile->freq_table; -+ struct dev_pm_opp *opp = NULL, *p_opp = NULL; -+ unsigned long cpu_curr_freq, freq; -+ -+ if (!cpu_state || cpu_state->first_cpu != cpu || -+ !cpu_state->opp_table || !devfreq->opp_table) -+ return 0; -+ -+ cpu_curr_freq = cpu_state->curr_freq * 1000; -+ p_opp = devfreq_recommended_opp(cpu_state->cpu_dev, &cpu_curr_freq, 0); -+ if (IS_ERR(p_opp)) -+ return 0; -+ -+ opp = dev_pm_opp_xlate_required_opp(cpu_state->opp_table, -+ devfreq->opp_table, p_opp); -+ dev_pm_opp_put(p_opp); -+ -+ if (!IS_ERR(opp)) { -+ freq = dev_pm_opp_get_freq(opp); -+ dev_pm_opp_put(opp); -+ goto out; -+ } -+ -+ /* Use Interpolation if required opps is not available */ -+ cpu_min_freq = cpu_state->min_freq; -+ cpu_max_freq = cpu_state->max_freq; -+ cpu_curr_freq_khz = cpu_state->curr_freq; -+ -+ if (dev_freq_table) { -+ /* Get minimum frequency according to sorting order */ -+ dev_max_state = dev_freq_table[devfreq->profile->max_state - 1]; -+ if (dev_freq_table[0] < dev_max_state) { -+ dev_min_freq = dev_freq_table[0]; -+ dev_max_freq = dev_max_state; -+ } else { -+ dev_min_freq = dev_max_state; -+ dev_max_freq = dev_freq_table[0]; -+ } -+ } else { -+ dev_min_freq = dev_pm_qos_read_value(devfreq->dev.parent, -+ DEV_PM_QOS_MIN_FREQUENCY); -+ dev_max_freq = dev_pm_qos_read_value(devfreq->dev.parent, -+ DEV_PM_QOS_MAX_FREQUENCY); -+ -+ if (dev_max_freq <= dev_min_freq) -+ return 0; -+ } -+ cpu_percent = ((cpu_curr_freq_khz - cpu_min_freq) * 100) / cpu_max_freq - cpu_min_freq; -+ freq = dev_min_freq + mult_frac(dev_max_freq - dev_min_freq, cpu_percent, 100); -+ -+out: -+ return freq; -+} -+ -+static int get_target_freq_with_cpufreq(struct devfreq *devfreq, -+ unsigned long *freq) -+{ -+ struct devfreq_passive_data *p_data = -+ (struct devfreq_passive_data *)devfreq->data; -+ unsigned int cpu; -+ unsigned long target_freq = 0; -+ -+ for_each_online_cpu(cpu) -+ target_freq = max(target_freq, -+ xlate_cpufreq_to_devfreq(p_data, cpu)); -+ -+ *freq = target_freq; -+ -+ return 0; -+} -+ -+static int get_target_freq_with_devfreq(struct devfreq *devfreq, - unsigned long *freq) - { - struct devfreq_passive_data *p_data -@@ -23,14 +115,6 @@ static int devfreq_passive_get_target_freq(struct devfreq *devfreq, - int i, count; - - /* -- * If the devfreq device with passive governor has the specific method -- * to determine the next frequency, should use the get_target_freq() -- * of struct devfreq_passive_data. -- */ -- if (p_data->get_target_freq) -- return p_data->get_target_freq(devfreq, freq); -- -- /* - * If the parent and passive devfreq device uses the OPP table, - * get the next frequency by using the OPP table. - */ -@@ -98,6 +182,37 @@ static int devfreq_passive_get_target_freq(struct devfreq *devfreq, - return 0; - } - -+static int devfreq_passive_get_target_freq(struct devfreq *devfreq, -+ unsigned long *freq) -+{ -+ struct devfreq_passive_data *p_data = -+ (struct devfreq_passive_data *)devfreq->data; -+ int ret; -+ -+ /* -+ * If the devfreq device with passive governor has the specific method -+ * to determine the next frequency, should use the get_target_freq() -+ * of struct devfreq_passive_data. -+ */ -+ if (p_data->get_target_freq) -+ return p_data->get_target_freq(devfreq, freq); -+ -+ switch (p_data->parent_type) { -+ case DEVFREQ_PARENT_DEV: -+ ret = get_target_freq_with_devfreq(devfreq, freq); -+ break; -+ case CPUFREQ_PARENT_DEV: -+ ret = get_target_freq_with_cpufreq(devfreq, freq); -+ break; -+ default: -+ ret = -EINVAL; -+ dev_err(&devfreq->dev, "Invalid parent type\n"); -+ break; -+ } -+ -+ return ret; -+} -+ - static int devfreq_passive_notifier_call(struct notifier_block *nb, - unsigned long event, void *ptr) - { -@@ -130,16 +245,200 @@ static int devfreq_passive_notifier_call(struct notifier_block *nb, - return NOTIFY_DONE; - } - -+static int cpufreq_passive_notifier_call(struct notifier_block *nb, -+ unsigned long event, void *ptr) -+{ -+ struct devfreq_passive_data *data = -+ container_of(nb, struct devfreq_passive_data, nb); -+ struct devfreq *devfreq = (struct devfreq *)data->this; -+ struct devfreq_cpu_state *cpu_state; -+ struct cpufreq_freqs *cpu_freq = ptr; -+ unsigned int curr_freq; -+ int ret; -+ -+ if (event != CPUFREQ_POSTCHANGE || !cpu_freq || -+ !data->cpu_state[cpu_freq->policy->cpu]) -+ return 0; -+ -+ cpu_state = data->cpu_state[cpu_freq->policy->cpu]; -+ if (cpu_state->curr_freq == cpu_freq->new) -+ return 0; -+ -+ /* Backup current freq and pre-update cpu state freq*/ -+ curr_freq = cpu_state->curr_freq; -+ cpu_state->curr_freq = cpu_freq->new; -+ -+ mutex_lock(&devfreq->lock); -+ ret = update_devfreq(devfreq); -+ mutex_unlock(&devfreq->lock); -+ if (ret) { -+ cpu_state->curr_freq = curr_freq; -+ dev_err(&devfreq->dev, "Couldn't update the frequency.\n"); -+ return ret; -+ } -+ -+ return 0; -+} -+ -+static int cpufreq_passive_register(struct devfreq_passive_data **p_data) -+{ -+ struct devfreq_passive_data *data = *p_data; -+ struct devfreq *devfreq = (struct devfreq *)data->this; -+ struct device *dev = devfreq->dev.parent; -+ struct opp_table *opp_table = NULL; -+ struct devfreq_cpu_state *cpu_state; -+ struct cpufreq_policy *policy; -+ struct device *cpu_dev; -+ unsigned int cpu; -+ int ret; -+ -+ cpus_read_lock(); -+ -+ data->nb.notifier_call = cpufreq_passive_notifier_call; -+ ret = cpufreq_register_notifier(&data->nb, -+ CPUFREQ_TRANSITION_NOTIFIER); -+ if (ret) { -+ dev_err(dev, "Couldn't register cpufreq notifier.\n"); -+ data->nb.notifier_call = NULL; -+ goto out; -+ } -+ -+ /* Populate devfreq_cpu_state */ -+ for_each_online_cpu(cpu) { -+ if (data->cpu_state[cpu]) -+ continue; -+ -+ policy = cpufreq_cpu_get(cpu); -+ if (!policy) { -+ ret = -EINVAL; -+ goto out; -+ } else if (PTR_ERR(policy) == -EPROBE_DEFER) { -+ ret = -EPROBE_DEFER; -+ goto out; -+ } else if (IS_ERR(policy)) { -+ ret = PTR_ERR(policy); -+ dev_err(dev, "Couldn't get the cpufreq_poliy.\n"); -+ goto out; -+ } -+ -+ cpu_state = kzalloc(sizeof(*cpu_state), GFP_KERNEL); -+ if (!cpu_state) { -+ ret = -ENOMEM; -+ goto out; -+ } -+ -+ cpu_dev = get_cpu_device(cpu); -+ if (!cpu_dev) { -+ dev_err(dev, "Couldn't get cpu device.\n"); -+ ret = -ENODEV; -+ goto out; -+ } -+ -+ opp_table = dev_pm_opp_get_opp_table(cpu_dev); -+ if (IS_ERR(devfreq->opp_table)) { -+ ret = PTR_ERR(opp_table); -+ goto out; -+ } -+ -+ cpu_state->cpu_dev = cpu_dev; -+ cpu_state->opp_table = opp_table; -+ cpu_state->first_cpu = cpumask_first(policy->related_cpus); -+ cpu_state->curr_freq = policy->cur; -+ cpu_state->min_freq = policy->cpuinfo.min_freq; -+ cpu_state->max_freq = policy->cpuinfo.max_freq; -+ data->cpu_state[cpu] = cpu_state; -+ -+ cpufreq_cpu_put(policy); -+ } -+ -+out: -+ cpus_read_unlock(); -+ if (ret) -+ return ret; -+ -+ /* Update devfreq */ -+ mutex_lock(&devfreq->lock); -+ ret = update_devfreq(devfreq); -+ mutex_unlock(&devfreq->lock); -+ if (ret) -+ dev_err(dev, "Couldn't update the frequency.\n"); -+ -+ return ret; -+} -+ -+static int cpufreq_passive_unregister(struct devfreq_passive_data **p_data) -+{ -+ struct devfreq_passive_data *data = *p_data; -+ struct devfreq_cpu_state *cpu_state; -+ int cpu; -+ -+ if (data->nb.notifier_call) -+ cpufreq_unregister_notifier(&data->nb, -+ CPUFREQ_TRANSITION_NOTIFIER); -+ -+ for_each_possible_cpu(cpu) { -+ cpu_state = data->cpu_state[cpu]; -+ if (cpu_state) { -+ if (cpu_state->opp_table) -+ dev_pm_opp_put_opp_table(cpu_state->opp_table); -+ kfree(cpu_state); -+ cpu_state = NULL; -+ } -+ } -+ -+ return 0; -+} -+ -+int register_parent_dev_notifier(struct devfreq_passive_data **p_data) -+{ -+ struct notifier_block *nb = &(*p_data)->nb; -+ int ret = 0; -+ -+ switch ((*p_data)->parent_type) { -+ case DEVFREQ_PARENT_DEV: -+ nb->notifier_call = devfreq_passive_notifier_call; -+ ret = devfreq_register_notifier((struct devfreq *)(*p_data)->parent, nb, -+ DEVFREQ_TRANSITION_NOTIFIER); -+ break; -+ case CPUFREQ_PARENT_DEV: -+ ret = cpufreq_passive_register(p_data); -+ break; -+ default: -+ ret = -EINVAL; -+ break; -+ } -+ return ret; -+} -+ -+int unregister_parent_dev_notifier(struct devfreq_passive_data **p_data) -+{ -+ int ret = 0; -+ -+ switch ((*p_data)->parent_type) { -+ case DEVFREQ_PARENT_DEV: -+ WARN_ON(devfreq_unregister_notifier((struct devfreq *)(*p_data)->parent, -+ &(*p_data)->nb, -+ DEVFREQ_TRANSITION_NOTIFIER)); -+ break; -+ case CPUFREQ_PARENT_DEV: -+ cpufreq_passive_unregister(p_data); -+ break; -+ default: -+ ret = -EINVAL; -+ break; -+ } -+ return ret; -+} -+ - static int devfreq_passive_event_handler(struct devfreq *devfreq, - unsigned int event, void *data) - { - struct devfreq_passive_data *p_data - = (struct devfreq_passive_data *)devfreq->data; - struct devfreq *parent = (struct devfreq *)p_data->parent; -- struct notifier_block *nb = &p_data->nb; - int ret = 0; - -- if (!parent) -+ if (p_data->parent_type == DEVFREQ_PARENT_DEV && !parent) - return -EPROBE_DEFER; - - switch (event) { -@@ -147,13 +446,11 @@ static int devfreq_passive_event_handler(struct devfreq *devfreq, - if (!p_data->this) - p_data->this = devfreq; - -- nb->notifier_call = devfreq_passive_notifier_call; -- ret = devfreq_register_notifier(parent, nb, -- DEVFREQ_TRANSITION_NOTIFIER); -+ ret = register_parent_dev_notifier(&p_data); - break; -+ - case DEVFREQ_GOV_STOP: -- WARN_ON(devfreq_unregister_notifier(parent, nb, -- DEVFREQ_TRANSITION_NOTIFIER)); -+ ret = unregister_parent_dev_notifier(&p_data); - break; - default: - break; -diff --git a/include/linux/devfreq.h b/include/linux/devfreq.h -index 26ea0850be9b..e0093b7c805c 100644 ---- a/include/linux/devfreq.h -+++ b/include/linux/devfreq.h -@@ -280,6 +280,25 @@ struct devfreq_simple_ondemand_data { - - #if IS_ENABLED(CONFIG_DEVFREQ_GOV_PASSIVE) - /** -+ * struct devfreq_cpu_state - holds the per-cpu state -+ * @freq: the current frequency of the cpu. -+ * @min_freq: the min frequency of the cpu. -+ * @max_freq: the max frequency of the cpu. -+ * @first_cpu: the cpumask of the first cpu of a policy. -+ * @dev: reference to cpu device. -+ * @opp_table: reference to cpu opp table. -+ * -+ * This structure stores the required cpu_state of a cpu. -+ * This is auto-populated by the governor. -+ */ -+struct devfreq_cpu_state; -+ -+enum devfreq_parent_dev_type { -+ DEVFREQ_PARENT_DEV, -+ CPUFREQ_PARENT_DEV, -+}; -+ -+/** - * struct devfreq_passive_data - ``void *data`` fed to struct devfreq - * and devfreq_add_device - * @parent: the devfreq instance of parent device. -@@ -290,13 +309,15 @@ struct devfreq_simple_ondemand_data { - * using governors except for passive governor. - * If the devfreq device has the specific method to decide - * the next frequency, should use this callback. -+ * @parent_type: parent type of the device - * @this: the devfreq instance of own device. - * @nb: the notifier block for DEVFREQ_TRANSITION_NOTIFIER list -+ * @cpu_state: the state min/max/current frequency of all online cpu's - * - * The devfreq_passive_data have to set the devfreq instance of parent - * device with governors except for the passive governor. But, don't need to -- * initialize the 'this' and 'nb' field because the devfreq core will handle -- * them. -+ * initialize the 'this', 'nb' and 'cpu_state' field because the devfreq core -+ * will handle them. - */ - struct devfreq_passive_data { - /* Should set the devfreq instance of parent device */ -@@ -305,9 +326,13 @@ struct devfreq_passive_data { - /* Optional callback to decide the next frequency of passvice device */ - int (*get_target_freq)(struct devfreq *this, unsigned long *freq); - -+ /* Should set the type of parent device */ -+ enum devfreq_parent_dev_type parent_type; -+ - /* For passive governor's internal use. Don't need to set them */ - struct devfreq *this; - struct notifier_block nb; -+ struct devfreq_cpu_state *cpu_state[NR_CPUS]; - }; - #endif - diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-2.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-2.patch deleted file mode 100644 index 43cdfac4b..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-2.patch +++ /dev/null @@ -1,76 +0,0 @@ -diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c -index f2e491b25b07..432368707ea6 100644 ---- a/drivers/cpufreq/mediatek-cpufreq.c -+++ b/drivers/cpufreq/mediatek-cpufreq.c -@@ -350,6 +350,11 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) - ret = PTR_ERR(proc_reg); - goto out_free_resources; - } -+ ret = regulator_enable(proc_reg); -+ if (ret) { -+ pr_warn("enable vproc for cpu%d fail\n", cpu); -+ goto out_free_resources; -+ } - - /* Both presence and absence of sram regulator are valid cases. */ - sram_reg = regulator_get_exclusive(cpu_dev, "sram"); -@@ -368,13 +373,21 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) - goto out_free_resources; - } - -+ ret = clk_prepare_enable(cpu_clk); -+ if (ret) -+ goto out_free_opp_table; -+ -+ ret = clk_prepare_enable(inter_clk); -+ if (ret) -+ goto out_disable_mux_clock; -+ - /* Search a safe voltage for intermediate frequency. */ - rate = clk_get_rate(inter_clk); - opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate); - if (IS_ERR(opp)) { - pr_err("failed to get intermediate opp for cpu%d\n", cpu); - ret = PTR_ERR(opp); -- goto out_free_opp_table; -+ goto out_disable_inter_clock; - } - info->intermediate_voltage = dev_pm_opp_get_voltage(opp); - dev_pm_opp_put(opp); -@@ -393,6 +406,12 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) - - return 0; - -+out_disable_inter_clock: -+ clk_disable_unprepare(inter_clk); -+ -+out_disable_mux_clock: -+ clk_disable_unprepare(cpu_clk); -+ - out_free_opp_table: - dev_pm_opp_of_cpumask_remove_table(&info->cpus); - -@@ -411,14 +430,20 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) - - static void mtk_cpu_dvfs_info_release(struct mtk_cpu_dvfs_info *info) - { -- if (!IS_ERR(info->proc_reg)) -+ if (!IS_ERR(info->proc_reg)) { -+ regulator_disable(info->proc_reg); - regulator_put(info->proc_reg); -+ } - if (!IS_ERR(info->sram_reg)) - regulator_put(info->sram_reg); -- if (!IS_ERR(info->cpu_clk)) -+ if (!IS_ERR(info->cpu_clk)) { -+ clk_disable_unprepare(info->cpu_clk); - clk_put(info->cpu_clk); -- if (!IS_ERR(info->inter_clk)) -+ } -+ if (!IS_ERR(info->inter_clk)) { -+ clk_disable_unprepare(info->inter_clk); - clk_put(info->inter_clk); -+ } - - dev_pm_opp_of_cpumask_remove_table(&info->cpus); - } diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-3.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-3.patch deleted file mode 100644 index 1ddfcb398..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-3.patch +++ /dev/null @@ -1,57 +0,0 @@ -diff --git a/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml b/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml -new file mode 100644 -index 000000000000..a7341fd94097 ---- /dev/null -+++ b/Documentation/devicetree/bindings/devfreq/mt8183-cci.yaml -@@ -0,0 +1,51 @@ -+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -+%YAML 1.2 -+--- -+$id: http://devicetree.org/schemas/devfreq/mt8183-cci.yaml# -+$schema: http://devicetree.org/meta-schemas/core.yaml# -+ -+title: CCI_DEVFREQ driver for MT8183. -+ -+maintainers: -+ - Andrew-sh.Cheng -+ -+description: | -+ This module is used to create CCI DEVFREQ. -+ The performance will depend on both CCI frequency and CPU frequency. -+ For MT8183, CCI co-buck with Little core. -+ Contain CCI opp table for voltage and frequency scaling. -+ -+properties: -+ compatible: -+ const: "mediatek,mt8183-cci" -+ -+ clocks: -+ maxItems: 1 -+ -+ clock-names: -+ const: "cci" -+ -+ operating-points-v2: true -+ opp-table: true -+ -+ proc-supply: -+ description: -+ Phandle of the regulator that provides the supply voltage. -+ -+required: -+ - compatible -+ - clocks -+ - clock-names -+ - proc-supply -+ -+examples: -+ - | -+ #include -+ cci: cci { -+ compatible = "mediatek,mt8183-cci"; -+ clocks = <&apmixedsys CLK_APMIXED_CCIPLL>; -+ clock-names = "cci"; -+ operating-points-v2 = <&cci_opp>; -+ proc-supply = <&mt6358_vproc12_reg>; -+ }; -+ diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-4.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-4.patch deleted file mode 100644 index 339f7999f..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-4.patch +++ /dev/null @@ -1,237 +0,0 @@ -diff --git a/drivers/devfreq/Kconfig b/drivers/devfreq/Kconfig -index f56132b0ae64..2538255ac2c1 100644 ---- a/drivers/devfreq/Kconfig -+++ b/drivers/devfreq/Kconfig -@@ -111,6 +111,16 @@ config ARM_IMX8M_DDRC_DEVFREQ - This adds the DEVFREQ driver for the i.MX8M DDR Controller. It allows - adjusting DRAM frequency. - -+config ARM_MT8183_CCI_DEVFREQ -+ tristate "MT8183 CCI DEVFREQ Driver" -+ depends on ARM_MEDIATEK_CPUFREQ -+ help -+ This adds a devfreq driver for Cache Coherent Interconnect -+ of Mediatek MT8183, which is shared the same regulator -+ with cpu cluster. -+ It can track buck voltage and update a proper CCI frequency. -+ Use notification to get regulator status. -+ - config ARM_TEGRA_DEVFREQ - tristate "NVIDIA Tegra30/114/124/210 DEVFREQ Driver" - depends on ARCH_TEGRA_3x_SOC || ARCH_TEGRA_114_SOC || \ -diff --git a/drivers/devfreq/Makefile b/drivers/devfreq/Makefile -index a16333ea7034..991ef7740759 100644 ---- a/drivers/devfreq/Makefile -+++ b/drivers/devfreq/Makefile -@@ -11,6 +11,7 @@ obj-$(CONFIG_DEVFREQ_GOV_PASSIVE) += governor_passive.o - obj-$(CONFIG_ARM_EXYNOS_BUS_DEVFREQ) += exynos-bus.o - obj-$(CONFIG_ARM_IMX_BUS_DEVFREQ) += imx-bus.o - obj-$(CONFIG_ARM_IMX8M_DDRC_DEVFREQ) += imx8m-ddrc.o -+obj-$(CONFIG_ARM_MT8183_CCI_DEVFREQ) += mt8183-cci-devfreq.o - obj-$(CONFIG_ARM_RK3399_DMC_DEVFREQ) += rk3399_dmc.o - obj-$(CONFIG_ARM_TEGRA_DEVFREQ) += tegra30-devfreq.o - -diff --git a/drivers/devfreq/mt8183-cci-devfreq.c b/drivers/devfreq/mt8183-cci-devfreq.c -new file mode 100644 -index 000000000000..018543db7bae ---- /dev/null -+++ b/drivers/devfreq/mt8183-cci-devfreq.c -@@ -0,0 +1,198 @@ -+// SPDX-License-Identifier: GPL-2.0 -+/* -+ * Copyright (c) 2021 MediaTek Inc. -+ -+ * Author: Andrew-sh.Cheng -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define MAX_VOLT_LIMIT (1150000) -+ -+struct cci_devfreq { -+ struct devfreq *devfreq; -+ struct regulator *cpu_reg; -+ struct clk *cci_clk; -+ int old_vproc; -+ unsigned long old_freq; -+}; -+ -+static int mtk_cci_set_voltage(struct cci_devfreq *cci_df, int vproc) -+{ -+ int ret; -+ -+ ret = regulator_set_voltage(cci_df->cpu_reg, vproc, -+ MAX_VOLT_LIMIT); -+ if (!ret) -+ cci_df->old_vproc = vproc; -+ return ret; -+} -+ -+static int mtk_cci_devfreq_target(struct device *dev, unsigned long *freq, -+ u32 flags) -+{ -+ int ret; -+ struct cci_devfreq *cci_df = dev_get_drvdata(dev); -+ struct dev_pm_opp *opp; -+ unsigned long opp_rate, opp_voltage, old_voltage; -+ -+ if (!cci_df) -+ return -EINVAL; -+ -+ if (cci_df->old_freq == *freq) -+ return 0; -+ -+ opp_rate = *freq; -+ opp = devfreq_recommended_opp(dev, &opp_rate, 1); -+ opp_voltage = dev_pm_opp_get_voltage(opp); -+ dev_pm_opp_put(opp); -+ -+ old_voltage = cci_df->old_vproc; -+ if (old_voltage == 0) -+ old_voltage = regulator_get_voltage(cci_df->cpu_reg); -+ -+ // scale up: set voltage first then freq -+ if (opp_voltage > old_voltage) { -+ ret = mtk_cci_set_voltage(cci_df, opp_voltage); -+ if (ret) { -+ pr_err("cci: failed to scale up voltage\n"); -+ return ret; -+ } -+ } -+ -+ ret = clk_set_rate(cci_df->cci_clk, *freq); -+ if (ret) { -+ pr_err("%s: failed cci to set rate: %d\n", __func__, -+ ret); -+ mtk_cci_set_voltage(cci_df, old_voltage); -+ return ret; -+ } -+ -+ // scale down: set freq first then voltage -+ if (opp_voltage < old_voltage) { -+ ret = mtk_cci_set_voltage(cci_df, opp_voltage); -+ if (ret) { -+ pr_err("cci: failed to scale down voltage\n"); -+ clk_set_rate(cci_df->cci_clk, cci_df->old_freq); -+ return ret; -+ } -+ } -+ -+ cci_df->old_freq = *freq; -+ -+ return 0; -+} -+ -+static struct devfreq_dev_profile cci_devfreq_profile = { -+ .target = mtk_cci_devfreq_target, -+}; -+ -+static int mtk_cci_devfreq_probe(struct platform_device *pdev) -+{ -+ struct device *cci_dev = &pdev->dev; -+ struct cci_devfreq *cci_df; -+ struct devfreq_passive_data *passive_data; -+ int ret; -+ -+ cci_df = devm_kzalloc(cci_dev, sizeof(*cci_df), GFP_KERNEL); -+ if (!cci_df) -+ return -ENOMEM; -+ -+ cci_df->cci_clk = devm_clk_get(cci_dev, "cci_clock"); -+ ret = PTR_ERR_OR_ZERO(cci_df->cci_clk); -+ if (ret) { -+ if (ret != -EPROBE_DEFER) -+ dev_err(cci_dev, "failed to get clock for CCI: %d\n", -+ ret); -+ return ret; -+ } -+ cci_df->cpu_reg = devm_regulator_get_optional(cci_dev, "proc"); -+ ret = PTR_ERR_OR_ZERO(cci_df->cpu_reg); -+ if (ret) { -+ if (ret != -EPROBE_DEFER) -+ dev_err(cci_dev, "failed to get regulator for CCI: %d\n", -+ ret); -+ return ret; -+ } -+ ret = regulator_enable(cci_df->cpu_reg); -+ if (ret) { -+ dev_err(cci_dev, "enable buck for cci fail\n"); -+ return ret; -+ } -+ -+ ret = dev_pm_opp_of_add_table(cci_dev); -+ if (ret) { -+ dev_err(cci_dev, "Fail to get OPP table for CCI: %d\n", ret); -+ return ret; -+ } -+ -+ platform_set_drvdata(pdev, cci_df); -+ -+ passive_data = devm_kzalloc(cci_dev, sizeof(*passive_data), GFP_KERNEL); -+ if (!passive_data) { -+ ret = -ENOMEM; -+ goto err_opp; -+ } -+ -+ passive_data->parent_type = CPUFREQ_PARENT_DEV; -+ -+ cci_df->devfreq = devm_devfreq_add_device(cci_dev, -+ &cci_devfreq_profile, -+ DEVFREQ_GOV_PASSIVE, -+ passive_data); -+ if (IS_ERR(cci_df->devfreq)) { -+ ret = PTR_ERR(cci_df->devfreq); -+ dev_err(cci_dev, "cannot create cci devfreq device:%d\n", ret); -+ goto err_opp; -+ } -+ -+ return 0; -+ -+err_opp: -+ dev_pm_opp_of_remove_table(cci_dev); -+ return ret; -+} -+ -+static int mtk_cci_devfreq_remove(struct platform_device *pdev) -+{ -+ struct device *cci_dev = &pdev->dev; -+ struct cci_devfreq *cci_df; -+ struct notifier_block *opp_nb; -+ -+ cci_df = platform_get_drvdata(pdev); -+ opp_nb = &cci_df->opp_nb; -+ -+ dev_pm_opp_unregister_notifier(cci_dev, opp_nb); -+ dev_pm_opp_of_remove_table(cci_dev); -+ regulator_disable(cci_df->cpu_reg); -+ -+ return 0; -+} -+ -+static const __maybe_unused struct of_device_id -+ mediatek_cci_of_match[] = { -+ { .compatible = "mediatek,mt8183-cci" }, -+ { }, -+}; -+MODULE_DEVICE_TABLE(of, mediatek_cci_of_match); -+ -+static struct platform_driver cci_devfreq_driver = { -+ .probe = mtk_cci_devfreq_probe, -+ .remove = mtk_cci_devfreq_remove, -+ .driver = { -+ .name = "mediatek-cci-devfreq", -+ .of_match_table = of_match_ptr(mediatek_cci_of_match), -+ }, -+}; -+ -+module_platform_driver(cci_devfreq_driver); -+ -+MODULE_DESCRIPTION("Mediatek CCI devfreq driver"); -+MODULE_AUTHOR("Andrew-sh.Cheng "); -+MODULE_LICENSE("GPL v2"); diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-5.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-5.patch deleted file mode 100644 index e2923a724..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-5.patch +++ /dev/null @@ -1,43 +0,0 @@ -diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c -index 432368707ea6..2a82c36aec21 100644 ---- a/drivers/cpufreq/mediatek-cpufreq.c -+++ b/drivers/cpufreq/mediatek-cpufreq.c -@@ -42,6 +42,7 @@ struct mtk_cpu_dvfs_info { - struct list_head list_head; - int intermediate_voltage; - bool need_voltage_tracking; -+ int old_vproc; - }; - - static LIST_HEAD(dvfs_info_list); -@@ -192,11 +193,16 @@ static int mtk_cpufreq_voltage_tracking(struct mtk_cpu_dvfs_info *info, - - static int mtk_cpufreq_set_voltage(struct mtk_cpu_dvfs_info *info, int vproc) - { -+ int ret; -+ - if (info->need_voltage_tracking) -- return mtk_cpufreq_voltage_tracking(info, vproc); -+ ret = mtk_cpufreq_voltage_tracking(info, vproc); - else -- return regulator_set_voltage(info->proc_reg, vproc, -- vproc + VOLT_TOL); -+ ret = regulator_set_voltage(info->proc_reg, vproc, -+ MAX_VOLT_LIMIT); -+ if (!ret) -+ info->old_vproc = vproc; -+ return ret; - } - - static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, -@@ -214,7 +220,9 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, - inter_vproc = info->intermediate_voltage; - - old_freq_hz = clk_get_rate(cpu_clk); -- old_vproc = regulator_get_voltage(info->proc_reg); -+ old_vproc = info->old_vproc; -+ if (old_vproc == 0) -+ old_vproc = regulator_get_voltage(info->proc_reg); - if (old_vproc < 0) { - pr_err("%s: invalid Vproc value: %d\n", __func__, old_vproc); - return old_vproc; diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-6.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-6.patch deleted file mode 100644 index 3d7a546ad..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-6.patch +++ /dev/null @@ -1,147 +0,0 @@ -diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c -index 2a82c36aec21..1747b03e3059 100644 ---- a/drivers/cpufreq/mediatek-cpufreq.c -+++ b/drivers/cpufreq/mediatek-cpufreq.c -@@ -43,6 +43,10 @@ struct mtk_cpu_dvfs_info { - int intermediate_voltage; - bool need_voltage_tracking; - int old_vproc; -+ struct mutex lock; /* avoid notify and policy race condition */ -+ struct notifier_block opp_nb; -+ int opp_cpu; -+ unsigned long opp_freq; - }; - - static LIST_HEAD(dvfs_info_list); -@@ -239,6 +243,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, - vproc = dev_pm_opp_get_voltage(opp); - dev_pm_opp_put(opp); - -+ mutex_lock(&info->lock); - /* - * If the new voltage or the intermediate voltage is higher than the - * current voltage, scale up voltage first. -@@ -250,6 +255,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, - pr_err("cpu%d: failed to scale up voltage!\n", - policy->cpu); - mtk_cpufreq_set_voltage(info, old_vproc); -+ mutex_unlock(&info->lock); - return ret; - } - } -@@ -261,6 +267,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, - policy->cpu); - mtk_cpufreq_set_voltage(info, old_vproc); - WARN_ON(1); -+ mutex_unlock(&info->lock); - return ret; - } - -@@ -271,6 +278,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, - policy->cpu); - clk_set_parent(cpu_clk, armpll); - mtk_cpufreq_set_voltage(info, old_vproc); -+ mutex_unlock(&info->lock); - return ret; - } - -@@ -281,6 +289,7 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, - policy->cpu); - mtk_cpufreq_set_voltage(info, inter_vproc); - WARN_ON(1); -+ mutex_unlock(&info->lock); - return ret; - } - -@@ -296,15 +305,69 @@ static int mtk_cpufreq_set_target(struct cpufreq_policy *policy, - clk_set_parent(cpu_clk, info->inter_clk); - clk_set_rate(armpll, old_freq_hz); - clk_set_parent(cpu_clk, armpll); -+ mutex_unlock(&info->lock); - return ret; - } - } - -+ info->opp_freq = freq_hz; -+ mutex_unlock(&info->lock); -+ - return 0; - } - - #define DYNAMIC_POWER "dynamic-power-coefficient" - -+static int mtk_cpufreq_opp_notifier(struct notifier_block *nb, -+ unsigned long event, void *data) -+{ -+ struct dev_pm_opp *opp = data; -+ struct dev_pm_opp *new_opp; -+ struct mtk_cpu_dvfs_info *info; -+ unsigned long freq, volt; -+ struct cpufreq_policy *policy; -+ int ret = 0; -+ -+ info = container_of(nb, struct mtk_cpu_dvfs_info, opp_nb); -+ -+ if (event == OPP_EVENT_ADJUST_VOLTAGE) { -+ freq = dev_pm_opp_get_freq(opp); -+ -+ mutex_lock(&info->lock); -+ if (info->opp_freq == freq) { -+ volt = dev_pm_opp_get_voltage(opp); -+ ret = mtk_cpufreq_set_voltage(info, volt); -+ if (ret) -+ dev_err(info->cpu_dev, "failed to scale voltage: %d\n", -+ ret); -+ } -+ mutex_unlock(&info->lock); -+ } else if (event == OPP_EVENT_DISABLE) { -+ freq = dev_pm_opp_get_freq(opp); -+ /* case of current opp item is disabled */ -+ if (info->opp_freq == freq) { -+ freq = 1; -+ new_opp = dev_pm_opp_find_freq_ceil(info->cpu_dev, -+ &freq); -+ if (!IS_ERR(new_opp)) { -+ dev_pm_opp_put(new_opp); -+ policy = cpufreq_cpu_get(info->opp_cpu); -+ if (policy) { -+ cpufreq_driver_target(policy, -+ freq / 1000, -+ CPUFREQ_RELATION_L); -+ cpufreq_cpu_put(policy); -+ } -+ } else { -+ pr_err("%s: all opp items are disabled\n", -+ __func__); -+ } -+ } -+ } -+ -+ return notifier_from_errno(ret); -+} -+ - static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) - { - struct device *cpu_dev; -@@ -400,11 +463,21 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu) - info->intermediate_voltage = dev_pm_opp_get_voltage(opp); - dev_pm_opp_put(opp); - -+ info->opp_cpu = cpu; -+ info->opp_nb.notifier_call = mtk_cpufreq_opp_notifier; -+ ret = dev_pm_opp_register_notifier(cpu_dev, &info->opp_nb); -+ if (ret) { -+ pr_warn("cannot register opp notification\n"); -+ goto out_disable_inter_clock; -+ } -+ -+ mutex_init(&info->lock); - info->cpu_dev = cpu_dev; - info->proc_reg = proc_reg; - info->sram_reg = IS_ERR(sram_reg) ? NULL : sram_reg; - info->cpu_clk = cpu_clk; - info->inter_clk = inter_clk; -+ info->opp_freq = clk_get_rate(cpu_clk); - - /* - * If SRAM regulator is present, software "voltage tracking" is needed diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-7.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-7.patch deleted file mode 100644 index 75da18514..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-7.patch +++ /dev/null @@ -1,65 +0,0 @@ -diff --git a/drivers/devfreq/mt8183-cci-devfreq.c b/drivers/devfreq/mt8183-cci-devfreq.c -index 018543db7bae..6942a48f3f4f 100644 ---- a/drivers/devfreq/mt8183-cci-devfreq.c -+++ b/drivers/devfreq/mt8183-cci-devfreq.c -@@ -21,6 +21,7 @@ struct cci_devfreq { - struct clk *cci_clk; - int old_vproc; - unsigned long old_freq; -+ struct notifier_block opp_nb; - }; - - static int mtk_cci_set_voltage(struct cci_devfreq *cci_df, int vproc) -@@ -89,6 +90,26 @@ static int mtk_cci_devfreq_target(struct device *dev, unsigned long *freq, - return 0; - } - -+static int ccidevfreq_opp_notifier(struct notifier_block *nb, -+ unsigned long event, void *data) -+{ -+ struct dev_pm_opp *opp = data; -+ struct cci_devfreq *cci_df = container_of(nb, struct cci_devfreq, -+ opp_nb); -+ unsigned long freq, volt; -+ -+ if (event == OPP_EVENT_ADJUST_VOLTAGE) { -+ freq = dev_pm_opp_get_freq(opp); -+ /* current opp item is changed */ -+ if (freq == cci_df->old_freq) { -+ volt = dev_pm_opp_get_voltage(opp); -+ mtk_cci_set_voltage(cci_df, volt); -+ } -+ } -+ -+ return 0; -+} -+ - static struct devfreq_dev_profile cci_devfreq_profile = { - .target = mtk_cci_devfreq_target, - }; -@@ -98,12 +119,15 @@ static int mtk_cci_devfreq_probe(struct platform_device *pdev) - struct device *cci_dev = &pdev->dev; - struct cci_devfreq *cci_df; - struct devfreq_passive_data *passive_data; -+ struct notifier_block *opp_nb; - int ret; - - cci_df = devm_kzalloc(cci_dev, sizeof(*cci_df), GFP_KERNEL); - if (!cci_df) - return -ENOMEM; - -+ opp_nb = &cci_df->opp_nb; -+ - cci_df->cci_clk = devm_clk_get(cci_dev, "cci_clock"); - ret = PTR_ERR_OR_ZERO(cci_df->cci_clk); - if (ret) { -@@ -152,6 +176,9 @@ static int mtk_cci_devfreq_probe(struct platform_device *pdev) - goto err_opp; - } - -+ opp_nb->notifier_call = ccidevfreq_opp_notifier; -+ dev_pm_opp_register_notifier(cci_dev, opp_nb); -+ - return 0; - - err_opp: diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-8.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-8.patch deleted file mode 100644 index d85ef5167..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.cci-8.patch +++ /dev/null @@ -1,406 +0,0 @@ -diff --git a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts -index 3249c959f76f..77a591cc09a6 100644 ---- a/arch/arm64/boot/dts/mediatek/mt8183-evb.dts -+++ b/arch/arm64/boot/dts/mediatek/mt8183-evb.dts -@@ -395,6 +395,42 @@ - - }; - -+&cci { -+ proc-supply = <&mt6358_vproc12_reg>; -+}; -+ -+&cpu0 { -+ proc-supply = <&mt6358_vproc12_reg>; -+}; -+ -+&cpu1 { -+ proc-supply = <&mt6358_vproc12_reg>; -+}; -+ -+&cpu2 { -+ proc-supply = <&mt6358_vproc12_reg>; -+}; -+ -+&cpu3 { -+ proc-supply = <&mt6358_vproc12_reg>; -+}; -+ -+&cpu4 { -+ proc-supply = <&mt6358_vproc11_reg>; -+}; -+ -+&cpu5 { -+ proc-supply = <&mt6358_vproc11_reg>; -+}; -+ -+&cpu6 { -+ proc-supply = <&mt6358_vproc11_reg>; -+}; -+ -+&cpu7 { -+ proc-supply = <&mt6358_vproc11_reg>; -+}; -+ - &uart0 { - status = "okay"; - }; -diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi -index ff56bcfa3370..b1c3b88c4ac4 100644 ---- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi -+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi -@@ -217,6 +217,10 @@ - status = "okay"; - }; - -+&cci { -+ proc-supply = <&mt6358_vproc12_reg>; -+}; -+ - &cpu0 { - proc-supply = <&mt6358_vproc12_reg>; - }; -diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi -index 80519a145f13..c3dc87b01067 100644 ---- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi -+++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi -@@ -41,6 +41,251 @@ - rdma1 = &rdma1; - }; - -+ cluster0_opp: opp_table0 { -+ compatible = "operating-points-v2"; -+ opp-shared; -+ opp0_00 { -+ opp-hz = /bits/ 64 <793000000>; -+ opp-microvolt = <650000>; -+ required-opps = <&opp2_00>; -+ }; -+ opp0_01 { -+ opp-hz = /bits/ 64 <910000000>; -+ opp-microvolt = <687500>; -+ required-opps = <&opp2_01>; -+ }; -+ opp0_02 { -+ opp-hz = /bits/ 64 <1014000000>; -+ opp-microvolt = <718750>; -+ required-opps = <&opp2_02>; -+ }; -+ opp0_03 { -+ opp-hz = /bits/ 64 <1131000000>; -+ opp-microvolt = <756250>; -+ required-opps = <&opp2_03>; -+ }; -+ opp0_04 { -+ opp-hz = /bits/ 64 <1248000000>; -+ opp-microvolt = <800000>; -+ required-opps = <&opp2_04>; -+ }; -+ opp0_05 { -+ opp-hz = /bits/ 64 <1326000000>; -+ opp-microvolt = <818750>; -+ required-opps = <&opp2_05>; -+ }; -+ opp0_06 { -+ opp-hz = /bits/ 64 <1417000000>; -+ opp-microvolt = <850000>; -+ required-opps = <&opp2_06>; -+ }; -+ opp0_07 { -+ opp-hz = /bits/ 64 <1508000000>; -+ opp-microvolt = <868750>; -+ required-opps = <&opp2_07>; -+ }; -+ opp0_08 { -+ opp-hz = /bits/ 64 <1586000000>; -+ opp-microvolt = <893750>; -+ required-opps = <&opp2_08>; -+ }; -+ opp0_09 { -+ opp-hz = /bits/ 64 <1625000000>; -+ opp-microvolt = <906250>; -+ required-opps = <&opp2_09>; -+ }; -+ opp0_10 { -+ opp-hz = /bits/ 64 <1677000000>; -+ opp-microvolt = <931250>; -+ required-opps = <&opp2_10>; -+ }; -+ opp0_11 { -+ opp-hz = /bits/ 64 <1716000000>; -+ opp-microvolt = <943750>; -+ required-opps = <&opp2_11>; -+ }; -+ opp0_12 { -+ opp-hz = /bits/ 64 <1781000000>; -+ opp-microvolt = <975000>; -+ required-opps = <&opp2_12>; -+ }; -+ opp0_13 { -+ opp-hz = /bits/ 64 <1846000000>; -+ opp-microvolt = <1000000>; -+ required-opps = <&opp2_13>; -+ }; -+ opp0_14 { -+ opp-hz = /bits/ 64 <1924000000>; -+ opp-microvolt = <1025000>; -+ required-opps = <&opp2_14>; -+ }; -+ opp0_15 { -+ opp-hz = /bits/ 64 <1989000000>; -+ opp-microvolt = <1050000>; -+ required-opps = <&opp2_15>; -+ }; }; -+ -+ cluster1_opp: opp_table1 { -+ compatible = "operating-points-v2"; -+ opp-shared; -+ opp1_00 { -+ opp-hz = /bits/ 64 <793000000>; -+ opp-microvolt = <700000>; -+ required-opps = <&opp2_00>; -+ }; -+ opp1_01 { -+ opp-hz = /bits/ 64 <910000000>; -+ opp-microvolt = <725000>; -+ required-opps = <&opp2_01>; -+ }; -+ opp1_02 { -+ opp-hz = /bits/ 64 <1014000000>; -+ opp-microvolt = <750000>; -+ required-opps = <&opp2_02>; -+ }; -+ opp1_03 { -+ opp-hz = /bits/ 64 <1131000000>; -+ opp-microvolt = <775000>; -+ required-opps = <&opp2_03>; -+ }; -+ opp1_04 { -+ opp-hz = /bits/ 64 <1248000000>; -+ opp-microvolt = <800000>; -+ required-opps = <&opp2_04>; -+ }; -+ opp1_05 { -+ opp-hz = /bits/ 64 <1326000000>; -+ opp-microvolt = <825000>; -+ required-opps = <&opp2_05>; -+ }; -+ opp1_06 { -+ opp-hz = /bits/ 64 <1417000000>; -+ opp-microvolt = <850000>; -+ required-opps = <&opp2_06>; -+ }; -+ opp1_07 { -+ opp-hz = /bits/ 64 <1508000000>; -+ opp-microvolt = <875000>; -+ required-opps = <&opp2_07>; -+ }; -+ opp1_08 { -+ opp-hz = /bits/ 64 <1586000000>; -+ opp-microvolt = <900000>; -+ required-opps = <&opp2_08>; -+ }; -+ opp1_09 { -+ opp-hz = /bits/ 64 <1625000000>; -+ opp-microvolt = <912500>; -+ required-opps = <&opp2_09>; -+ }; -+ opp1_10 { -+ opp-hz = /bits/ 64 <1677000000>; -+ opp-microvolt = <931250>; -+ required-opps = <&opp2_10>; -+ }; -+ opp1_11 { -+ opp-hz = /bits/ 64 <1716000000>; -+ opp-microvolt = <950000>; -+ required-opps = <&opp2_11>; -+ }; -+ opp1_12 { -+ opp-hz = /bits/ 64 <1781000000>; -+ opp-microvolt = <975000>; -+ required-opps = <&opp2_12>; -+ }; -+ opp1_13 { -+ opp-hz = /bits/ 64 <1846000000>; -+ opp-microvolt = <1000000>; -+ required-opps = <&opp2_13>; -+ }; -+ opp1_14 { -+ opp-hz = /bits/ 64 <1924000000>; -+ opp-microvolt = <1025000>; -+ required-opps = <&opp2_14>; -+ }; -+ opp1_15 { -+ opp-hz = /bits/ 64 <1989000000>; -+ opp-microvolt = <1050000>; -+ required-opps = <&opp2_15>; -+ }; -+ }; -+ -+ cci_opp: opp_table2 { -+ compatible = "operating-points-v2"; -+ opp-shared; -+ opp2_00: opp-273000000 { -+ opp-hz = /bits/ 64 <273000000>; -+ opp-microvolt = <650000>; -+ }; -+ opp2_01: opp-338000000 { -+ opp-hz = /bits/ 64 <338000000>; -+ opp-microvolt = <687500>; -+ }; -+ opp2_02: opp-403000000 { -+ opp-hz = /bits/ 64 <403000000>; -+ opp-microvolt = <718750>; -+ }; -+ opp2_03: opp-463000000 { -+ opp-hz = /bits/ 64 <463000000>; -+ opp-microvolt = <756250>; -+ }; -+ opp2_04: opp-546000000 { -+ opp-hz = /bits/ 64 <546000000>; -+ opp-microvolt = <800000>; -+ }; -+ opp2_05: opp-624000000 { -+ opp-hz = /bits/ 64 <624000000>; -+ opp-microvolt = <818750>; -+ }; -+ opp2_06: opp-689000000 { -+ opp-hz = /bits/ 64 <689000000>; -+ opp-microvolt = <850000>; -+ }; -+ opp2_07: opp-767000000 { -+ opp-hz = /bits/ 64 <767000000>; -+ opp-microvolt = <868750>; -+ }; -+ opp2_08: opp-845000000 { -+ opp-hz = /bits/ 64 <845000000>; -+ opp-microvolt = <893750>; -+ }; -+ opp2_09: opp-871000000 { -+ opp-hz = /bits/ 64 <871000000>; -+ opp-microvolt = <906250>; -+ }; -+ opp2_10: opp-923000000 { -+ opp-hz = /bits/ 64 <923000000>; -+ opp-microvolt = <931250>; -+ }; -+ opp2_11: opp-962000000 { -+ opp-hz = /bits/ 64 <962000000>; -+ opp-microvolt = <943750>; -+ }; -+ opp2_12: opp-1027000000 { -+ opp-hz = /bits/ 64 <1027000000>; -+ opp-microvolt = <975000>; -+ }; -+ opp2_13: opp-1092000000 { -+ opp-hz = /bits/ 64 <1092000000>; -+ opp-microvolt = <1000000>; -+ }; -+ opp2_14: opp-1144000000 { -+ opp-hz = /bits/ 64 <1144000000>; -+ opp-microvolt = <1025000>; -+ }; -+ opp2_15: opp-1196000000 { -+ opp-hz = /bits/ 64 <1196000000>; -+ opp-microvolt = <1050000>; -+ }; -+ }; -+ -+ cci: cci { -+ compatible = "mediatek,mt8183-cci"; -+ clocks = <&apmixedsys CLK_APMIXED_CCIPLL>; -+ clock-names = "cci_clock"; -+ operating-points-v2 = <&cci_opp>; -+ }; -+ - cpus { - #address-cells = <1>; - #size-cells = <0>; -@@ -84,6 +329,10 @@ - enable-method = "psci"; - capacity-dmips-mhz = <741>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP0>; -+ clocks = <&mcucfg CLK_MCU_MP0_SEL>, -+ <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; -+ clock-names = "cpu", "intermediate"; -+ operating-points-v2 = <&cluster0_opp>; - dynamic-power-coefficient = <84>; - #cooling-cells = <2>; - }; -@@ -95,6 +344,10 @@ - enable-method = "psci"; - capacity-dmips-mhz = <741>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP0>; -+ clocks = <&mcucfg CLK_MCU_MP0_SEL>, -+ <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; -+ clock-names = "cpu", "intermediate"; -+ operating-points-v2 = <&cluster0_opp>; - dynamic-power-coefficient = <84>; - #cooling-cells = <2>; - }; -@@ -106,6 +359,10 @@ - enable-method = "psci"; - capacity-dmips-mhz = <741>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP0>; -+ clocks = <&mcucfg CLK_MCU_MP0_SEL>, -+ <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; -+ clock-names = "cpu", "intermediate"; -+ operating-points-v2 = <&cluster0_opp>; - dynamic-power-coefficient = <84>; - #cooling-cells = <2>; - }; -@@ -117,6 +374,10 @@ - enable-method = "psci"; - capacity-dmips-mhz = <741>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP0>; -+ clocks = <&mcucfg CLK_MCU_MP0_SEL>, -+ <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; -+ clock-names = "cpu", "intermediate"; -+ operating-points-v2 = <&cluster0_opp>; - dynamic-power-coefficient = <84>; - #cooling-cells = <2>; - }; -@@ -128,6 +389,10 @@ - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP1>; -+ clocks = <&mcucfg CLK_MCU_MP2_SEL>, -+ <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; -+ clock-names = "cpu", "intermediate"; -+ operating-points-v2 = <&cluster1_opp>; - dynamic-power-coefficient = <211>; - #cooling-cells = <2>; - }; -@@ -139,6 +404,10 @@ - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP1>; -+ clocks = <&mcucfg CLK_MCU_MP2_SEL>, -+ <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; -+ clock-names = "cpu", "intermediate"; -+ operating-points-v2 = <&cluster1_opp>; - dynamic-power-coefficient = <211>; - #cooling-cells = <2>; - }; -@@ -150,6 +419,10 @@ - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP1>; -+ clocks = <&mcucfg CLK_MCU_MP2_SEL>, -+ <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; -+ clock-names = "cpu", "intermediate"; -+ operating-points-v2 = <&cluster1_opp>; - dynamic-power-coefficient = <211>; - #cooling-cells = <2>; - }; -@@ -161,6 +434,10 @@ - enable-method = "psci"; - capacity-dmips-mhz = <1024>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP1>; -+ clocks = <&mcucfg CLK_MCU_MP2_SEL>, -+ <&topckgen CLK_TOP_ARMPLL_DIV_PLL1>; -+ clock-names = "cpu", "intermediate"; -+ operating-points-v2 = <&cluster1_opp>; - dynamic-power-coefficient = <211>; - #cooling-cells = <2>; - }; diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.enable-ite.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.enable-ite.patch new file mode 100644 index 000000000..1349dcca7 --- /dev/null +++ b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.enable-ite.patch @@ -0,0 +1,153 @@ +diff -Naur a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi +--- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi 2022-01-29 22:43:21.564586347 +0000 ++++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi 2022-01-29 22:23:29.179058153 +0000 +@@ -1728,6 +1728,17 @@ + phy-names = "dphy"; + }; + ++ dpi0: dpi@14015000 { ++ compatible = "mediatek,mt8183-dpi"; ++ reg = <0 0x14015000 0 0x1000>; ++ interrupts = ; ++ power-domains = <&spm MT8183_POWER_DOMAIN_DISP>; ++ clocks = <&mmsys CLK_MM_DPI_IF>, ++ <&mmsys CLK_MM_DPI_MM>, ++ <&apmixedsys CLK_APMIXED_TVDPLL>; ++ clock-names = "pixel", "engine", "pll"; ++ }; ++ + mutex: mutex@14016000 { + compatible = "mediatek,mt8183-disp-mutex"; + reg = <0 0x14016000 0 0x1000>; +diff -Naur a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi +--- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi 2022-01-29 22:43:21.560586382 +0000 ++++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi 2022-01-29 17:55:54.649273984 +0000 +@@ -266,6 +266,18 @@ + proc-supply = <&mt6358_vproc11_reg>; + }; + ++&dpi0 { ++ pinctrl-names = "default", "dpimode"; ++ pinctrl-0 = <&dpi_pin_default>; ++ pinctrl-1 = <&dpi_pin_func>; ++ status = "okay"; ++ port { ++ dpi_out: endpoint { ++ remote-endpoint = <&it6505_in>; ++ }; ++ }; ++}; ++ + &dsi0 { + status = "okay"; + #address-cells = <1>; +@@ -325,6 +337,28 @@ + clock-frequency = <100000>; + #address-cells = <1>; + #size-cells = <0>; ++ ++ it6505dptx: it6505dptx@5c { ++ afe-setting = <1>; ++ compatible = "ite,it6505"; ++ status = "okay"; ++ interrupt-parent = <&pio>; ++ interrupts = <152 IRQ_TYPE_EDGE_FALLING 152 0>; ++ reg = <0x5c>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&it6505_pins>; ++ ovdd-supply = <&mt6358_vsim2_reg>; ++ pwr18-supply = <&it6505_pp18_reg>; ++ reset-gpios = <&pio 179 1>; ++ hpd-gpios = <&pio 9 0>; ++ extcon = <&usbc_extcon>; ++ no-laneswap; ++ port { ++ it6505_in: endpoint { ++ remote-endpoint = <&dpi_out>; ++ }; ++ }; ++ }; + }; + + &i2c5 { +@@ -473,6 +507,50 @@ + }; + }; + ++ dpi_pin_default: dpi_pin_default { ++ pins_cmd_dat { ++ pinmux = , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ ; ++ drive-strength = ; ++ output-low; ++ }; ++ }; ++ dpi_pin_func: dpi_pin_func { ++ pins_cmd_dat { ++ pinmux = , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ , ++ ; ++ drive-strength = ; ++ }; ++ }; ++ + ec_ap_int_odl: ec_ap_int_odl { + pins1 { + pinmux = ; +@@ -550,6 +628,29 @@ + }; + }; + ++ it6505_pins: it6505_pins { ++ pins_hpd { ++ pinmux = ; ++ input-enable; ++ bias-pull-up; ++ }; ++ pins_int { ++ pinmux = ; ++ input-enable; ++ bias-pull-up; ++ }; ++ pins_power_enable { ++ pinmux = ; ++ output-low; ++ bias-pull-up; ++ }; ++ pins_reset { ++ pinmux = ; ++ output-low; ++ bias-pull-up; ++ }; ++ }; ++ + mmc0_pins_default: mmc0-pins-default { + pins_cmd_dat { + pinmux = , diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.gpu-vsram.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.gpu-vsram.patch deleted file mode 100644 index 2d591a9a5..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.gpu-vsram.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- linux-kukui-new/arch/arm64/boot/dts/mediatek/mt6358.dtsi 2021-06-30 16:08:03.382271887 +0200 -+++ linux-kukui/arch/arm64/boot/dts/mediatek/mt6358.dtsi 2021-06-30 16:10:18.072445277 +0200 -@@ -209,6 +209,7 @@ - - mt6358_vsram_gpu_reg: ldo_vsram_gpu { - regulator-name = "vsram_gpu"; -+ regulator-always-on; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <1293750>; - regulator-ramp-delay = <6250>; diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.move-gpu-opp-to-3.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.move-gpu-opp-to-3.patch deleted file mode 100644 index e9297b467..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.move-gpu-opp-to-3.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- linux-kukui-2/arch/arm64/boot/dts/mediatek/mt8183.dtsi 2021-07-13 17:13:43.706654294 +0200 -+++ linux-kukui/arch/arm64/boot/dts/mediatek/mt8183.dtsi 2021-07-13 17:14:03.978385800 +0200 -@@ -197,7 +197,7 @@ - }; - }; - -- gpu_opp_table: opp_table0 { -+ gpu_opp_table: opp_table3 { - compatible = "operating-points-v2"; - opp-shared; - diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.panel-dts-rotation.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.panel-dts-rotation.patch deleted file mode 100644 index 4a9e60a07..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.panel-dts-rotation.patch +++ /dev/null @@ -1,8 +0,0 @@ ---- linux-kukui/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane-sku176.dts 2021-06-23 21:48:58.128171064 +0200 -+++ linux-kukui-gud/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane-sku176.dts 2021-06-23 18:35:25.532087704 +0200 -@@ -20,4 +20,5 @@ - &panel { - status = "okay"; - compatible = "boe,tv101wum-nl6"; -+ rotation = <270>; - }; diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.panel-dts-rotation_sku0.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.panel-dts-rotation_sku0.patch deleted file mode 100644 index ceb8e1aad..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-cadmium-kukui.panel-dts-rotation_sku0.patch +++ /dev/null @@ -1,8 +0,0 @@ ---- linux-kukui/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane-sku0.dts 2021-06-23 21:48:58.128171064 +0200 -+++ linux-kukui-gud/arch/arm64/boot/dts/mediatek/mt8183-kukui-krane-sku0.dts 2021-06-23 18:35:25.532087704 +0200 -@@ -20,4 +20,5 @@ - &panel { - status = "okay"; - compatible = "auo,kd101n80-45na"; -+ rotation = <270>; - }; diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-fix-audio-module-loading.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-fix-audio-module-loading.patch new file mode 100644 index 000000000..3c030fc3c --- /dev/null +++ b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-fix-audio-module-loading.patch @@ -0,0 +1,110 @@ +from: https://patchwork.kernel.org/project/linux-mediatek/cover/20221107160437.740353-1-nfraprado@collabora.com/ + +diff --git a/sound/soc/mediatek/mt2701/mt2701-cs42448.c b/sound/soc/mediatek/mt2701/mt2701-cs42448.c +index d9fd6eb786aa..08ef109744c7 100644 +--- a/sound/soc/mediatek/mt2701/mt2701-cs42448.c ++++ b/sound/soc/mediatek/mt2701/mt2701-cs42448.c +@@ -418,6 +418,7 @@ static const struct of_device_id mt2701_cs42448_machine_dt_match[] = { + {.compatible = "mediatek,mt2701-cs42448-machine",}, + {} + }; ++MODULE_DEVICE_TABLE(of, mt2701_cs42448_machine_dt_match); + #endif + + static struct platform_driver mt2701_cs42448_machine = { +diff --git a/sound/soc/mediatek/mt2701/mt2701-wm8960.c b/sound/soc/mediatek/mt2701/mt2701-wm8960.c +index 0cdf2ae36243..a184032c15b6 100644 +--- a/sound/soc/mediatek/mt2701/mt2701-wm8960.c ++++ b/sound/soc/mediatek/mt2701/mt2701-wm8960.c +@@ -161,6 +161,7 @@ static const struct of_device_id mt2701_wm8960_machine_dt_match[] = { + {.compatible = "mediatek,mt2701-wm8960-machine",}, + {} + }; ++MODULE_DEVICE_TABLE(of, mt2701_wm8960_machine_dt_match); + #endif + + static struct platform_driver mt2701_wm8960_machine = { +diff --git a/sound/soc/mediatek/mt6797/mt6797-mt6351.c b/sound/soc/mediatek/mt6797/mt6797-mt6351.c +index d2f6213a6bfc..784c201b8fd4 100644 +--- a/sound/soc/mediatek/mt6797/mt6797-mt6351.c ++++ b/sound/soc/mediatek/mt6797/mt6797-mt6351.c +@@ -242,6 +242,7 @@ static const struct of_device_id mt6797_mt6351_dt_match[] = { + {.compatible = "mediatek,mt6797-mt6351-sound",}, + {} + }; ++MODULE_DEVICE_TABLE(of, mt6797_mt6351_dt_match); + #endif + + static struct platform_driver mt6797_mt6351_driver = { +diff --git a/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c b/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c +index 9f22d3939818..0e572fe28c58 100644 +--- a/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c ++++ b/sound/soc/mediatek/mt8183/mt8183-da7219-max98357.c +@@ -842,6 +842,7 @@ static const struct of_device_id mt8183_da7219_max98357_dt_match[] = { + }, + {} + }; ++MODULE_DEVICE_TABLE(of, mt8183_da7219_max98357_dt_match); + #endif + + static struct platform_driver mt8183_da7219_max98357_driver = { +diff --git a/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c b/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c +index a86085223677..8fb473543cf9 100644 +--- a/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c ++++ b/sound/soc/mediatek/mt8183/mt8183-mt6358-ts3a227-max98357.c +@@ -835,6 +835,7 @@ static const struct of_device_id mt8183_mt6358_ts3a227_max98357_dt_match[] = { + }, + {} + }; ++MODULE_DEVICE_TABLE(of, mt8183_mt6358_ts3a227_max98357_dt_match); + #endif + + static struct platform_driver mt8183_mt6358_ts3a227_max98357_driver = { +diff --git a/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c b/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c +index cfca6bdee834..08ff57f7189c 100644 +--- a/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c ++++ b/sound/soc/mediatek/mt8186/mt8186-mt6366-da7219-max98357.c +@@ -1161,6 +1161,7 @@ static const struct of_device_id mt8186_mt6366_da7219_max98357_dt_match[] = { + }, + {} + }; ++MODULE_DEVICE_TABLE(of, mt8186_mt6366_da7219_max98357_dt_match); + #endif + + static struct platform_driver mt8186_mt6366_da7219_max98357_driver = { +diff --git a/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c b/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c +index 16d834f3153d..e59d92e2afa3 100644 +--- a/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c ++++ b/sound/soc/mediatek/mt8186/mt8186-mt6366-rt1019-rt5682s.c +@@ -1237,6 +1237,7 @@ static const struct of_device_id mt8186_mt6366_rt1019_rt5682s_dt_match[] = { + }, + {} + }; ++MODULE_DEVICE_TABLE(of, mt8186_mt6366_rt1019_rt5682s_dt_match); + #endif + + static struct platform_driver mt8186_mt6366_rt1019_rt5682s_driver = { +diff --git a/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c b/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c +index b93c3237ef2d..16660eda577e 100644 +--- a/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c ++++ b/sound/soc/mediatek/mt8192/mt8192-mt6359-rt1015-rt5682.c +@@ -1261,6 +1261,7 @@ static const struct of_device_id mt8192_mt6359_dt_match[] = { + }, + {} + }; ++MODULE_DEVICE_TABLE(of, mt8192_mt6359_dt_match); + #endif + + static const struct dev_pm_ops mt8192_mt6359_pm_ops = { +diff --git a/sound/soc/mediatek/mt8195/mt8195-mt6359.c b/sound/soc/mediatek/mt8195/mt8195-mt6359.c +index 480ed3e08d5b..61be66f47723 100644 +--- a/sound/soc/mediatek/mt8195/mt8195-mt6359.c ++++ b/sound/soc/mediatek/mt8195/mt8195-mt6359.c +@@ -1544,6 +1544,7 @@ static const struct of_device_id mt8195_mt6359_dt_match[] = { + }, + {}, + }; ++MODULE_DEVICE_TABLE(of, mt8195_mt6359_dt_match); + + static struct platform_driver mt8195_mt6359_driver = { + .driver = { diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-kukui-jacuzzi-fix-anx7625-01.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-kukui-jacuzzi-fix-anx7625-01.patch deleted file mode 100644 index 04fd4717a..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-kukui-jacuzzi-fix-anx7625-01.patch +++ /dev/null @@ -1,72 +0,0 @@ -from: https://lore.kernel.org/all/20220422084720.959271-1-xji@analogixsemi.com/ - "[PATCH v2 1/4] media/v4l2-core: Add enum V4L2_FWNODE_BUS_TYPE_DPI" - -thanks to wens from the #linux-mediatek irc for pointing me to this patch - -As V4L2_FWNODE_BUS_TYPE_PARALLEL is not used for DPI interface, this -patch add V4L2_FWNODE_BUS_TYPE_DPI for video DPI interface. - -Signed-off-by: Xin Ji ---- - drivers/media/v4l2-core/v4l2-fwnode.c | 4 ++++ - include/media/v4l2-fwnode.h | 2 ++ - include/media/v4l2-mediabus.h | 2 ++ - 3 files changed, 8 insertions(+) - -diff --git a/drivers/media/v4l2-core/v4l2-fwnode.c b/drivers/media/v4l2-core/v4l2-fwnode.c -index afceb35e500c..3d85a8600f57 100644 ---- a/drivers/media/v4l2-core/v4l2-fwnode.c -+++ b/drivers/media/v4l2-core/v4l2-fwnode.c -@@ -61,6 +61,10 @@ static const struct v4l2_fwnode_bus_conv { - V4L2_FWNODE_BUS_TYPE_BT656, - V4L2_MBUS_BT656, - "Bt.656", -+ }, { -+ V4L2_FWNODE_BUS_TYPE_DPI, -+ V4L2_MBUS_DPI, -+ "DPI", - } - }; - -diff --git a/include/media/v4l2-fwnode.h b/include/media/v4l2-fwnode.h -index feb132df45a3..15e4ab672223 100644 ---- a/include/media/v4l2-fwnode.h -+++ b/include/media/v4l2-fwnode.h -@@ -173,6 +173,7 @@ struct v4l2_fwnode_connector { - * @V4L2_FWNODE_BUS_TYPE_CSI2_DPHY: MIPI CSI-2 bus, D-PHY physical layer - * @V4L2_FWNODE_BUS_TYPE_PARALLEL: Camera Parallel Interface bus - * @V4L2_FWNODE_BUS_TYPE_BT656: BT.656 video format bus-type -+ * @V4L2_FWNODE_BUS_TYPE_DPI: Video Parallel Interface bus - * @NR_OF_V4L2_FWNODE_BUS_TYPE: Number of bus-types - */ - enum v4l2_fwnode_bus_type { -@@ -183,6 +184,7 @@ enum v4l2_fwnode_bus_type { - V4L2_FWNODE_BUS_TYPE_CSI2_DPHY, - V4L2_FWNODE_BUS_TYPE_PARALLEL, - V4L2_FWNODE_BUS_TYPE_BT656, -+ V4L2_FWNODE_BUS_TYPE_DPI, - NR_OF_V4L2_FWNODE_BUS_TYPE - }; - -diff --git a/include/media/v4l2-mediabus.h b/include/media/v4l2-mediabus.h -index e0db3bcff9ed..f67a74daf799 100644 ---- a/include/media/v4l2-mediabus.h -+++ b/include/media/v4l2-mediabus.h -@@ -129,6 +129,7 @@ struct v4l2_mbus_config_mipi_csi1 { - * @V4L2_MBUS_CCP2: CCP2 (Compact Camera Port 2) - * @V4L2_MBUS_CSI2_DPHY: MIPI CSI-2 serial interface, with D-PHY - * @V4L2_MBUS_CSI2_CPHY: MIPI CSI-2 serial interface, with C-PHY -+ * @V4L2_MBUS_DPI: MIPI VIDEO DPI interface - * @V4L2_MBUS_INVALID: invalid bus type (keep as last) - */ - enum v4l2_mbus_type { -@@ -139,6 +140,7 @@ enum v4l2_mbus_type { - V4L2_MBUS_CCP2, - V4L2_MBUS_CSI2_DPHY, - V4L2_MBUS_CSI2_CPHY, -+ V4L2_MBUS_DPI, - V4L2_MBUS_INVALID, - }; - --- -2.25.1 diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-kukui-jacuzzi-fix-anx7625-04.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-kukui-jacuzzi-fix-anx7625-04.patch deleted file mode 100644 index cfeac922c..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-kukui-jacuzzi-fix-anx7625-04.patch +++ /dev/null @@ -1,48 +0,0 @@ -from: https://lore.kernel.org/all/20220422084720.959271-4-xji@analogixsemi.com/ - "[PATCH v2 4/4] drm/bridge: anx7625: Use DPI bus type" - -thanks to wens from the #linux-mediatek irc for pointing me to this patch - -As V4L2_FWNODE_BUS_TYPE_PARALLEL not properly descript for DPI -interface, this patch use new defined V4L2_FWNODE_BUS_TYPE_DPI for it. - -Fixes: fd0310b6fe7d ("drm/bridge: anx7625: add MIPI DPI input feature") -Signed-off-by: Xin Ji ---- - drivers/gpu/drm/bridge/analogix/anx7625.c | 8 ++++---- - 1 file changed, 4 insertions(+), 4 deletions(-) - -diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.c b/drivers/gpu/drm/bridge/analogix/anx7625.c -index 376da01243a3..71df977e8f53 100644 ---- a/drivers/gpu/drm/bridge/analogix/anx7625.c -+++ b/drivers/gpu/drm/bridge/analogix/anx7625.c -@@ -1623,14 +1623,14 @@ static int anx7625_parse_dt(struct device *dev, - - anx7625_get_swing_setting(dev, pdata); - -- pdata->is_dpi = 1; /* default dpi mode */ -+ pdata->is_dpi = 0; /* default dsi mode */ - pdata->mipi_host_node = of_graph_get_remote_node(np, 0, 0); - if (!pdata->mipi_host_node) { - DRM_DEV_ERROR(dev, "fail to get internal panel.\n"); - return -ENODEV; - } - -- bus_type = V4L2_FWNODE_BUS_TYPE_PARALLEL; -+ bus_type = 0; - mipi_lanes = MAX_LANES_SUPPORT; - ep0 = of_graph_get_endpoint_by_regs(np, 0, 0); - if (ep0) { -@@ -1640,8 +1640,8 @@ static int anx7625_parse_dt(struct device *dev, - mipi_lanes = of_property_count_u32_elems(ep0, "data-lanes"); - } - -- if (bus_type == V4L2_FWNODE_BUS_TYPE_PARALLEL) /* bus type is Parallel(DSI) */ -- pdata->is_dpi = 0; -+ if (bus_type == V4L2_FWNODE_BUS_TYPE_DPI) /* bus type is DPI */ -+ pdata->is_dpi = 1; - - pdata->mipi_lanes = mipi_lanes; - if (pdata->mipi_lanes > MAX_LANES_SUPPORT || pdata->mipi_lanes <= 0) --- -2.25.1 diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-kukui-jacuzzi-fix-display-resume.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-kukui-jacuzzi-fix-display-resume.patch index 7a3ca56f1..9ea687746 100644 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-kukui-jacuzzi-fix-display-resume.patch +++ b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-kukui-jacuzzi-fix-display-resume.patch @@ -49,47 +49,6 @@ index 14d73fb1dd15..8325e8d0ee19 100644 } static enum drm_mode_status -@@ -1720,38 +1738,9 @@ static int __maybe_unused anx7625_runtime_pm_resume(struct device *dev) - return 0; - } - --static int __maybe_unused anx7625_resume(struct device *dev) --{ -- struct anx7625_data *ctx = dev_get_drvdata(dev); -- -- if (!ctx->pdata.intp_irq) -- return 0; -- -- if (!pm_runtime_enabled(dev) || !pm_runtime_suspended(dev)) { -- enable_irq(ctx->pdata.intp_irq); -- anx7625_runtime_pm_resume(dev); -- } -- -- return 0; --} -- --static int __maybe_unused anx7625_suspend(struct device *dev) --{ -- struct anx7625_data *ctx = dev_get_drvdata(dev); -- -- if (!ctx->pdata.intp_irq) -- return 0; -- -- if (!pm_runtime_enabled(dev) || !pm_runtime_suspended(dev)) { -- anx7625_runtime_pm_suspend(dev); -- disable_irq(ctx->pdata.intp_irq); -- } -- -- return 0; --} -- - static const struct dev_pm_ops anx7625_pm_ops = { -- SET_SYSTEM_SLEEP_PM_OPS(anx7625_suspend, anx7625_resume) -+ SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, -+ pm_runtime_force_resume) - SET_RUNTIME_PM_OPS(anx7625_runtime_pm_suspend, - anx7625_runtime_pm_resume, NULL) - }; diff --git a/drivers/gpu/drm/bridge/analogix/anx7625.h b/drivers/gpu/drm/bridge/analogix/anx7625.h index edbbfe410a56..299e62df6238 100644 --- a/drivers/gpu/drm/bridge/analogix/anx7625.h diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-panel-orientation.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-panel-orientation.patch deleted file mode 100644 index ddb28cfbe..000000000 --- a/device/testing/linux-postmarketos-mediatek-mt8183/mt8183-panel-orientation.patch +++ /dev/null @@ -1,312 +0,0 @@ -From: Hsin-Yi Wang -Subject: [PATCH v6 1/3] gpu: drm: separate panel orientation property creating and value setting -Date: Thu, 29 Apr 2021 12:28:32 +0800 - -drm_dev_register() sets connector->registration_state to -DRM_CONNECTOR_REGISTERED and dev->registered to true. If -drm_connector_set_panel_orientation() is first called after -drm_dev_register(), it will fail several checks and results in following -warning. - -Add a function to create panel orientation property and set default value -to UNKNOWN, so drivers can call this function to init the property earlier -, and let the panel set the real value later. - -[ 4.480976] ------------[ cut here ]------------ -[ 4.485603] WARNING: CPU: 5 PID: 369 at drivers/gpu/drm/drm_mode_object.c:45 __drm_mode_object_add+0xb4/0xbc - -[ 4.609772] Call trace: -[ 4.612208] __drm_mode_object_add+0xb4/0xbc -[ 4.616466] drm_mode_object_add+0x20/0x2c -[ 4.620552] drm_property_create+0xdc/0x174 -[ 4.624723] drm_property_create_enum+0x34/0x98 -[ 4.629241] drm_connector_set_panel_orientation+0x64/0xa0 -[ 4.634716] boe_panel_get_modes+0x88/0xd8 -[ 4.638802] drm_panel_get_modes+0x2c/0x48 -[ 4.642887] panel_bridge_get_modes+0x1c/0x28 -[ 4.647233] drm_bridge_connector_get_modes+0xa0/0xd4 -[ 4.652273] drm_helper_probe_single_connector_modes+0x218/0x700 -[ 4.658266] drm_mode_getconnector+0x1b4/0x45c -[ 4.662699] drm_ioctl_kernel+0xac/0x128 -[ 4.666611] drm_ioctl+0x268/0x410 -[ 4.670002] drm_compat_ioctl+0xdc/0xf0 -[ 4.673829] __arm64_compat_sys_ioctl+0xc8/0x100 -[ 4.678436] el0_svc_common+0xf4/0x1c0 -[ 4.682174] do_el0_svc_compat+0x28/0x3c -[ 4.686088] el0_svc_compat+0x10/0x1c -[ 4.689738] el0_sync_compat_handler+0xa8/0xcc -[ 4.694171] el0_sync_compat+0x178/0x180 -[ 4.698082] ---[ end trace b4f2db9d9c88610b ]--- -[ 4.702721] ------------[ cut here ]------------ -[ 4.707329] WARNING: CPU: 5 PID: 369 at drivers/gpu/drm/drm_mode_object.c:243 drm_object_attach_property+0x48/0xb8 - -[ 4.833830] Call trace: -[ 4.836266] drm_object_attach_property+0x48/0xb8 -[ 4.840958] drm_connector_set_panel_orientation+0x84/0xa0 -[ 4.846432] boe_panel_get_modes+0x88/0xd8 -[ 4.850516] drm_panel_get_modes+0x2c/0x48 -[ 4.854600] panel_bridge_get_modes+0x1c/0x28 -[ 4.858946] drm_bridge_connector_get_modes+0xa0/0xd4 -[ 4.863984] drm_helper_probe_single_connector_modes+0x218/0x700 -[ 4.869978] drm_mode_getconnector+0x1b4/0x45c -[ 4.874410] drm_ioctl_kernel+0xac/0x128 -[ 4.878320] drm_ioctl+0x268/0x410 -[ 4.881711] drm_compat_ioctl+0xdc/0xf0 -[ 4.885536] __arm64_compat_sys_ioctl+0xc8/0x100 -[ 4.890142] el0_svc_common+0xf4/0x1c0 -[ 4.893879] do_el0_svc_compat+0x28/0x3c -[ 4.897791] el0_svc_compat+0x10/0x1c -[ 4.901441] el0_sync_compat_handler+0xa8/0xcc -[ 4.905873] el0_sync_compat+0x178/0x180 -[ 4.909783] ---[ end trace b4f2db9d9c88610c ]--- - -Signed-off-by: Hsin-Yi Wang ---- -v6, v5: -don't create property in set_panel_orientation. - -v4, v3: -create property in dsi driver and set value in panel. - -v2: -create property in connector init -https://patchwork.kernel.org/project/linux-mediatek/patch/20210426051848.2600890-1-hsinyi@chromium.org/ - -v1: -set panel orientation in dsi driver -https://patchwork.kernel.org/project/linux-mediatek/patch/20210409045314.3420733-1-hsinyi@chromium.org/ ---- - drivers/gpu/drm/drm_connector.c | 58 ++++++++++++++++++------- - drivers/gpu/drm/i915/display/icl_dsi.c | 1 + - drivers/gpu/drm/i915/display/intel_dp.c | 1 + - drivers/gpu/drm/i915/display/vlv_dsi.c | 1 + - include/drm/drm_connector.h | 2 + - 5 files changed, 47 insertions(+), 16 deletions(-) - -diff --git a/drivers/gpu/drm/drm_connector.c b/drivers/gpu/drm/drm_connector.c -index 7631f76e7f34..7189baaabf41 100644 ---- a/drivers/gpu/drm/drm_connector.c -+++ b/drivers/gpu/drm/drm_connector.c -@@ -1210,7 +1210,7 @@ static const struct drm_prop_enum_list dp_colorspaces[] = { - * INPUT_PROP_DIRECT) will still map 1:1 to the actual LCD panel - * coordinates, so if userspace rotates the picture to adjust for - * the orientation it must also apply the same transformation to the -- * touchscreen input coordinates. This property is initialized by calling -+ * touchscreen input coordinates. This property value is set by calling - * drm_connector_set_panel_orientation() or - * drm_connector_set_panel_orientation_with_quirk() - * -@@ -2173,8 +2173,8 @@ EXPORT_SYMBOL(drm_connector_set_vrr_capable_property); - * @connector: connector for which to set the panel-orientation property. - * @panel_orientation: drm_panel_orientation value to set - * -- * This function sets the connector's panel_orientation and attaches -- * a "panel orientation" property to the connector. -+ * This function sets the connector's panel_orientation value. If the property -+ * doesn't exist, it will return an error. - * - * Calling this function on a connector where the panel_orientation has - * already been set is a no-op (e.g. the orientation has been overridden with -@@ -2205,19 +2205,11 @@ int drm_connector_set_panel_orientation( - info->panel_orientation = panel_orientation; - - prop = dev->mode_config.panel_orientation_property; -- if (!prop) { -- prop = drm_property_create_enum(dev, DRM_MODE_PROP_IMMUTABLE, -- "panel orientation", -- drm_panel_orientation_enum_list, -- ARRAY_SIZE(drm_panel_orientation_enum_list)); -- if (!prop) -- return -ENOMEM; -- -- dev->mode_config.panel_orientation_property = prop; -- } -+ if (WARN_ON(!prop)) -+ return -EINVAL; - -- drm_object_attach_property(&connector->base, prop, -- info->panel_orientation); -+ drm_object_property_set_value(&connector->base, prop, -+ info->panel_orientation); - return 0; - } - EXPORT_SYMBOL(drm_connector_set_panel_orientation); -@@ -2225,7 +2217,7 @@ EXPORT_SYMBOL(drm_connector_set_panel_orientation); - /** - * drm_connector_set_panel_orientation_with_quirk - set the - * connector's panel_orientation after checking for quirks -- * @connector: connector for which to init the panel-orientation property. -+ * @connector: connector for which to set the panel-orientation property. - * @panel_orientation: drm_panel_orientation value to set - * @width: width in pixels of the panel, used for panel quirk detection - * @height: height in pixels of the panel, used for panel quirk detection -@@ -2252,6 +2244,40 @@ int drm_connector_set_panel_orientation_with_quirk( - } - EXPORT_SYMBOL(drm_connector_set_panel_orientation_with_quirk); - -+/** -+ * drm_connector_init_panel_orientation_property - -+ * create the connector's panel orientation property -+ * -+ * This function attaches a "panel orientation" property to the connector -+ * and initializes its value to DRM_MODE_PANEL_ORIENTATION_UNKNOWN. -+ * -+ * The value of the property can be set by drm_connector_set_panel_orientation() -+ * or drm_connector_set_panel_orientation_with_quirk() later. -+ * -+ * Returns: -+ * Zero on success, negative errno on failure. -+ */ -+int drm_connector_init_panel_orientation_property( -+ struct drm_connector *connector) -+{ -+ struct drm_device *dev = connector->dev; -+ struct drm_property *prop; -+ -+ prop = drm_property_create_enum(dev, DRM_MODE_PROP_IMMUTABLE, -+ "panel orientation", -+ drm_panel_orientation_enum_list, -+ ARRAY_SIZE(drm_panel_orientation_enum_list)); -+ if (!prop) -+ return -ENOMEM; -+ -+ dev->mode_config.panel_orientation_property = prop; -+ drm_object_attach_property(&connector->base, prop, -+ DRM_MODE_PANEL_ORIENTATION_UNKNOWN); -+ -+ return 0; -+} -+EXPORT_SYMBOL(drm_connector_init_panel_orientation_property); -+ - int drm_connector_set_obj_prop(struct drm_mode_object *obj, - struct drm_property *property, - uint64_t value) -diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c -index 9282978060b0..5ac4538e4283 100644 ---- a/drivers/gpu/drm/i915/display/icl_dsi.c -+++ b/drivers/gpu/drm/i915/display/icl_dsi.c -@@ -1903,6 +1903,7 @@ static void icl_dsi_add_properties(struct intel_connector *connector) - - connector->base.state->scaling_mode = DRM_MODE_SCALE_ASPECT; - -+ drm_connector_init_panel_orientation_property(&connector->base); - drm_connector_set_panel_orientation_with_quirk(&connector->base, - intel_dsi_get_panel_orientation(connector), - connector->panel.fixed_mode->hdisplay, -diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c -index a5231ac3443a..f1d664e5abb2 100644 ---- a/drivers/gpu/drm/i915/display/intel_dp.c -+++ b/drivers/gpu/drm/i915/display/intel_dp.c -@@ -5263,6 +5263,7 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, - intel_panel_setup_backlight(connector, pipe); - - if (fixed_mode) { -+ drm_connector_init_panel_orientation_property(connector); - drm_connector_set_panel_orientation_with_quirk(connector, - dev_priv->vbt.orientation, - fixed_mode->hdisplay, fixed_mode->vdisplay); -diff --git a/drivers/gpu/drm/i915/display/vlv_dsi.c b/drivers/gpu/drm/i915/display/vlv_dsi.c -index 9bee99fe5495..853855482af1 100644 ---- a/drivers/gpu/drm/i915/display/vlv_dsi.c -+++ b/drivers/gpu/drm/i915/display/vlv_dsi.c -@@ -1632,6 +1632,7 @@ static void vlv_dsi_add_properties(struct intel_connector *connector) - - connector->base.state->scaling_mode = DRM_MODE_SCALE_ASPECT; - -+ drm_connector_init_panel_orientation_property(&connector->base); - drm_connector_set_panel_orientation_with_quirk(&connector->base, - intel_dsi_get_panel_orientation(connector), - connector->panel.fixed_mode->hdisplay, -diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h -index 1922b278ffad..4396c1c4a5db 100644 ---- a/include/drm/drm_connector.h -+++ b/include/drm/drm_connector.h -@@ -1696,6 +1696,8 @@ int drm_connector_set_panel_orientation_with_quirk( - struct drm_connector *connector, - enum drm_panel_orientation panel_orientation, - int width, int height); -+int drm_connector_init_panel_orientation_property( -+ struct drm_connector *connector); - int drm_connector_attach_max_bpc_property(struct drm_connector *connector, - int min, int max); - --- -2.31.1.498.g6c1eba8ee3d-goog - - -_______________________________________________ -Linux-mediatek mailing list -Linux-mediatek@lists.infradead.org -http://lists.infradead.org/mailman/listinfo/linux-mediatek - -From: Hsin-Yi Wang -Subject: [PATCH v6 2/3] drm/mediatek: init panel orientation property -Date: Thu, 29 Apr 2021 12:28:33 +0800 - -Init panel orientation property after connector is initialized. Let the -panel driver decides the orientation value later. - -Signed-off-by: Hsin-Yi Wang ---- - drivers/gpu/drm/mediatek/mtk_dsi.c | 7 +++++++ - 1 file changed, 7 insertions(+) - -diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c -index ae403c67cbd9..9da1fd649131 100644 ---- a/drivers/gpu/drm/mediatek/mtk_dsi.c -+++ b/drivers/gpu/drm/mediatek/mtk_dsi.c -@@ -964,6 +964,13 @@ static int mtk_dsi_encoder_init(struct drm_device *drm, struct mtk_dsi *dsi) - ret = PTR_ERR(dsi->connector); - goto err_cleanup_encoder; - } -+ -+ ret = drm_connector_init_panel_orientation_property(dsi->connector); -+ if (ret) { -+ DRM_ERROR("Unable to init panel orientation\n"); -+ goto err_cleanup_encoder; -+ } -+ - drm_connector_attach_encoder(dsi->connector, &dsi->encoder); - - return 0; --- -2.31.1.498.g6c1eba8ee3d-goog - - -_______________________________________________ -Linux-mediatek mailing list -Linux-mediatek@lists.infradead.org -http://lists.infradead.org/mailman/listinfo/linux-mediatek - -From: Hsin-Yi Wang -Subject: [PATCH v6 3/3] arm64: dts: mt8183: Add panel rotation -Date: Thu, 29 Apr 2021 12:28:34 +0800 - -krane, kakadu, and kodama boards have a default panel rotation. - -Signed-off-by: Hsin-Yi Wang ---- - arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi | 1 + - 1 file changed, 1 insertion(+) - -diff --git a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi -index ff56bcfa3370..793cc9501337 100644 ---- a/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi -+++ b/arch/arm64/boot/dts/mediatek/mt8183-kukui.dtsi -@@ -263,6 +263,7 @@ panel: panel@0 { - avee-supply = <&ppvarp_lcd>; - pp1800-supply = <&pp1800_lcd>; - backlight = <&backlight_lcd0>; -+ rotation = <270>; - port { - panel_in: endpoint { - remote-endpoint = <&dsi_out>; --- -2.31.1.498.g6c1eba8ee3d-goog - - -_______________________________________________ -Linux-mediatek mailing list -Linux-mediatek@lists.infradead.org -http://lists.infradead.org/mailman/listinfo/linux-mediatek - diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt81xx-fix-low-speed-usb-devices.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt81xx-fix-low-speed-usb-devices.patch new file mode 100644 index 000000000..e53aa7475 --- /dev/null +++ b/device/testing/linux-postmarketos-mediatek-mt8183/mt81xx-fix-low-speed-usb-devices.patch @@ -0,0 +1,43 @@ +this one reverts commit 8b13ea05117ffad4727b0971ed09122d5c91c4dc from mainline +from author: Chunfeng Yun +from date: Fri Aug 19 16:05:55 2022 +0800 +subject: usb: xhci-mtk: relax TT periodic bandwidth allocation +link: https://lore.kernel.org/r/20220819080556.32215-1-chunfeng.yun@mediatek.com + +if this commit is in it results in low speed usb devices (keybard, mice etc.) +connected to a usb hub longer working properly and kernel messages like: +"kernel: usb 1-2.1.2: reset low-speed USB device number 6 using xhci-mtk" + +diff --git a/drivers/usb/host/xhci-mtk-sch.c b/drivers/usb/host/xhci-mtk-sch.c +index 579899eb24c1..d86f1c84ad8f 100644 +--- a/drivers/usb/host/xhci-mtk-sch.c ++++ b/drivers/usb/host/xhci-mtk-sch.c +@@ -425,6 +425,7 @@ static int check_fs_bus_bw(struct mu3h_sch_ep_info *sch_ep, int offset) + + static int check_sch_tt(struct mu3h_sch_ep_info *sch_ep, u32 offset) + { ++ u32 extra_cs_count; + u32 start_ss, last_ss; + u32 start_cs, last_cs; + +@@ -460,12 +461,18 @@ static int check_sch_tt(struct mu3h_sch_ep_info *sch_ep, u32 offset) + if (last_cs > 7) + return -ESCH_CS_OVERFLOW; + ++ if (sch_ep->ep_type == ISOC_IN_EP) ++ extra_cs_count = (last_cs == 7) ? 1 : 2; ++ else /* ep_type : INTR IN / INTR OUT */ ++ extra_cs_count = 1; ++ ++ cs_count += extra_cs_count; + if (cs_count > 7) + cs_count = 7; /* HW limit */ + + sch_ep->cs_count = cs_count; +- /* ss, idle are ignored */ +- sch_ep->num_budget_microframes = cs_count; ++ /* one for ss, the other for idle */ ++ sch_ep->num_budget_microframes = cs_count + 2; + + /* + * if interval=1, maxp >752, num_budge_micoframe is larger diff --git a/device/testing/linux-postmarketos-mediatek-mt8183/mt81xx-usb-02.patch b/device/testing/linux-postmarketos-mediatek-mt8183/mt81xx-usb-02.patch new file mode 100644 index 000000000..f2487b15a --- /dev/null +++ b/device/testing/linux-postmarketos-mediatek-mt8183/mt81xx-usb-02.patch @@ -0,0 +1,155 @@ +from: https://patchwork.kernel.org/project/linux-mediatek/patch/20221118110116.20165-1-chunfeng.yun@mediatek.com/ + +diff --git a/drivers/usb/host/xhci-mtk.c b/drivers/usb/host/xhci-mtk.c +index 01705e559c42..cff3c4aea036 100644 +--- a/drivers/usb/host/xhci-mtk.c ++++ b/drivers/usb/host/xhci-mtk.c +@@ -485,6 +485,7 @@ static int xhci_mtk_probe(struct platform_device *pdev) + const struct hc_driver *driver; + struct xhci_hcd *xhci; + struct resource *res; ++ struct usb_hcd *usb3_hcd; + struct usb_hcd *hcd; + int ret = -ENODEV; + int wakeup_irq; +@@ -593,6 +594,7 @@ static int xhci_mtk_probe(struct platform_device *pdev) + + xhci = hcd_to_xhci(hcd); + xhci->main_hcd = hcd; ++ xhci->allow_single_roothub = 1; + + /* + * imod_interval is the interrupt moderation value in nanoseconds. +@@ -602,24 +604,29 @@ static int xhci_mtk_probe(struct platform_device *pdev) + xhci->imod_interval = 5000; + device_property_read_u32(dev, "imod-interval-ns", &xhci->imod_interval); + +- xhci->shared_hcd = usb_create_shared_hcd(driver, dev, +- dev_name(dev), hcd); +- if (!xhci->shared_hcd) { +- ret = -ENOMEM; +- goto disable_device_wakeup; +- } +- + ret = usb_add_hcd(hcd, irq, IRQF_SHARED); + if (ret) +- goto put_usb3_hcd; ++ goto disable_device_wakeup; + +- if (HCC_MAX_PSA(xhci->hcc_params) >= 4 && ++ if (!xhci_has_one_roothub(xhci)) { ++ xhci->shared_hcd = usb_create_shared_hcd(driver, dev, ++ dev_name(dev), hcd); ++ if (!xhci->shared_hcd) { ++ ret = -ENOMEM; ++ goto dealloc_usb2_hcd; ++ } ++ } ++ ++ usb3_hcd = xhci_get_usb3_hcd(xhci); ++ if (usb3_hcd && HCC_MAX_PSA(xhci->hcc_params) >= 4 && + !(xhci->quirks & XHCI_BROKEN_STREAMS)) +- xhci->shared_hcd->can_do_streams = 1; ++ usb3_hcd->can_do_streams = 1; + +- ret = usb_add_hcd(xhci->shared_hcd, irq, IRQF_SHARED); +- if (ret) +- goto dealloc_usb2_hcd; ++ if (xhci->shared_hcd) { ++ ret = usb_add_hcd(xhci->shared_hcd, irq, IRQF_SHARED); ++ if (ret) ++ goto put_usb3_hcd; ++ } + + if (wakeup_irq > 0) { + ret = dev_pm_set_dedicated_wake_irq_reverse(dev, wakeup_irq); +@@ -641,13 +648,13 @@ static int xhci_mtk_probe(struct platform_device *pdev) + usb_remove_hcd(xhci->shared_hcd); + xhci->shared_hcd = NULL; + +-dealloc_usb2_hcd: +- usb_remove_hcd(hcd); +- + put_usb3_hcd: +- xhci_mtk_sch_exit(mtk); + usb_put_hcd(xhci->shared_hcd); + ++dealloc_usb2_hcd: ++ xhci_mtk_sch_exit(mtk); ++ usb_remove_hcd(hcd); ++ + disable_device_wakeup: + device_init_wakeup(dev, false); + +@@ -679,10 +686,15 @@ static int xhci_mtk_remove(struct platform_device *pdev) + dev_pm_clear_wake_irq(dev); + device_init_wakeup(dev, false); + +- usb_remove_hcd(shared_hcd); +- xhci->shared_hcd = NULL; ++ if (shared_hcd) { ++ usb_remove_hcd(shared_hcd); ++ xhci->shared_hcd = NULL; ++ } + usb_remove_hcd(hcd); +- usb_put_hcd(shared_hcd); ++ ++ if (shared_hcd) ++ usb_put_hcd(shared_hcd); ++ + usb_put_hcd(hcd); + xhci_mtk_sch_exit(mtk); + clk_bulk_disable_unprepare(BULK_CLKS_NUM, mtk->clks); +@@ -700,13 +712,16 @@ static int __maybe_unused xhci_mtk_suspend(struct device *dev) + struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev); + struct usb_hcd *hcd = mtk->hcd; + struct xhci_hcd *xhci = hcd_to_xhci(hcd); ++ struct usb_hcd *shared_hcd = xhci->shared_hcd; + int ret; + + xhci_dbg(xhci, "%s: stop port polling\n", __func__); + clear_bit(HCD_FLAG_POLL_RH, &hcd->flags); + del_timer_sync(&hcd->rh_timer); +- clear_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); +- del_timer_sync(&xhci->shared_hcd->rh_timer); ++ if (shared_hcd) { ++ clear_bit(HCD_FLAG_POLL_RH, &shared_hcd->flags); ++ del_timer_sync(&shared_hcd->rh_timer); ++ } + + ret = xhci_mtk_host_disable(mtk); + if (ret) +@@ -718,8 +733,10 @@ static int __maybe_unused xhci_mtk_suspend(struct device *dev) + + restart_poll_rh: + xhci_dbg(xhci, "%s: restart port polling\n", __func__); +- set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); +- usb_hcd_poll_rh_status(xhci->shared_hcd); ++ if (shared_hcd) { ++ set_bit(HCD_FLAG_POLL_RH, &shared_hcd->flags); ++ usb_hcd_poll_rh_status(shared_hcd); ++ } + set_bit(HCD_FLAG_POLL_RH, &hcd->flags); + usb_hcd_poll_rh_status(hcd); + return ret; +@@ -730,6 +747,7 @@ static int __maybe_unused xhci_mtk_resume(struct device *dev) + struct xhci_hcd_mtk *mtk = dev_get_drvdata(dev); + struct usb_hcd *hcd = mtk->hcd; + struct xhci_hcd *xhci = hcd_to_xhci(hcd); ++ struct usb_hcd *shared_hcd = xhci->shared_hcd; + int ret; + + usb_wakeup_set(mtk, false); +@@ -742,8 +760,10 @@ static int __maybe_unused xhci_mtk_resume(struct device *dev) + goto disable_clks; + + xhci_dbg(xhci, "%s: restart port polling\n", __func__); +- set_bit(HCD_FLAG_POLL_RH, &xhci->shared_hcd->flags); +- usb_hcd_poll_rh_status(xhci->shared_hcd); ++ if (shared_hcd) { ++ set_bit(HCD_FLAG_POLL_RH, &shared_hcd->flags); ++ usb_hcd_poll_rh_status(shared_hcd); ++ } + set_bit(HCD_FLAG_POLL_RH, &hcd->flags); + usb_hcd_poll_rh_status(hcd); + return 0;