Piecuu/pmaports
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity

cross/gcc-*: upgrade to 14.2.0-r6

Browse source
This commit is contained in:
Clayton Craft 2025-05-09 13:38:36 -07:00
parent 90a16918dc
commit 42a507315b
No known key found for this signature in database
GPG key ID: 4A4CED6D7EDF950A
12 changed files with 540 additions and 36 deletions
Download patch file Download diff file Expand all files Collapse all files

82
cross/gcc-aarch64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch Normal file
View file

@ -0,0 +1,82 @@
From 4d0a333ef13e2da140cd44c4941b20f48a80dc0f Mon Sep 17 00:00:00 2001
From: Hannes Braun <hannes@hannesbraun.net>
Date: Thu, 20 Feb 2025 15:09:41 +0100
Subject: [PATCH] arm: Fix signedness of vld1q intrinsic parms [PR118942]
vld1q_s8_x3, vld1q_s16_x3, vld1q_s8_x4 and vld1q_s16_x4 were expecting
pointers to unsigned integers. These parameters should be pointers to
signed integers.
gcc/ChangeLog:
PR target/118942
* config/arm/arm_neon.h (vld1q_s8_x3): Use int8_t instead of
uint16_t.
(vld1q_s16_x3): Use int16_t instead of uint16_t.
(vld1q_s8_x4): Likewise.
(vld1q_s16_x4): Likewise.
gcc/testsuite/ChangeLog:
PR target/118942
* gcc.target/arm/simd/vld1q_base_xN_1.c: Add -Wpointer-sign.
Signed-off-by: Hannes Braun <hannes@hannesbraun.net>
---
gcc/config/arm/arm_neon.h | 8 ++++----
gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h
index 5b1c55c8d9f..578ada88fa6 100644
--- a/gcc/config/arm/arm_neon.h
+++ b/gcc/config/arm/arm_neon.h
@@ -10854,7 +10854,7 @@ vld1q_s64_x2 (const int64_t * __a)
__extension__ extern __inline int8x16x3_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s8_x3 (const uint8_t * __a)
+vld1q_s8_x3 (const int8_t * __a)
{
union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a);
@@ -10863,7 +10863,7 @@ vld1q_s8_x3 (const uint8_t * __a)
__extension__ extern __inline int16x8x3_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s16_x3 (const uint16_t * __a)
+vld1q_s16_x3 (const int16_t * __a)
{
union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a);
@@ -10890,7 +10890,7 @@ vld1q_s64_x3 (const int64_t * __a)
__extension__ extern __inline int8x16x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s8_x4 (const uint8_t * __a)
+vld1q_s8_x4 (const int8_t * __a)
{
union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x4v16qi ((const __builtin_neon_qi *) __a);
@@ -10899,7 +10899,7 @@ vld1q_s8_x4 (const uint8_t * __a)
__extension__ extern __inline int16x8x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s16_x4 (const uint16_t * __a)
+vld1q_s16_x4 (const int16_t * __a)
{
union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x4v8hi ((const __builtin_neon_hi *) __a);
diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
index 01b29b60084..c73afe2b723 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
@@ -1,6 +1,6 @@
/* { dg-do assemble } */
/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
+/* { dg-options "-save-temps -O2 -Wpointer-sign" } */
/* { dg-add-options arm_neon } */
#include "arm_neon.h"
--
2.48.1

14
cross/gcc-aarch64/APKBUILD
View file

@ -34,19 +34,19 @@ _pkgsnap="${pkgver##*_git}"
[ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""
pkgname=gcc-aarch64
pkgrel=5
pkgrel=6
pkgdesc="Stage2 cross-compiler for aarch64"
url="https://gcc.gnu.org"
arch="x86_64"
license="GPL-2.0-or-later AND LGPL-2.1-or-later"
_gccrel=$pkgver-r$pkgrel
depends="binutils-aarch64 mpc1 so:libc.musl-x86_64.so.1 so:libgcc_s.so.1 so:libgmp.so.10 so:libisl.so.23 so:libmpc.so.3 so:libmpfr.so.6 so:libstdc++.so.6 so:libz.so.1"
depends="binutils-aarch64 mpc1"
makedepends_build="gcc g++ bison flex texinfo gawk zip gmp-dev mpfr-dev mpc1-dev zlib-dev"
makedepends_host="linux-headers gmp-dev mpfr-dev mpc1-dev isl-dev zlib-dev musl-dev-aarch64 binutils-aarch64"
subpackages="g++-aarch64:gpp libstdc++-dev-aarch64:libcxx_dev"
[ "$CHOST" = "$CTARGET" ] && subpackages="gcc-gdb gcc-doc"
replaces="libstdc++ binutils"
options="!strip !tracedeps"
options="!strip"
: "${LANG_CXX:=true}"
: "${LANG_D:=true}"
@ -229,7 +229,6 @@ fi
if $LANG_JIT; then
subpackages="$subpackages libgccjit:jit libgccjit-dev:jitdev"
fi
makedepends="$makedepends_build $makedepends_host"
# when using upstream releases, use this URI template
# https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz
@ -279,6 +278,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz
0034-libgo-fix-lfs64-use.patch
0035-loongarch-disable-multilib-support.patch
0036-libphobos-add-riscv64-and-loongarch64-support.patch
0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch
fix-arm64.patch
ppc64le-quadmath.patch
riscv64-improve-build-time.patch
@ -487,6 +487,9 @@ package() {
# libcc1 does not depend on target, don't ship it
rm -rf "$pkgdir"/usr/lib/libcc1.so*
# These are moved into packages with arch=$CTARGET_ARCH so remove
# cross prefix (doesn't exist when BOOTSTRAP=nolibc)
[ "$BOOTSTRAP" != nolibc ] && mv "$pkgdir"/usr/$CTARGET/lib/*.so.* "$pkgdir"/usr/lib/
# fixup gcc library symlinks to be linker scripts so
# linker finds the libs from relocated sysroot
@ -570,8 +573,6 @@ gpp() {
depends="libstdc++-dev$_target=$_gccrel gcc$_target=$_gccrel musl-dev"
[ "$CHOST" = "$CTARGET" ] && depends="$depends libstdc++=$_gccrel"
depends="$depends so:libc.musl-x86_64.so.1 so:libgmp.so.10 so:libisl.so.23 so:libmpc.so.3 so:libmpfr.so.6 so:libz.so.1"
amove $_gcclibexec/cc1plus
amove usr/bin/*++
}
@ -782,6 +783,7 @@ c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0
c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c 0034-libgo-fix-lfs64-use.patch
65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3 0035-loongarch-disable-multilib-support.patch
06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453 0036-libphobos-add-riscv64-and-loongarch64-support.patch
a30148fb2cfa9a5800df4aed73f6b1b3b5d5817d768835a2574216f5818e6d6070199bacfe964f0d15b70eab7e2310c40b55e354f65360efce90e15d40287639 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch
00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f fix-arm64.patch
815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9 ppc64le-quadmath.patch
ea55e0fa6813fc95c4ca2e87f059182edc54dc61515ebb92bf6eb31dbbd176d0fe81edcc7ea28d32f84ca37e8d48a544623d3d9bc94aa41ffc0859326a616aa2 riscv64-improve-build-time.patch

82
cross/gcc-armhf/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch Normal file
View file

@ -0,0 +1,82 @@
From 4d0a333ef13e2da140cd44c4941b20f48a80dc0f Mon Sep 17 00:00:00 2001
From: Hannes Braun <hannes@hannesbraun.net>
Date: Thu, 20 Feb 2025 15:09:41 +0100
Subject: [PATCH] arm: Fix signedness of vld1q intrinsic parms [PR118942]
vld1q_s8_x3, vld1q_s16_x3, vld1q_s8_x4 and vld1q_s16_x4 were expecting
pointers to unsigned integers. These parameters should be pointers to
signed integers.
gcc/ChangeLog:
PR target/118942
* config/arm/arm_neon.h (vld1q_s8_x3): Use int8_t instead of
uint16_t.
(vld1q_s16_x3): Use int16_t instead of uint16_t.
(vld1q_s8_x4): Likewise.
(vld1q_s16_x4): Likewise.
gcc/testsuite/ChangeLog:
PR target/118942
* gcc.target/arm/simd/vld1q_base_xN_1.c: Add -Wpointer-sign.
Signed-off-by: Hannes Braun <hannes@hannesbraun.net>
---
gcc/config/arm/arm_neon.h | 8 ++++----
gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h
index 5b1c55c8d9f..578ada88fa6 100644
--- a/gcc/config/arm/arm_neon.h
+++ b/gcc/config/arm/arm_neon.h
@@ -10854,7 +10854,7 @@ vld1q_s64_x2 (const int64_t * __a)
__extension__ extern __inline int8x16x3_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s8_x3 (const uint8_t * __a)
+vld1q_s8_x3 (const int8_t * __a)
{
union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a);
@@ -10863,7 +10863,7 @@ vld1q_s8_x3 (const uint8_t * __a)
__extension__ extern __inline int16x8x3_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s16_x3 (const uint16_t * __a)
+vld1q_s16_x3 (const int16_t * __a)
{
union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a);
@@ -10890,7 +10890,7 @@ vld1q_s64_x3 (const int64_t * __a)
__extension__ extern __inline int8x16x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s8_x4 (const uint8_t * __a)
+vld1q_s8_x4 (const int8_t * __a)
{
union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x4v16qi ((const __builtin_neon_qi *) __a);
@@ -10899,7 +10899,7 @@ vld1q_s8_x4 (const uint8_t * __a)
__extension__ extern __inline int16x8x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s16_x4 (const uint16_t * __a)
+vld1q_s16_x4 (const int16_t * __a)
{
union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x4v8hi ((const __builtin_neon_hi *) __a);
diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
index 01b29b60084..c73afe2b723 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
@@ -1,6 +1,6 @@
/* { dg-do assemble } */
/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
+/* { dg-options "-save-temps -O2 -Wpointer-sign" } */
/* { dg-add-options arm_neon } */
#include "arm_neon.h"
--
2.48.1

14
cross/gcc-armhf/APKBUILD
View file

@ -34,19 +34,19 @@ _pkgsnap="${pkgver##*_git}"
[ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""
pkgname=gcc-armhf
pkgrel=5
pkgrel=6
pkgdesc="Stage2 cross-compiler for armhf"
url="https://gcc.gnu.org"
arch="x86_64"
license="GPL-2.0-or-later AND LGPL-2.1-or-later"
_gccrel=$pkgver-r$pkgrel
depends="binutils-armhf mpc1 so:libc.musl-x86_64.so.1 so:libgcc_s.so.1 so:libgmp.so.10 so:libisl.so.23 so:libmpc.so.3 so:libmpfr.so.6 so:libstdc++.so.6 so:libz.so.1"
depends="binutils-armhf mpc1"
makedepends_build="gcc g++ bison flex texinfo gawk zip gmp-dev mpfr-dev mpc1-dev zlib-dev"
makedepends_host="linux-headers gmp-dev mpfr-dev mpc1-dev isl-dev zlib-dev musl-dev-armhf binutils-armhf"
subpackages="g++-armhf:gpp libstdc++-dev-armhf:libcxx_dev"
[ "$CHOST" = "$CTARGET" ] && subpackages="gcc-gdb gcc-doc"
replaces="libstdc++ binutils"
options="!strip !tracedeps"
options="!strip"
: "${LANG_CXX:=true}"
: "${LANG_D:=true}"
@ -229,7 +229,6 @@ fi
if $LANG_JIT; then
subpackages="$subpackages libgccjit:jit libgccjit-dev:jitdev"
fi
makedepends="$makedepends_build $makedepends_host"
# when using upstream releases, use this URI template
# https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz
@ -279,6 +278,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz
0034-libgo-fix-lfs64-use.patch
0035-loongarch-disable-multilib-support.patch
0036-libphobos-add-riscv64-and-loongarch64-support.patch
0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch
fix-arm64.patch
ppc64le-quadmath.patch
riscv64-improve-build-time.patch
@ -487,6 +487,9 @@ package() {
# libcc1 does not depend on target, don't ship it
rm -rf "$pkgdir"/usr/lib/libcc1.so*
# These are moved into packages with arch=$CTARGET_ARCH so remove
# cross prefix (doesn't exist when BOOTSTRAP=nolibc)
[ "$BOOTSTRAP" != nolibc ] && mv "$pkgdir"/usr/$CTARGET/lib/*.so.* "$pkgdir"/usr/lib/
# fixup gcc library symlinks to be linker scripts so
# linker finds the libs from relocated sysroot
@ -570,8 +573,6 @@ gpp() {
depends="libstdc++-dev$_target=$_gccrel gcc$_target=$_gccrel musl-dev"
[ "$CHOST" = "$CTARGET" ] && depends="$depends libstdc++=$_gccrel"
depends="$depends so:libc.musl-x86_64.so.1 so:libgmp.so.10 so:libisl.so.23 so:libmpc.so.3 so:libmpfr.so.6 so:libz.so.1"
amove $_gcclibexec/cc1plus
amove usr/bin/*++
}
@ -782,6 +783,7 @@ c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0
c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c 0034-libgo-fix-lfs64-use.patch
65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3 0035-loongarch-disable-multilib-support.patch
06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453 0036-libphobos-add-riscv64-and-loongarch64-support.patch
a30148fb2cfa9a5800df4aed73f6b1b3b5d5817d768835a2574216f5818e6d6070199bacfe964f0d15b70eab7e2310c40b55e354f65360efce90e15d40287639 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch
00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f fix-arm64.patch
815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9 ppc64le-quadmath.patch
ea55e0fa6813fc95c4ca2e87f059182edc54dc61515ebb92bf6eb31dbbd176d0fe81edcc7ea28d32f84ca37e8d48a544623d3d9bc94aa41ffc0859326a616aa2 riscv64-improve-build-time.patch

82
cross/gcc-armv7/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch Normal file
View file

@ -0,0 +1,82 @@
From 4d0a333ef13e2da140cd44c4941b20f48a80dc0f Mon Sep 17 00:00:00 2001
From: Hannes Braun <hannes@hannesbraun.net>
Date: Thu, 20 Feb 2025 15:09:41 +0100
Subject: [PATCH] arm: Fix signedness of vld1q intrinsic parms [PR118942]
vld1q_s8_x3, vld1q_s16_x3, vld1q_s8_x4 and vld1q_s16_x4 were expecting
pointers to unsigned integers. These parameters should be pointers to
signed integers.
gcc/ChangeLog:
PR target/118942
* config/arm/arm_neon.h (vld1q_s8_x3): Use int8_t instead of
uint16_t.
(vld1q_s16_x3): Use int16_t instead of uint16_t.
(vld1q_s8_x4): Likewise.
(vld1q_s16_x4): Likewise.
gcc/testsuite/ChangeLog:
PR target/118942
* gcc.target/arm/simd/vld1q_base_xN_1.c: Add -Wpointer-sign.
Signed-off-by: Hannes Braun <hannes@hannesbraun.net>
---
gcc/config/arm/arm_neon.h | 8 ++++----
gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h
index 5b1c55c8d9f..578ada88fa6 100644
--- a/gcc/config/arm/arm_neon.h
+++ b/gcc/config/arm/arm_neon.h
@@ -10854,7 +10854,7 @@ vld1q_s64_x2 (const int64_t * __a)
__extension__ extern __inline int8x16x3_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s8_x3 (const uint8_t * __a)
+vld1q_s8_x3 (const int8_t * __a)
{
union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a);
@@ -10863,7 +10863,7 @@ vld1q_s8_x3 (const uint8_t * __a)
__extension__ extern __inline int16x8x3_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s16_x3 (const uint16_t * __a)
+vld1q_s16_x3 (const int16_t * __a)
{
union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a);
@@ -10890,7 +10890,7 @@ vld1q_s64_x3 (const int64_t * __a)
__extension__ extern __inline int8x16x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s8_x4 (const uint8_t * __a)
+vld1q_s8_x4 (const int8_t * __a)
{
union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x4v16qi ((const __builtin_neon_qi *) __a);
@@ -10899,7 +10899,7 @@ vld1q_s8_x4 (const uint8_t * __a)
__extension__ extern __inline int16x8x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s16_x4 (const uint16_t * __a)
+vld1q_s16_x4 (const int16_t * __a)
{
union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x4v8hi ((const __builtin_neon_hi *) __a);
diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
index 01b29b60084..c73afe2b723 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
@@ -1,6 +1,6 @@
/* { dg-do assemble } */
/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
+/* { dg-options "-save-temps -O2 -Wpointer-sign" } */
/* { dg-add-options arm_neon } */
#include "arm_neon.h"
--
2.48.1

14
cross/gcc-armv7/APKBUILD
View file

@ -34,19 +34,19 @@ _pkgsnap="${pkgver##*_git}"
[ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""
pkgname=gcc-armv7
pkgrel=5
pkgrel=6
pkgdesc="Stage2 cross-compiler for armv7"
url="https://gcc.gnu.org"
arch="x86_64"
license="GPL-2.0-or-later AND LGPL-2.1-or-later"
_gccrel=$pkgver-r$pkgrel
depends="binutils-armv7 mpc1 so:libc.musl-x86_64.so.1 so:libgcc_s.so.1 so:libgmp.so.10 so:libisl.so.23 so:libmpc.so.3 so:libmpfr.so.6 so:libstdc++.so.6 so:libz.so.1"
depends="binutils-armv7 mpc1"
makedepends_build="gcc g++ bison flex texinfo gawk zip gmp-dev mpfr-dev mpc1-dev zlib-dev"
makedepends_host="linux-headers gmp-dev mpfr-dev mpc1-dev isl-dev zlib-dev musl-dev-armv7 binutils-armv7"
subpackages="g++-armv7:gpp libstdc++-dev-armv7:libcxx_dev"
[ "$CHOST" = "$CTARGET" ] && subpackages="gcc-gdb gcc-doc"
replaces="libstdc++ binutils"
options="!strip !tracedeps"
options="!strip"
: "${LANG_CXX:=true}"
: "${LANG_D:=true}"
@ -229,7 +229,6 @@ fi
if $LANG_JIT; then
subpackages="$subpackages libgccjit:jit libgccjit-dev:jitdev"
fi
makedepends="$makedepends_build $makedepends_host"
# when using upstream releases, use this URI template
# https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz
@ -279,6 +278,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz
0034-libgo-fix-lfs64-use.patch
0035-loongarch-disable-multilib-support.patch
0036-libphobos-add-riscv64-and-loongarch64-support.patch
0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch
fix-arm64.patch
ppc64le-quadmath.patch
riscv64-improve-build-time.patch
@ -487,6 +487,9 @@ package() {
# libcc1 does not depend on target, don't ship it
rm -rf "$pkgdir"/usr/lib/libcc1.so*
# These are moved into packages with arch=$CTARGET_ARCH so remove
# cross prefix (doesn't exist when BOOTSTRAP=nolibc)
[ "$BOOTSTRAP" != nolibc ] && mv "$pkgdir"/usr/$CTARGET/lib/*.so.* "$pkgdir"/usr/lib/
# fixup gcc library symlinks to be linker scripts so
# linker finds the libs from relocated sysroot
@ -570,8 +573,6 @@ gpp() {
depends="libstdc++-dev$_target=$_gccrel gcc$_target=$_gccrel musl-dev"
[ "$CHOST" = "$CTARGET" ] && depends="$depends libstdc++=$_gccrel"
depends="$depends so:libc.musl-x86_64.so.1 so:libgmp.so.10 so:libisl.so.23 so:libmpc.so.3 so:libmpfr.so.6 so:libz.so.1"
amove $_gcclibexec/cc1plus
amove usr/bin/*++
}
@ -782,6 +783,7 @@ c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0
c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c 0034-libgo-fix-lfs64-use.patch
65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3 0035-loongarch-disable-multilib-support.patch
06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453 0036-libphobos-add-riscv64-and-loongarch64-support.patch
a30148fb2cfa9a5800df4aed73f6b1b3b5d5817d768835a2574216f5818e6d6070199bacfe964f0d15b70eab7e2310c40b55e354f65360efce90e15d40287639 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch
00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f fix-arm64.patch
815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9 ppc64le-quadmath.patch
ea55e0fa6813fc95c4ca2e87f059182edc54dc61515ebb92bf6eb31dbbd176d0fe81edcc7ea28d32f84ca37e8d48a544623d3d9bc94aa41ffc0859326a616aa2 riscv64-improve-build-time.patch

82
cross/gcc-riscv64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch Normal file
View file

@ -0,0 +1,82 @@
From 4d0a333ef13e2da140cd44c4941b20f48a80dc0f Mon Sep 17 00:00:00 2001
From: Hannes Braun <hannes@hannesbraun.net>
Date: Thu, 20 Feb 2025 15:09:41 +0100
Subject: [PATCH] arm: Fix signedness of vld1q intrinsic parms [PR118942]
vld1q_s8_x3, vld1q_s16_x3, vld1q_s8_x4 and vld1q_s16_x4 were expecting
pointers to unsigned integers. These parameters should be pointers to
signed integers.
gcc/ChangeLog:
PR target/118942
* config/arm/arm_neon.h (vld1q_s8_x3): Use int8_t instead of
uint16_t.
(vld1q_s16_x3): Use int16_t instead of uint16_t.
(vld1q_s8_x4): Likewise.
(vld1q_s16_x4): Likewise.
gcc/testsuite/ChangeLog:
PR target/118942
* gcc.target/arm/simd/vld1q_base_xN_1.c: Add -Wpointer-sign.
Signed-off-by: Hannes Braun <hannes@hannesbraun.net>
---
gcc/config/arm/arm_neon.h | 8 ++++----
gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h
index 5b1c55c8d9f..578ada88fa6 100644
--- a/gcc/config/arm/arm_neon.h
+++ b/gcc/config/arm/arm_neon.h
@@ -10854,7 +10854,7 @@ vld1q_s64_x2 (const int64_t * __a)
__extension__ extern __inline int8x16x3_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s8_x3 (const uint8_t * __a)
+vld1q_s8_x3 (const int8_t * __a)
{
union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a);
@@ -10863,7 +10863,7 @@ vld1q_s8_x3 (const uint8_t * __a)
__extension__ extern __inline int16x8x3_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s16_x3 (const uint16_t * __a)
+vld1q_s16_x3 (const int16_t * __a)
{
union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a);
@@ -10890,7 +10890,7 @@ vld1q_s64_x3 (const int64_t * __a)
__extension__ extern __inline int8x16x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s8_x4 (const uint8_t * __a)
+vld1q_s8_x4 (const int8_t * __a)
{
union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x4v16qi ((const __builtin_neon_qi *) __a);
@@ -10899,7 +10899,7 @@ vld1q_s8_x4 (const uint8_t * __a)
__extension__ extern __inline int16x8x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s16_x4 (const uint16_t * __a)
+vld1q_s16_x4 (const int16_t * __a)
{
union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x4v8hi ((const __builtin_neon_hi *) __a);
diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
index 01b29b60084..c73afe2b723 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
@@ -1,6 +1,6 @@
/* { dg-do assemble } */
/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
+/* { dg-options "-save-temps -O2 -Wpointer-sign" } */
/* { dg-add-options arm_neon } */
#include "arm_neon.h"
--
2.48.1

14
cross/gcc-riscv64/APKBUILD
View file

@ -34,19 +34,19 @@ _pkgsnap="${pkgver##*_git}"
[ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""
pkgname=gcc-riscv64
pkgrel=5
pkgrel=6
pkgdesc="Stage2 cross-compiler for riscv64"
url="https://gcc.gnu.org"
arch="x86_64"
license="GPL-2.0-or-later AND LGPL-2.1-or-later"
_gccrel=$pkgver-r$pkgrel
depends="binutils-riscv64 mpc1 so:libc.musl-x86_64.so.1 so:libgcc_s.so.1 so:libgmp.so.10 so:libisl.so.23 so:libmpc.so.3 so:libmpfr.so.6 so:libstdc++.so.6 so:libz.so.1"
depends="binutils-riscv64 mpc1"
makedepends_build="gcc g++ bison flex texinfo gawk zip gmp-dev mpfr-dev mpc1-dev zlib-dev"
makedepends_host="linux-headers gmp-dev mpfr-dev mpc1-dev isl-dev zlib-dev musl-dev-riscv64 binutils-riscv64"
subpackages="g++-riscv64:gpp libstdc++-dev-riscv64:libcxx_dev"
[ "$CHOST" = "$CTARGET" ] && subpackages="gcc-gdb gcc-doc"
replaces="libstdc++ binutils"
options="!strip !tracedeps"
options="!strip"
: "${LANG_CXX:=true}"
: "${LANG_D:=true}"
@ -229,7 +229,6 @@ fi
if $LANG_JIT; then
subpackages="$subpackages libgccjit:jit libgccjit-dev:jitdev"
fi
makedepends="$makedepends_build $makedepends_host"
# when using upstream releases, use this URI template
# https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz
@ -279,6 +278,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz
0034-libgo-fix-lfs64-use.patch
0035-loongarch-disable-multilib-support.patch
0036-libphobos-add-riscv64-and-loongarch64-support.patch
0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch
fix-arm64.patch
ppc64le-quadmath.patch
riscv64-improve-build-time.patch
@ -487,6 +487,9 @@ package() {
# libcc1 does not depend on target, don't ship it
rm -rf "$pkgdir"/usr/lib/libcc1.so*
# These are moved into packages with arch=$CTARGET_ARCH so remove
# cross prefix (doesn't exist when BOOTSTRAP=nolibc)
[ "$BOOTSTRAP" != nolibc ] && mv "$pkgdir"/usr/$CTARGET/lib/*.so.* "$pkgdir"/usr/lib/
# fixup gcc library symlinks to be linker scripts so
# linker finds the libs from relocated sysroot
@ -570,8 +573,6 @@ gpp() {
depends="libstdc++-dev$_target=$_gccrel gcc$_target=$_gccrel musl-dev"
[ "$CHOST" = "$CTARGET" ] && depends="$depends libstdc++=$_gccrel"
depends="$depends so:libc.musl-x86_64.so.1 so:libgmp.so.10 so:libisl.so.23 so:libmpc.so.3 so:libmpfr.so.6 so:libz.so.1"
amove $_gcclibexec/cc1plus
amove usr/bin/*++
}
@ -782,6 +783,7 @@ c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0
c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c 0034-libgo-fix-lfs64-use.patch
65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3 0035-loongarch-disable-multilib-support.patch
06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453 0036-libphobos-add-riscv64-and-loongarch64-support.patch
a30148fb2cfa9a5800df4aed73f6b1b3b5d5817d768835a2574216f5818e6d6070199bacfe964f0d15b70eab7e2310c40b55e354f65360efce90e15d40287639 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch
00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f fix-arm64.patch
815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9 ppc64le-quadmath.patch
ea55e0fa6813fc95c4ca2e87f059182edc54dc61515ebb92bf6eb31dbbd176d0fe81edcc7ea28d32f84ca37e8d48a544623d3d9bc94aa41ffc0859326a616aa2 riscv64-improve-build-time.patch

82
cross/gcc-x86/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch Normal file
View file

@ -0,0 +1,82 @@
From 4d0a333ef13e2da140cd44c4941b20f48a80dc0f Mon Sep 17 00:00:00 2001
From: Hannes Braun <hannes@hannesbraun.net>
Date: Thu, 20 Feb 2025 15:09:41 +0100
Subject: [PATCH] arm: Fix signedness of vld1q intrinsic parms [PR118942]
vld1q_s8_x3, vld1q_s16_x3, vld1q_s8_x4 and vld1q_s16_x4 were expecting
pointers to unsigned integers. These parameters should be pointers to
signed integers.
gcc/ChangeLog:
PR target/118942
* config/arm/arm_neon.h (vld1q_s8_x3): Use int8_t instead of
uint16_t.
(vld1q_s16_x3): Use int16_t instead of uint16_t.
(vld1q_s8_x4): Likewise.
(vld1q_s16_x4): Likewise.
gcc/testsuite/ChangeLog:
PR target/118942
* gcc.target/arm/simd/vld1q_base_xN_1.c: Add -Wpointer-sign.
Signed-off-by: Hannes Braun <hannes@hannesbraun.net>
---
gcc/config/arm/arm_neon.h | 8 ++++----
gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h
index 5b1c55c8d9f..578ada88fa6 100644
--- a/gcc/config/arm/arm_neon.h
+++ b/gcc/config/arm/arm_neon.h
@@ -10854,7 +10854,7 @@ vld1q_s64_x2 (const int64_t * __a)
__extension__ extern __inline int8x16x3_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s8_x3 (const uint8_t * __a)
+vld1q_s8_x3 (const int8_t * __a)
{
union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a);
@@ -10863,7 +10863,7 @@ vld1q_s8_x3 (const uint8_t * __a)
__extension__ extern __inline int16x8x3_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s16_x3 (const uint16_t * __a)
+vld1q_s16_x3 (const int16_t * __a)
{
union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a);
@@ -10890,7 +10890,7 @@ vld1q_s64_x3 (const int64_t * __a)
__extension__ extern __inline int8x16x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s8_x4 (const uint8_t * __a)
+vld1q_s8_x4 (const int8_t * __a)
{
union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x4v16qi ((const __builtin_neon_qi *) __a);
@@ -10899,7 +10899,7 @@ vld1q_s8_x4 (const uint8_t * __a)
__extension__ extern __inline int16x8x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s16_x4 (const uint16_t * __a)
+vld1q_s16_x4 (const int16_t * __a)
{
union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x4v8hi ((const __builtin_neon_hi *) __a);
diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
index 01b29b60084..c73afe2b723 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
@@ -1,6 +1,6 @@
/* { dg-do assemble } */
/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
+/* { dg-options "-save-temps -O2 -Wpointer-sign" } */
/* { dg-add-options arm_neon } */
#include "arm_neon.h"
--
2.48.1

14
cross/gcc-x86/APKBUILD
View file

@ -34,19 +34,19 @@ _pkgsnap="${pkgver##*_git}"
[ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""
pkgname=gcc-x86
pkgrel=5
pkgrel=6
pkgdesc="Stage2 cross-compiler for x86"
url="https://gcc.gnu.org"
arch="x86_64"
license="GPL-2.0-or-later AND LGPL-2.1-or-later"
_gccrel=$pkgver-r$pkgrel
depends="binutils-x86 mpc1 so:libc.musl-x86_64.so.1 so:libgcc_s.so.1 so:libgmp.so.10 so:libisl.so.23 so:libmpc.so.3 so:libmpfr.so.6 so:libstdc++.so.6 so:libz.so.1"
depends="binutils-x86 mpc1"
makedepends_build="gcc g++ bison flex texinfo gawk zip gmp-dev mpfr-dev mpc1-dev zlib-dev"
makedepends_host="linux-headers gmp-dev mpfr-dev mpc1-dev isl-dev zlib-dev musl-dev-x86 binutils-x86"
subpackages="g++-x86:gpp libstdc++-dev-x86:libcxx_dev"
[ "$CHOST" = "$CTARGET" ] && subpackages="gcc-gdb gcc-doc"
replaces="libstdc++ binutils"
options="!strip !tracedeps"
options="!strip"
: "${LANG_CXX:=true}"
: "${LANG_D:=true}"
@ -229,7 +229,6 @@ fi
if $LANG_JIT; then
subpackages="$subpackages libgccjit:jit libgccjit-dev:jitdev"
fi
makedepends="$makedepends_build $makedepends_host"
# when using upstream releases, use this URI template
# https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz
@ -279,6 +278,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz
0034-libgo-fix-lfs64-use.patch
0035-loongarch-disable-multilib-support.patch
0036-libphobos-add-riscv64-and-loongarch64-support.patch
0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch
fix-arm64.patch
ppc64le-quadmath.patch
riscv64-improve-build-time.patch
@ -487,6 +487,9 @@ package() {
# libcc1 does not depend on target, don't ship it
rm -rf "$pkgdir"/usr/lib/libcc1.so*
# These are moved into packages with arch=$CTARGET_ARCH so remove
# cross prefix (doesn't exist when BOOTSTRAP=nolibc)
[ "$BOOTSTRAP" != nolibc ] && mv "$pkgdir"/usr/$CTARGET/lib/*.so.* "$pkgdir"/usr/lib/
# fixup gcc library symlinks to be linker scripts so
# linker finds the libs from relocated sysroot
@ -570,8 +573,6 @@ gpp() {
depends="libstdc++-dev$_target=$_gccrel gcc$_target=$_gccrel musl-dev"
[ "$CHOST" = "$CTARGET" ] && depends="$depends libstdc++=$_gccrel"
depends="$depends so:libc.musl-x86_64.so.1 so:libgmp.so.10 so:libisl.so.23 so:libmpc.so.3 so:libmpfr.so.6 so:libz.so.1"
amove $_gcclibexec/cc1plus
amove usr/bin/*++
}
@ -782,6 +783,7 @@ c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0
c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c 0034-libgo-fix-lfs64-use.patch
65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3 0035-loongarch-disable-multilib-support.patch
06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453 0036-libphobos-add-riscv64-and-loongarch64-support.patch
a30148fb2cfa9a5800df4aed73f6b1b3b5d5817d768835a2574216f5818e6d6070199bacfe964f0d15b70eab7e2310c40b55e354f65360efce90e15d40287639 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch
00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f fix-arm64.patch
815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9 ppc64le-quadmath.patch
ea55e0fa6813fc95c4ca2e87f059182edc54dc61515ebb92bf6eb31dbbd176d0fe81edcc7ea28d32f84ca37e8d48a544623d3d9bc94aa41ffc0859326a616aa2 riscv64-improve-build-time.patch

82
cross/gcc-x86_64/0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch Normal file
View file

@ -0,0 +1,82 @@
From 4d0a333ef13e2da140cd44c4941b20f48a80dc0f Mon Sep 17 00:00:00 2001
From: Hannes Braun <hannes@hannesbraun.net>
Date: Thu, 20 Feb 2025 15:09:41 +0100
Subject: [PATCH] arm: Fix signedness of vld1q intrinsic parms [PR118942]
vld1q_s8_x3, vld1q_s16_x3, vld1q_s8_x4 and vld1q_s16_x4 were expecting
pointers to unsigned integers. These parameters should be pointers to
signed integers.
gcc/ChangeLog:
PR target/118942
* config/arm/arm_neon.h (vld1q_s8_x3): Use int8_t instead of
uint16_t.
(vld1q_s16_x3): Use int16_t instead of uint16_t.
(vld1q_s8_x4): Likewise.
(vld1q_s16_x4): Likewise.
gcc/testsuite/ChangeLog:
PR target/118942
* gcc.target/arm/simd/vld1q_base_xN_1.c: Add -Wpointer-sign.
Signed-off-by: Hannes Braun <hannes@hannesbraun.net>
---
gcc/config/arm/arm_neon.h | 8 ++++----
gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c | 2 +-
2 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/gcc/config/arm/arm_neon.h b/gcc/config/arm/arm_neon.h
index 5b1c55c8d9f..578ada88fa6 100644
--- a/gcc/config/arm/arm_neon.h
+++ b/gcc/config/arm/arm_neon.h
@@ -10854,7 +10854,7 @@ vld1q_s64_x2 (const int64_t * __a)
__extension__ extern __inline int8x16x3_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s8_x3 (const uint8_t * __a)
+vld1q_s8_x3 (const int8_t * __a)
{
union { int8x16x3_t __i; __builtin_neon_ci __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x3v16qi ((const __builtin_neon_qi *) __a);
@@ -10863,7 +10863,7 @@ vld1q_s8_x3 (const uint8_t * __a)
__extension__ extern __inline int16x8x3_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s16_x3 (const uint16_t * __a)
+vld1q_s16_x3 (const int16_t * __a)
{
union { int16x8x3_t __i; __builtin_neon_ci __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x3v8hi ((const __builtin_neon_hi *) __a);
@@ -10890,7 +10890,7 @@ vld1q_s64_x3 (const int64_t * __a)
__extension__ extern __inline int8x16x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s8_x4 (const uint8_t * __a)
+vld1q_s8_x4 (const int8_t * __a)
{
union { int8x16x4_t __i; __builtin_neon_xi __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x4v16qi ((const __builtin_neon_qi *) __a);
@@ -10899,7 +10899,7 @@ vld1q_s8_x4 (const uint8_t * __a)
__extension__ extern __inline int16x8x4_t
__attribute__ ((__always_inline__, __gnu_inline__, __artificial__))
-vld1q_s16_x4 (const uint16_t * __a)
+vld1q_s16_x4 (const int16_t * __a)
{
union { int16x8x4_t __i; __builtin_neon_xi __o; } __rv;
__rv.__o = __builtin_neon_vld1q_x4v8hi ((const __builtin_neon_hi *) __a);
diff --git a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
index 01b29b60084..c73afe2b723 100644
--- a/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
+++ b/gcc/testsuite/gcc.target/arm/simd/vld1q_base_xN_1.c
@@ -1,6 +1,6 @@
/* { dg-do assemble } */
/* { dg-require-effective-target arm_neon_ok } */
-/* { dg-options "-save-temps -O2" } */
+/* { dg-options "-save-temps -O2 -Wpointer-sign" } */
/* { dg-add-options arm_neon } */
#include "arm_neon.h"
--
2.48.1

14
cross/gcc-x86_64/APKBUILD
View file

@ -34,19 +34,19 @@ _pkgsnap="${pkgver##*_git}"
[ "$CHOST" != "$CTARGET" ] && _target="-$CTARGET_ARCH" || _target=""
pkgname=gcc-x86_64
pkgrel=5
pkgrel=6
pkgdesc="Stage2 cross-compiler for x86_64"
url="https://gcc.gnu.org"
arch="aarch64"
license="GPL-2.0-or-later AND LGPL-2.1-or-later"
_gccrel=$pkgver-r$pkgrel
depends="binutils-x86_64 mpc1 so:libc.musl-aarch64.so.1 so:libgcc_s.so.1 so:libgmp.so.10 so:libisl.so.23 so:libmpc.so.3 so:libmpfr.so.6 so:libstdc++.so.6 so:libz.so.1"
depends="binutils-x86_64 mpc1"
makedepends_build="gcc g++ bison flex texinfo gawk zip gmp-dev mpfr-dev mpc1-dev zlib-dev"
makedepends_host="linux-headers gmp-dev mpfr-dev mpc1-dev isl-dev zlib-dev musl-dev-x86_64 binutils-x86_64"
subpackages="g++-x86_64:gpp libstdc++-dev-x86_64:libcxx_dev"
[ "$CHOST" = "$CTARGET" ] && subpackages="gcc-gdb gcc-doc"
replaces="libstdc++ binutils"
options="!strip !tracedeps"
options="!strip"
: "${LANG_CXX:=true}"
: "${LANG_D:=true}"
@ -229,7 +229,6 @@ fi
if $LANG_JIT; then
subpackages="$subpackages libgccjit:jit libgccjit-dev:jitdev"
fi
makedepends="$makedepends_build $makedepends_host"
# when using upstream releases, use this URI template
# https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz
@ -279,6 +278,7 @@ source="https://gcc.gnu.org/pub/gcc/releases/gcc-$_pkgbase/gcc-$_pkgbase.tar.xz
0034-libgo-fix-lfs64-use.patch
0035-loongarch-disable-multilib-support.patch
0036-libphobos-add-riscv64-and-loongarch64-support.patch
0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch
fix-arm64.patch
ppc64le-quadmath.patch
riscv64-improve-build-time.patch
@ -487,6 +487,9 @@ package() {
# libcc1 does not depend on target, don't ship it
rm -rf "$pkgdir"/usr/lib/libcc1.so*
# These are moved into packages with arch=$CTARGET_ARCH so remove
# cross prefix (doesn't exist when BOOTSTRAP=nolibc)
[ "$BOOTSTRAP" != nolibc ] && mv "$pkgdir"/usr/$CTARGET/lib/*.so.* "$pkgdir"/usr/lib/
# fixup gcc library symlinks to be linker scripts so
# linker finds the libs from relocated sysroot
@ -570,8 +573,6 @@ gpp() {
depends="libstdc++-dev$_target=$_gccrel gcc$_target=$_gccrel musl-dev"
[ "$CHOST" = "$CTARGET" ] && depends="$depends libstdc++=$_gccrel"
depends="$depends so:libc.musl-aarch64.so.1 so:libgmp.so.10 so:libisl.so.23 so:libmpc.so.3 so:libmpfr.so.6 so:libz.so.1"
amove $_gcclibexec/cc1plus
amove usr/bin/*++
}
@ -782,6 +783,7 @@ c474f34e6f9a4239d486a65141a133dbe8ce91427d502a57a9fd6eb403478a2b5715ba74f24c1cc0
c4482ffc36e7894b2140800159f4cbc9a3e9011e43a69b69f4fa92d5a11e2ee645c7e21df4423dd1e0636e8890849a5719647bfbdf84f951d638f8f488cb718c 0034-libgo-fix-lfs64-use.patch
65df1d489e8d07a811f39e27fd29e3b2b4164fbc2c5fdc16a5142886d94a96e3fb28ccf4f20dd297ba6540ef8ea1ac3eb65a4279494639bf2f0f8376a3896cc3 0035-loongarch-disable-multilib-support.patch
06f64544fd8bc4b6c8b06410c5198aa8fb4e82c232afc0cad83b2c69ac5d39399968206defa78297222700cd18e7fd7e8244afa76d343406a01f657c86306453 0036-libphobos-add-riscv64-and-loongarch64-support.patch
a30148fb2cfa9a5800df4aed73f6b1b3b5d5817d768835a2574216f5818e6d6070199bacfe964f0d15b70eab7e2310c40b55e354f65360efce90e15d40287639 0037-arm-fix-signedness-of-vld1q-intrinsic-parms.patch
00319c9770362520e8e93bd03fda1769dfa3622eba77d620e11d8af45a38e6d804a5e924046ae388e1cfaea605696e89c343fca507aaaa5edd58d80744fff14f fix-arm64.patch
815265826742400f86336f0c2d3e4edc37398dbc6505ee81107c0103c13ac0f406cff851438d2323033c6c6d0c0323765ee15b975eab8d1dd465f9e988168fb9 ppc64le-quadmath.patch
ea55e0fa6813fc95c4ca2e87f059182edc54dc61515ebb92bf6eb31dbbd176d0fe81edcc7ea28d32f84ca37e8d48a544623d3d9bc94aa41ffc0859326a616aa2 riscv64-improve-build-time.patch