From 6668d12fd4a628299ffbf89794b6f7f67416e3fa Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Sat, 4 May 2024 15:12:43 +0200
Subject: [PATCH] add reset props to usb otg/ehci ports

usb resets are needed in case u-boot does its own reset
of the devices, otherwise ports are left in a
non-functional state. Also fixes occasional missing
device detection on the OTG port.

In any case, when reset are present, the iddig filter
wait time always times out, so we comment it as it
looks unnecessary (the port works fine, the device is
always detected also in case of timeout)
---
 arch/arm/boot/dts/rockchip/rk322x.dtsi | 8 ++++++++
 drivers/usb/dwc2/core.c                | 2 +-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rockchip/rk322x.dtsi b/arch/arm/boot/dts/rockchip/rk322x.dtsi
index 03d9baddcbab..17c5f0a8fcf3 100644
--- a/arch/arm/boot/dts/rockchip/rk322x.dtsi
+++ b/arch/arm/boot/dts/rockchip/rk322x.dtsi
@@ -807,6 +807,8 @@ usb_otg: usb@30040000 {
 		g-tx-fifo-size = <256 128 128 64 32 16>;
 		phys = <&u2phy0_otg>;
 		phy-names = "usb2-phy";
+		resets = <&cru SRST_USBOTG>;
+		reset-names = "dwc2";
 		status = "disabled";
 	};
 
@@ -817,6 +819,8 @@ usb_host0_ehci: usb@30080000 {
 		clocks = <&cru HCLK_HOST0>, <&u2phy0>;
 		phys = <&u2phy0_host>;
 		phy-names = "usb";
+		resets = <&cru SRST_USBHOST0>;
+		reset-names = "ehci";
 		status = "disabled";
 	};
 
@@ -837,6 +841,8 @@ usb_host1_ehci: usb@300c0000 {
 		clocks = <&cru HCLK_HOST1>, <&u2phy1>;
 		phys = <&u2phy1_otg>;
 		phy-names = "usb";
+		resets = <&cru SRST_USBHOST1>;
+		reset-names = "ehci";
 		status = "disabled";
 	};
 
@@ -857,6 +863,8 @@ usb_host2_ehci: usb@30100000 {
 		clocks = <&cru HCLK_HOST2>, <&u2phy1>;
 		phys = <&u2phy1_host>;
 		phy-names = "usb";
+		resets = <&cru SRST_USBHOST2>;
+		reset-names = "ehci";
 		status = "disabled";
 	};
 
diff --git a/drivers/usb/dwc2/core.c b/drivers/usb/dwc2/core.c
index 5635e4d7ec88..1e20aabc2033 100644
--- a/drivers/usb/dwc2/core.c
+++ b/drivers/usb/dwc2/core.c
@@ -413,7 +413,7 @@ int dwc2_core_reset(struct dwc2_hsotg *hsotg, bool skip_wait)
 
 		if (!(gotgctl & GOTGCTL_CONID_B) ||
 		    (gusbcfg & GUSBCFG_FORCEHOSTMODE)) {
-			wait_for_host_mode = true;
+			wait_for_host_mode = false;
 		}
 	}
 
-- 
2.34.1

